adxrs450.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467
  1. /*
  2. * ADXRS450/ADXRS453 Digital Output Gyroscope Driver
  3. *
  4. * Copyright 2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/irq.h>
  10. #include <linux/delay.h>
  11. #include <linux/mutex.h>
  12. #include <linux/device.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #define ADXRS450_STARTUP_DELAY 50 /* ms */
  22. /* The MSB for the spi commands */
  23. #define ADXRS450_SENSOR_DATA (0x20 << 24)
  24. #define ADXRS450_WRITE_DATA (0x40 << 24)
  25. #define ADXRS450_READ_DATA (0x80 << 24)
  26. #define ADXRS450_RATE1 0x00 /* Rate Registers */
  27. #define ADXRS450_TEMP1 0x02 /* Temperature Registers */
  28. #define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
  29. #define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
  30. #define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
  31. #define ADXRS450_FAULT1 0x0A /* Fault Registers */
  32. #define ADXRS450_PID1 0x0C /* Part ID Register 1 */
  33. #define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
  34. #define ADXRS450_SNL 0x10
  35. #define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
  36. /* Check bits */
  37. #define ADXRS450_P 0x01
  38. #define ADXRS450_CHK 0x02
  39. #define ADXRS450_CST 0x04
  40. #define ADXRS450_PWR 0x08
  41. #define ADXRS450_POR 0x10
  42. #define ADXRS450_NVM 0x20
  43. #define ADXRS450_Q 0x40
  44. #define ADXRS450_PLL 0x80
  45. #define ADXRS450_UV 0x100
  46. #define ADXRS450_OV 0x200
  47. #define ADXRS450_AMP 0x400
  48. #define ADXRS450_FAIL 0x800
  49. #define ADXRS450_WRERR_MASK (0x7 << 29)
  50. #define ADXRS450_MAX_RX 4
  51. #define ADXRS450_MAX_TX 4
  52. #define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
  53. enum {
  54. ID_ADXRS450,
  55. ID_ADXRS453,
  56. };
  57. /**
  58. * struct adxrs450_state - device instance specific data
  59. * @us: actual spi_device
  60. * @buf_lock: mutex to protect tx and rx
  61. * @tx: transmit buffer
  62. * @rx: receive buffer
  63. **/
  64. struct adxrs450_state {
  65. struct spi_device *us;
  66. struct mutex buf_lock;
  67. __be32 tx ____cacheline_aligned;
  68. __be32 rx;
  69. };
  70. /**
  71. * adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
  72. * @indio_dev: device associated with child of actual iio_dev
  73. * @reg_address: the address of the lower of the two registers, which should be
  74. * an even address, the second register's address is reg_address + 1.
  75. * @val: somewhere to pass back the value read
  76. **/
  77. static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
  78. u8 reg_address,
  79. u16 *val)
  80. {
  81. struct adxrs450_state *st = iio_priv(indio_dev);
  82. u32 tx;
  83. int ret;
  84. struct spi_transfer xfers[] = {
  85. {
  86. .tx_buf = &st->tx,
  87. .bits_per_word = 8,
  88. .len = sizeof(st->tx),
  89. .cs_change = 1,
  90. }, {
  91. .rx_buf = &st->rx,
  92. .bits_per_word = 8,
  93. .len = sizeof(st->rx),
  94. },
  95. };
  96. mutex_lock(&st->buf_lock);
  97. tx = ADXRS450_READ_DATA | (reg_address << 17);
  98. if (!(hweight32(tx) & 1))
  99. tx |= ADXRS450_P;
  100. st->tx = cpu_to_be32(tx);
  101. ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  102. if (ret) {
  103. dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
  104. reg_address);
  105. goto error_ret;
  106. }
  107. *val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
  108. error_ret:
  109. mutex_unlock(&st->buf_lock);
  110. return ret;
  111. }
  112. /**
  113. * adxrs450_spi_write_reg_16() - write 2 bytes data to a register pair
  114. * @indio_dev: device associated with child of actual actual iio_dev
  115. * @reg_address: the address of the lower of the two registers,which should be
  116. * an even address, the second register's address is reg_address + 1.
  117. * @val: value to be written.
  118. **/
  119. static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
  120. u8 reg_address,
  121. u16 val)
  122. {
  123. struct adxrs450_state *st = iio_priv(indio_dev);
  124. u32 tx;
  125. int ret;
  126. mutex_lock(&st->buf_lock);
  127. tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
  128. if (!(hweight32(tx) & 1))
  129. tx |= ADXRS450_P;
  130. st->tx = cpu_to_be32(tx);
  131. ret = spi_write(st->us, &st->tx, sizeof(st->tx));
  132. if (ret)
  133. dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
  134. reg_address);
  135. usleep_range(100, 1000); /* enforce sequential transfer delay 0.1ms */
  136. mutex_unlock(&st->buf_lock);
  137. return ret;
  138. }
  139. /**
  140. * adxrs450_spi_sensor_data() - read 2 bytes sensor data
  141. * @indio_dev: device associated with child of actual iio_dev
  142. * @val: somewhere to pass back the value read
  143. **/
  144. static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
  145. {
  146. struct adxrs450_state *st = iio_priv(indio_dev);
  147. int ret;
  148. struct spi_transfer xfers[] = {
  149. {
  150. .tx_buf = &st->tx,
  151. .bits_per_word = 8,
  152. .len = sizeof(st->tx),
  153. .cs_change = 1,
  154. }, {
  155. .rx_buf = &st->rx,
  156. .bits_per_word = 8,
  157. .len = sizeof(st->rx),
  158. },
  159. };
  160. mutex_lock(&st->buf_lock);
  161. st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
  162. ret = spi_sync_transfer(st->us, xfers, ARRAY_SIZE(xfers));
  163. if (ret) {
  164. dev_err(&st->us->dev, "Problem while reading sensor data\n");
  165. goto error_ret;
  166. }
  167. *val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
  168. error_ret:
  169. mutex_unlock(&st->buf_lock);
  170. return ret;
  171. }
  172. /**
  173. * adxrs450_spi_initial() - use for initializing procedure.
  174. * @st: device instance specific data
  175. * @val: somewhere to pass back the value read
  176. * @chk: Whether to perform fault check
  177. **/
  178. static int adxrs450_spi_initial(struct adxrs450_state *st,
  179. u32 *val, char chk)
  180. {
  181. int ret;
  182. u32 tx;
  183. struct spi_transfer xfers = {
  184. .tx_buf = &st->tx,
  185. .rx_buf = &st->rx,
  186. .bits_per_word = 8,
  187. .len = sizeof(st->tx),
  188. };
  189. mutex_lock(&st->buf_lock);
  190. tx = ADXRS450_SENSOR_DATA;
  191. if (chk)
  192. tx |= (ADXRS450_CHK | ADXRS450_P);
  193. st->tx = cpu_to_be32(tx);
  194. ret = spi_sync_transfer(st->us, &xfers, 1);
  195. if (ret) {
  196. dev_err(&st->us->dev, "Problem while reading initializing data\n");
  197. goto error_ret;
  198. }
  199. *val = be32_to_cpu(st->rx);
  200. error_ret:
  201. mutex_unlock(&st->buf_lock);
  202. return ret;
  203. }
  204. /* Recommended Startup Sequence by spec */
  205. static int adxrs450_initial_setup(struct iio_dev *indio_dev)
  206. {
  207. u32 t;
  208. u16 data;
  209. int ret;
  210. struct adxrs450_state *st = iio_priv(indio_dev);
  211. msleep(ADXRS450_STARTUP_DELAY*2);
  212. ret = adxrs450_spi_initial(st, &t, 1);
  213. if (ret)
  214. return ret;
  215. if (t != 0x01)
  216. dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
  217. msleep(ADXRS450_STARTUP_DELAY);
  218. ret = adxrs450_spi_initial(st, &t, 0);
  219. if (ret)
  220. return ret;
  221. msleep(ADXRS450_STARTUP_DELAY);
  222. ret = adxrs450_spi_initial(st, &t, 0);
  223. if (ret)
  224. return ret;
  225. if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
  226. dev_err(&st->us->dev, "The second response is not correct!\n");
  227. return -EIO;
  228. }
  229. ret = adxrs450_spi_initial(st, &t, 0);
  230. if (ret)
  231. return ret;
  232. if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
  233. dev_err(&st->us->dev, "The third response is not correct!\n");
  234. return -EIO;
  235. }
  236. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
  237. if (ret)
  238. return ret;
  239. if (data & 0x0fff) {
  240. dev_err(&st->us->dev, "The device is not in normal status!\n");
  241. return -EINVAL;
  242. }
  243. return 0;
  244. }
  245. static int adxrs450_write_raw(struct iio_dev *indio_dev,
  246. struct iio_chan_spec const *chan,
  247. int val,
  248. int val2,
  249. long mask)
  250. {
  251. int ret;
  252. switch (mask) {
  253. case IIO_CHAN_INFO_CALIBBIAS:
  254. if (val < -0x400 || val >= 0x400)
  255. return -EINVAL;
  256. ret = adxrs450_spi_write_reg_16(indio_dev,
  257. ADXRS450_DNC1, val);
  258. break;
  259. default:
  260. ret = -EINVAL;
  261. break;
  262. }
  263. return ret;
  264. }
  265. static int adxrs450_read_raw(struct iio_dev *indio_dev,
  266. struct iio_chan_spec const *chan,
  267. int *val,
  268. int *val2,
  269. long mask)
  270. {
  271. int ret;
  272. s16 t;
  273. switch (mask) {
  274. case IIO_CHAN_INFO_RAW:
  275. switch (chan->type) {
  276. case IIO_ANGL_VEL:
  277. ret = adxrs450_spi_sensor_data(indio_dev, &t);
  278. if (ret)
  279. break;
  280. *val = t;
  281. ret = IIO_VAL_INT;
  282. break;
  283. case IIO_TEMP:
  284. ret = adxrs450_spi_read_reg_16(indio_dev,
  285. ADXRS450_TEMP1, &t);
  286. if (ret)
  287. break;
  288. *val = (t >> 6) + 225;
  289. ret = IIO_VAL_INT;
  290. break;
  291. default:
  292. ret = -EINVAL;
  293. break;
  294. }
  295. break;
  296. case IIO_CHAN_INFO_SCALE:
  297. switch (chan->type) {
  298. case IIO_ANGL_VEL:
  299. *val = 0;
  300. *val2 = 218166;
  301. return IIO_VAL_INT_PLUS_NANO;
  302. case IIO_TEMP:
  303. *val = 200;
  304. *val2 = 0;
  305. return IIO_VAL_INT;
  306. default:
  307. return -EINVAL;
  308. }
  309. case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
  310. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
  311. if (ret)
  312. break;
  313. *val = t;
  314. ret = IIO_VAL_INT;
  315. break;
  316. case IIO_CHAN_INFO_CALIBBIAS:
  317. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
  318. if (ret)
  319. break;
  320. *val = sign_extend32(t, 9);
  321. ret = IIO_VAL_INT;
  322. break;
  323. default:
  324. ret = -EINVAL;
  325. break;
  326. }
  327. return ret;
  328. }
  329. static const struct iio_chan_spec adxrs450_channels[2][2] = {
  330. [ID_ADXRS450] = {
  331. {
  332. .type = IIO_ANGL_VEL,
  333. .modified = 1,
  334. .channel2 = IIO_MOD_Z,
  335. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  336. BIT(IIO_CHAN_INFO_CALIBBIAS) |
  337. BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW) |
  338. BIT(IIO_CHAN_INFO_SCALE),
  339. }, {
  340. .type = IIO_TEMP,
  341. .indexed = 1,
  342. .channel = 0,
  343. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  344. BIT(IIO_CHAN_INFO_SCALE),
  345. }
  346. },
  347. [ID_ADXRS453] = {
  348. {
  349. .type = IIO_ANGL_VEL,
  350. .modified = 1,
  351. .channel2 = IIO_MOD_Z,
  352. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  353. BIT(IIO_CHAN_INFO_SCALE) |
  354. BIT(IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW),
  355. }, {
  356. .type = IIO_TEMP,
  357. .indexed = 1,
  358. .channel = 0,
  359. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
  360. BIT(IIO_CHAN_INFO_SCALE),
  361. }
  362. },
  363. };
  364. static const struct iio_info adxrs450_info = {
  365. .driver_module = THIS_MODULE,
  366. .read_raw = &adxrs450_read_raw,
  367. .write_raw = &adxrs450_write_raw,
  368. };
  369. static int adxrs450_probe(struct spi_device *spi)
  370. {
  371. int ret;
  372. struct adxrs450_state *st;
  373. struct iio_dev *indio_dev;
  374. /* setup the industrialio driver allocated elements */
  375. indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
  376. if (!indio_dev)
  377. return -ENOMEM;
  378. st = iio_priv(indio_dev);
  379. st->us = spi;
  380. mutex_init(&st->buf_lock);
  381. /* This is only used for removal purposes */
  382. spi_set_drvdata(spi, indio_dev);
  383. indio_dev->dev.parent = &spi->dev;
  384. indio_dev->info = &adxrs450_info;
  385. indio_dev->modes = INDIO_DIRECT_MODE;
  386. indio_dev->channels =
  387. adxrs450_channels[spi_get_device_id(spi)->driver_data];
  388. indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
  389. indio_dev->name = spi->dev.driver->name;
  390. ret = devm_iio_device_register(&spi->dev, indio_dev);
  391. if (ret)
  392. return ret;
  393. /* Get the device into a sane initial state */
  394. ret = adxrs450_initial_setup(indio_dev);
  395. if (ret)
  396. return ret;
  397. return 0;
  398. }
  399. static const struct spi_device_id adxrs450_id[] = {
  400. {"adxrs450", ID_ADXRS450},
  401. {"adxrs453", ID_ADXRS453},
  402. {}
  403. };
  404. MODULE_DEVICE_TABLE(spi, adxrs450_id);
  405. static struct spi_driver adxrs450_driver = {
  406. .driver = {
  407. .name = "adxrs450",
  408. },
  409. .probe = adxrs450_probe,
  410. .id_table = adxrs450_id,
  411. };
  412. module_spi_driver(adxrs450_driver);
  413. MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
  414. MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
  415. MODULE_LICENSE("GPL v2");