opt3001.c 18 KB

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  1. /**
  2. * opt3001.c - Texas Instruments OPT3001 Light Sensor
  3. *
  4. * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com
  5. *
  6. * Author: Andreas Dannenberg <dannenberg@ti.com>
  7. * Based on previous work from: Felipe Balbi <balbi@ti.com>
  8. *
  9. * This program is free software: you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License version 2 of the License
  11. * as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but WITHOUT
  14. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  15. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  16. * more details.
  17. */
  18. #include <linux/bitops.h>
  19. #include <linux/delay.h>
  20. #include <linux/device.h>
  21. #include <linux/i2c.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/kernel.h>
  25. #include <linux/module.h>
  26. #include <linux/mutex.h>
  27. #include <linux/slab.h>
  28. #include <linux/types.h>
  29. #include <linux/iio/events.h>
  30. #include <linux/iio/iio.h>
  31. #include <linux/iio/sysfs.h>
  32. #define OPT3001_RESULT 0x00
  33. #define OPT3001_CONFIGURATION 0x01
  34. #define OPT3001_LOW_LIMIT 0x02
  35. #define OPT3001_HIGH_LIMIT 0x03
  36. #define OPT3001_MANUFACTURER_ID 0x7e
  37. #define OPT3001_DEVICE_ID 0x7f
  38. #define OPT3001_CONFIGURATION_RN_MASK (0xf << 12)
  39. #define OPT3001_CONFIGURATION_RN_AUTO (0xc << 12)
  40. #define OPT3001_CONFIGURATION_CT BIT(11)
  41. #define OPT3001_CONFIGURATION_M_MASK (3 << 9)
  42. #define OPT3001_CONFIGURATION_M_SHUTDOWN (0 << 9)
  43. #define OPT3001_CONFIGURATION_M_SINGLE (1 << 9)
  44. #define OPT3001_CONFIGURATION_M_CONTINUOUS (2 << 9) /* also 3 << 9 */
  45. #define OPT3001_CONFIGURATION_OVF BIT(8)
  46. #define OPT3001_CONFIGURATION_CRF BIT(7)
  47. #define OPT3001_CONFIGURATION_FH BIT(6)
  48. #define OPT3001_CONFIGURATION_FL BIT(5)
  49. #define OPT3001_CONFIGURATION_L BIT(4)
  50. #define OPT3001_CONFIGURATION_POL BIT(3)
  51. #define OPT3001_CONFIGURATION_ME BIT(2)
  52. #define OPT3001_CONFIGURATION_FC_MASK (3 << 0)
  53. /* The end-of-conversion enable is located in the low-limit register */
  54. #define OPT3001_LOW_LIMIT_EOC_ENABLE 0xc000
  55. #define OPT3001_REG_EXPONENT(n) ((n) >> 12)
  56. #define OPT3001_REG_MANTISSA(n) ((n) & 0xfff)
  57. /*
  58. * Time to wait for conversion result to be ready. The device datasheet
  59. * worst-case max value is 880ms. Add some slack to be on the safe side.
  60. */
  61. #define OPT3001_RESULT_READY_TIMEOUT msecs_to_jiffies(1000)
  62. struct opt3001 {
  63. struct i2c_client *client;
  64. struct device *dev;
  65. struct mutex lock;
  66. u16 ok_to_ignore_lock:1;
  67. u16 result_ready:1;
  68. wait_queue_head_t result_ready_queue;
  69. u16 result;
  70. u32 int_time;
  71. u32 mode;
  72. u16 high_thresh_mantissa;
  73. u16 low_thresh_mantissa;
  74. u8 high_thresh_exp;
  75. u8 low_thresh_exp;
  76. };
  77. struct opt3001_scale {
  78. int val;
  79. int val2;
  80. };
  81. static const struct opt3001_scale opt3001_scales[] = {
  82. {
  83. .val = 40,
  84. .val2 = 950000,
  85. },
  86. {
  87. .val = 81,
  88. .val2 = 900000,
  89. },
  90. {
  91. .val = 163,
  92. .val2 = 800000,
  93. },
  94. {
  95. .val = 327,
  96. .val2 = 600000,
  97. },
  98. {
  99. .val = 655,
  100. .val2 = 200000,
  101. },
  102. {
  103. .val = 1310,
  104. .val2 = 400000,
  105. },
  106. {
  107. .val = 2620,
  108. .val2 = 800000,
  109. },
  110. {
  111. .val = 5241,
  112. .val2 = 600000,
  113. },
  114. {
  115. .val = 10483,
  116. .val2 = 200000,
  117. },
  118. {
  119. .val = 20966,
  120. .val2 = 400000,
  121. },
  122. {
  123. .val = 83865,
  124. .val2 = 600000,
  125. },
  126. };
  127. static int opt3001_find_scale(const struct opt3001 *opt, int val,
  128. int val2, u8 *exponent)
  129. {
  130. int i;
  131. for (i = 0; i < ARRAY_SIZE(opt3001_scales); i++) {
  132. const struct opt3001_scale *scale = &opt3001_scales[i];
  133. /*
  134. * Combine the integer and micro parts for comparison
  135. * purposes. Use milli lux precision to avoid 32-bit integer
  136. * overflows.
  137. */
  138. if ((val * 1000 + val2 / 1000) <=
  139. (scale->val * 1000 + scale->val2 / 1000)) {
  140. *exponent = i;
  141. return 0;
  142. }
  143. }
  144. return -EINVAL;
  145. }
  146. static void opt3001_to_iio_ret(struct opt3001 *opt, u8 exponent,
  147. u16 mantissa, int *val, int *val2)
  148. {
  149. int lux;
  150. lux = 10 * (mantissa << exponent);
  151. *val = lux / 1000;
  152. *val2 = (lux - (*val * 1000)) * 1000;
  153. }
  154. static void opt3001_set_mode(struct opt3001 *opt, u16 *reg, u16 mode)
  155. {
  156. *reg &= ~OPT3001_CONFIGURATION_M_MASK;
  157. *reg |= mode;
  158. opt->mode = mode;
  159. }
  160. static IIO_CONST_ATTR_INT_TIME_AVAIL("0.1 0.8");
  161. static struct attribute *opt3001_attributes[] = {
  162. &iio_const_attr_integration_time_available.dev_attr.attr,
  163. NULL
  164. };
  165. static const struct attribute_group opt3001_attribute_group = {
  166. .attrs = opt3001_attributes,
  167. };
  168. static const struct iio_event_spec opt3001_event_spec[] = {
  169. {
  170. .type = IIO_EV_TYPE_THRESH,
  171. .dir = IIO_EV_DIR_RISING,
  172. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  173. BIT(IIO_EV_INFO_ENABLE),
  174. },
  175. {
  176. .type = IIO_EV_TYPE_THRESH,
  177. .dir = IIO_EV_DIR_FALLING,
  178. .mask_separate = BIT(IIO_EV_INFO_VALUE) |
  179. BIT(IIO_EV_INFO_ENABLE),
  180. },
  181. };
  182. static const struct iio_chan_spec opt3001_channels[] = {
  183. {
  184. .type = IIO_LIGHT,
  185. .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED) |
  186. BIT(IIO_CHAN_INFO_INT_TIME),
  187. .event_spec = opt3001_event_spec,
  188. .num_event_specs = ARRAY_SIZE(opt3001_event_spec),
  189. },
  190. IIO_CHAN_SOFT_TIMESTAMP(1),
  191. };
  192. static int opt3001_get_lux(struct opt3001 *opt, int *val, int *val2)
  193. {
  194. int ret;
  195. u16 mantissa;
  196. u16 reg;
  197. u8 exponent;
  198. u16 value;
  199. /*
  200. * Enable the end-of-conversion interrupt mechanism. Note that doing
  201. * so will overwrite the low-level limit value however we will restore
  202. * this value later on.
  203. */
  204. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT,
  205. OPT3001_LOW_LIMIT_EOC_ENABLE);
  206. if (ret < 0) {
  207. dev_err(opt->dev, "failed to write register %02x\n",
  208. OPT3001_LOW_LIMIT);
  209. return ret;
  210. }
  211. /* Reset data-ready indicator flag (will be set in the IRQ routine) */
  212. opt->result_ready = false;
  213. /* Allow IRQ to access the device despite lock being set */
  214. opt->ok_to_ignore_lock = true;
  215. /* Configure for single-conversion mode and start a new conversion */
  216. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  217. if (ret < 0) {
  218. dev_err(opt->dev, "failed to read register %02x\n",
  219. OPT3001_CONFIGURATION);
  220. goto err;
  221. }
  222. reg = ret;
  223. opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SINGLE);
  224. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  225. reg);
  226. if (ret < 0) {
  227. dev_err(opt->dev, "failed to write register %02x\n",
  228. OPT3001_CONFIGURATION);
  229. goto err;
  230. }
  231. /* Wait for the IRQ to indicate the conversion is complete */
  232. ret = wait_event_timeout(opt->result_ready_queue, opt->result_ready,
  233. OPT3001_RESULT_READY_TIMEOUT);
  234. err:
  235. /* Disallow IRQ to access the device while lock is active */
  236. opt->ok_to_ignore_lock = false;
  237. if (ret == 0)
  238. return -ETIMEDOUT;
  239. else if (ret < 0)
  240. return ret;
  241. /*
  242. * Disable the end-of-conversion interrupt mechanism by restoring the
  243. * low-level limit value (clearing OPT3001_LOW_LIMIT_EOC_ENABLE). Note
  244. * that selectively clearing those enable bits would affect the actual
  245. * limit value due to bit-overlap and therefore can't be done.
  246. */
  247. value = (opt->low_thresh_exp << 12) | opt->low_thresh_mantissa;
  248. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_LOW_LIMIT,
  249. value);
  250. if (ret < 0) {
  251. dev_err(opt->dev, "failed to write register %02x\n",
  252. OPT3001_LOW_LIMIT);
  253. return ret;
  254. }
  255. exponent = OPT3001_REG_EXPONENT(opt->result);
  256. mantissa = OPT3001_REG_MANTISSA(opt->result);
  257. opt3001_to_iio_ret(opt, exponent, mantissa, val, val2);
  258. return IIO_VAL_INT_PLUS_MICRO;
  259. }
  260. static int opt3001_get_int_time(struct opt3001 *opt, int *val, int *val2)
  261. {
  262. *val = 0;
  263. *val2 = opt->int_time;
  264. return IIO_VAL_INT_PLUS_MICRO;
  265. }
  266. static int opt3001_set_int_time(struct opt3001 *opt, int time)
  267. {
  268. int ret;
  269. u16 reg;
  270. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  271. if (ret < 0) {
  272. dev_err(opt->dev, "failed to read register %02x\n",
  273. OPT3001_CONFIGURATION);
  274. return ret;
  275. }
  276. reg = ret;
  277. switch (time) {
  278. case 100000:
  279. reg &= ~OPT3001_CONFIGURATION_CT;
  280. opt->int_time = 100000;
  281. break;
  282. case 800000:
  283. reg |= OPT3001_CONFIGURATION_CT;
  284. opt->int_time = 800000;
  285. break;
  286. default:
  287. return -EINVAL;
  288. }
  289. return i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  290. reg);
  291. }
  292. static int opt3001_read_raw(struct iio_dev *iio,
  293. struct iio_chan_spec const *chan, int *val, int *val2,
  294. long mask)
  295. {
  296. struct opt3001 *opt = iio_priv(iio);
  297. int ret;
  298. if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
  299. return -EBUSY;
  300. if (chan->type != IIO_LIGHT)
  301. return -EINVAL;
  302. mutex_lock(&opt->lock);
  303. switch (mask) {
  304. case IIO_CHAN_INFO_PROCESSED:
  305. ret = opt3001_get_lux(opt, val, val2);
  306. break;
  307. case IIO_CHAN_INFO_INT_TIME:
  308. ret = opt3001_get_int_time(opt, val, val2);
  309. break;
  310. default:
  311. ret = -EINVAL;
  312. }
  313. mutex_unlock(&opt->lock);
  314. return ret;
  315. }
  316. static int opt3001_write_raw(struct iio_dev *iio,
  317. struct iio_chan_spec const *chan, int val, int val2,
  318. long mask)
  319. {
  320. struct opt3001 *opt = iio_priv(iio);
  321. int ret;
  322. if (opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
  323. return -EBUSY;
  324. if (chan->type != IIO_LIGHT)
  325. return -EINVAL;
  326. if (mask != IIO_CHAN_INFO_INT_TIME)
  327. return -EINVAL;
  328. if (val != 0)
  329. return -EINVAL;
  330. mutex_lock(&opt->lock);
  331. ret = opt3001_set_int_time(opt, val2);
  332. mutex_unlock(&opt->lock);
  333. return ret;
  334. }
  335. static int opt3001_read_event_value(struct iio_dev *iio,
  336. const struct iio_chan_spec *chan, enum iio_event_type type,
  337. enum iio_event_direction dir, enum iio_event_info info,
  338. int *val, int *val2)
  339. {
  340. struct opt3001 *opt = iio_priv(iio);
  341. int ret = IIO_VAL_INT_PLUS_MICRO;
  342. mutex_lock(&opt->lock);
  343. switch (dir) {
  344. case IIO_EV_DIR_RISING:
  345. opt3001_to_iio_ret(opt, opt->high_thresh_exp,
  346. opt->high_thresh_mantissa, val, val2);
  347. break;
  348. case IIO_EV_DIR_FALLING:
  349. opt3001_to_iio_ret(opt, opt->low_thresh_exp,
  350. opt->low_thresh_mantissa, val, val2);
  351. break;
  352. default:
  353. ret = -EINVAL;
  354. }
  355. mutex_unlock(&opt->lock);
  356. return ret;
  357. }
  358. static int opt3001_write_event_value(struct iio_dev *iio,
  359. const struct iio_chan_spec *chan, enum iio_event_type type,
  360. enum iio_event_direction dir, enum iio_event_info info,
  361. int val, int val2)
  362. {
  363. struct opt3001 *opt = iio_priv(iio);
  364. int ret;
  365. u16 mantissa;
  366. u16 value;
  367. u16 reg;
  368. u8 exponent;
  369. if (val < 0)
  370. return -EINVAL;
  371. mutex_lock(&opt->lock);
  372. ret = opt3001_find_scale(opt, val, val2, &exponent);
  373. if (ret < 0) {
  374. dev_err(opt->dev, "can't find scale for %d.%06u\n", val, val2);
  375. goto err;
  376. }
  377. mantissa = (((val * 1000) + (val2 / 1000)) / 10) >> exponent;
  378. value = (exponent << 12) | mantissa;
  379. switch (dir) {
  380. case IIO_EV_DIR_RISING:
  381. reg = OPT3001_HIGH_LIMIT;
  382. opt->high_thresh_mantissa = mantissa;
  383. opt->high_thresh_exp = exponent;
  384. break;
  385. case IIO_EV_DIR_FALLING:
  386. reg = OPT3001_LOW_LIMIT;
  387. opt->low_thresh_mantissa = mantissa;
  388. opt->low_thresh_exp = exponent;
  389. break;
  390. default:
  391. ret = -EINVAL;
  392. goto err;
  393. }
  394. ret = i2c_smbus_write_word_swapped(opt->client, reg, value);
  395. if (ret < 0) {
  396. dev_err(opt->dev, "failed to write register %02x\n", reg);
  397. goto err;
  398. }
  399. err:
  400. mutex_unlock(&opt->lock);
  401. return ret;
  402. }
  403. static int opt3001_read_event_config(struct iio_dev *iio,
  404. const struct iio_chan_spec *chan, enum iio_event_type type,
  405. enum iio_event_direction dir)
  406. {
  407. struct opt3001 *opt = iio_priv(iio);
  408. return opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS;
  409. }
  410. static int opt3001_write_event_config(struct iio_dev *iio,
  411. const struct iio_chan_spec *chan, enum iio_event_type type,
  412. enum iio_event_direction dir, int state)
  413. {
  414. struct opt3001 *opt = iio_priv(iio);
  415. int ret;
  416. u16 mode;
  417. u16 reg;
  418. if (state && opt->mode == OPT3001_CONFIGURATION_M_CONTINUOUS)
  419. return 0;
  420. if (!state && opt->mode == OPT3001_CONFIGURATION_M_SHUTDOWN)
  421. return 0;
  422. mutex_lock(&opt->lock);
  423. mode = state ? OPT3001_CONFIGURATION_M_CONTINUOUS
  424. : OPT3001_CONFIGURATION_M_SHUTDOWN;
  425. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  426. if (ret < 0) {
  427. dev_err(opt->dev, "failed to read register %02x\n",
  428. OPT3001_CONFIGURATION);
  429. goto err;
  430. }
  431. reg = ret;
  432. opt3001_set_mode(opt, &reg, mode);
  433. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  434. reg);
  435. if (ret < 0) {
  436. dev_err(opt->dev, "failed to write register %02x\n",
  437. OPT3001_CONFIGURATION);
  438. goto err;
  439. }
  440. err:
  441. mutex_unlock(&opt->lock);
  442. return ret;
  443. }
  444. static const struct iio_info opt3001_info = {
  445. .driver_module = THIS_MODULE,
  446. .attrs = &opt3001_attribute_group,
  447. .read_raw = opt3001_read_raw,
  448. .write_raw = opt3001_write_raw,
  449. .read_event_value = opt3001_read_event_value,
  450. .write_event_value = opt3001_write_event_value,
  451. .read_event_config = opt3001_read_event_config,
  452. .write_event_config = opt3001_write_event_config,
  453. };
  454. static int opt3001_read_id(struct opt3001 *opt)
  455. {
  456. char manufacturer[2];
  457. u16 device_id;
  458. int ret;
  459. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_MANUFACTURER_ID);
  460. if (ret < 0) {
  461. dev_err(opt->dev, "failed to read register %02x\n",
  462. OPT3001_MANUFACTURER_ID);
  463. return ret;
  464. }
  465. manufacturer[0] = ret >> 8;
  466. manufacturer[1] = ret & 0xff;
  467. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_DEVICE_ID);
  468. if (ret < 0) {
  469. dev_err(opt->dev, "failed to read register %02x\n",
  470. OPT3001_DEVICE_ID);
  471. return ret;
  472. }
  473. device_id = ret;
  474. dev_info(opt->dev, "Found %c%c OPT%04x\n", manufacturer[0],
  475. manufacturer[1], device_id);
  476. return 0;
  477. }
  478. static int opt3001_configure(struct opt3001 *opt)
  479. {
  480. int ret;
  481. u16 reg;
  482. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  483. if (ret < 0) {
  484. dev_err(opt->dev, "failed to read register %02x\n",
  485. OPT3001_CONFIGURATION);
  486. return ret;
  487. }
  488. reg = ret;
  489. /* Enable automatic full-scale setting mode */
  490. reg &= ~OPT3001_CONFIGURATION_RN_MASK;
  491. reg |= OPT3001_CONFIGURATION_RN_AUTO;
  492. /* Reflect status of the device's integration time setting */
  493. if (reg & OPT3001_CONFIGURATION_CT)
  494. opt->int_time = 800000;
  495. else
  496. opt->int_time = 100000;
  497. /* Ensure device is in shutdown initially */
  498. opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
  499. /* Configure for latched window-style comparison operation */
  500. reg |= OPT3001_CONFIGURATION_L;
  501. reg &= ~OPT3001_CONFIGURATION_POL;
  502. reg &= ~OPT3001_CONFIGURATION_ME;
  503. reg &= ~OPT3001_CONFIGURATION_FC_MASK;
  504. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  505. reg);
  506. if (ret < 0) {
  507. dev_err(opt->dev, "failed to write register %02x\n",
  508. OPT3001_CONFIGURATION);
  509. return ret;
  510. }
  511. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_LOW_LIMIT);
  512. if (ret < 0) {
  513. dev_err(opt->dev, "failed to read register %02x\n",
  514. OPT3001_LOW_LIMIT);
  515. return ret;
  516. }
  517. opt->low_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
  518. opt->low_thresh_exp = OPT3001_REG_EXPONENT(ret);
  519. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_HIGH_LIMIT);
  520. if (ret < 0) {
  521. dev_err(opt->dev, "failed to read register %02x\n",
  522. OPT3001_HIGH_LIMIT);
  523. return ret;
  524. }
  525. opt->high_thresh_mantissa = OPT3001_REG_MANTISSA(ret);
  526. opt->high_thresh_exp = OPT3001_REG_EXPONENT(ret);
  527. return 0;
  528. }
  529. static irqreturn_t opt3001_irq(int irq, void *_iio)
  530. {
  531. struct iio_dev *iio = _iio;
  532. struct opt3001 *opt = iio_priv(iio);
  533. int ret;
  534. if (!opt->ok_to_ignore_lock)
  535. mutex_lock(&opt->lock);
  536. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  537. if (ret < 0) {
  538. dev_err(opt->dev, "failed to read register %02x\n",
  539. OPT3001_CONFIGURATION);
  540. goto out;
  541. }
  542. if ((ret & OPT3001_CONFIGURATION_M_MASK) ==
  543. OPT3001_CONFIGURATION_M_CONTINUOUS) {
  544. if (ret & OPT3001_CONFIGURATION_FH)
  545. iio_push_event(iio,
  546. IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
  547. IIO_EV_TYPE_THRESH,
  548. IIO_EV_DIR_RISING),
  549. iio_get_time_ns());
  550. if (ret & OPT3001_CONFIGURATION_FL)
  551. iio_push_event(iio,
  552. IIO_UNMOD_EVENT_CODE(IIO_LIGHT, 0,
  553. IIO_EV_TYPE_THRESH,
  554. IIO_EV_DIR_FALLING),
  555. iio_get_time_ns());
  556. } else if (ret & OPT3001_CONFIGURATION_CRF) {
  557. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_RESULT);
  558. if (ret < 0) {
  559. dev_err(opt->dev, "failed to read register %02x\n",
  560. OPT3001_RESULT);
  561. goto out;
  562. }
  563. opt->result = ret;
  564. opt->result_ready = true;
  565. wake_up(&opt->result_ready_queue);
  566. }
  567. out:
  568. if (!opt->ok_to_ignore_lock)
  569. mutex_unlock(&opt->lock);
  570. return IRQ_HANDLED;
  571. }
  572. static int opt3001_probe(struct i2c_client *client,
  573. const struct i2c_device_id *id)
  574. {
  575. struct device *dev = &client->dev;
  576. struct iio_dev *iio;
  577. struct opt3001 *opt;
  578. int irq = client->irq;
  579. int ret;
  580. iio = devm_iio_device_alloc(dev, sizeof(*opt));
  581. if (!iio)
  582. return -ENOMEM;
  583. opt = iio_priv(iio);
  584. opt->client = client;
  585. opt->dev = dev;
  586. mutex_init(&opt->lock);
  587. init_waitqueue_head(&opt->result_ready_queue);
  588. i2c_set_clientdata(client, iio);
  589. ret = opt3001_read_id(opt);
  590. if (ret)
  591. return ret;
  592. ret = opt3001_configure(opt);
  593. if (ret)
  594. return ret;
  595. iio->name = client->name;
  596. iio->channels = opt3001_channels;
  597. iio->num_channels = ARRAY_SIZE(opt3001_channels);
  598. iio->dev.parent = dev;
  599. iio->modes = INDIO_DIRECT_MODE;
  600. iio->info = &opt3001_info;
  601. ret = devm_iio_device_register(dev, iio);
  602. if (ret) {
  603. dev_err(dev, "failed to register IIO device\n");
  604. return ret;
  605. }
  606. ret = request_threaded_irq(irq, NULL, opt3001_irq,
  607. IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
  608. "opt3001", iio);
  609. if (ret) {
  610. dev_err(dev, "failed to request IRQ #%d\n", irq);
  611. return ret;
  612. }
  613. return 0;
  614. }
  615. static int opt3001_remove(struct i2c_client *client)
  616. {
  617. struct iio_dev *iio = i2c_get_clientdata(client);
  618. struct opt3001 *opt = iio_priv(iio);
  619. int ret;
  620. u16 reg;
  621. free_irq(client->irq, iio);
  622. ret = i2c_smbus_read_word_swapped(opt->client, OPT3001_CONFIGURATION);
  623. if (ret < 0) {
  624. dev_err(opt->dev, "failed to read register %02x\n",
  625. OPT3001_CONFIGURATION);
  626. return ret;
  627. }
  628. reg = ret;
  629. opt3001_set_mode(opt, &reg, OPT3001_CONFIGURATION_M_SHUTDOWN);
  630. ret = i2c_smbus_write_word_swapped(opt->client, OPT3001_CONFIGURATION,
  631. reg);
  632. if (ret < 0) {
  633. dev_err(opt->dev, "failed to write register %02x\n",
  634. OPT3001_CONFIGURATION);
  635. return ret;
  636. }
  637. return 0;
  638. }
  639. static const struct i2c_device_id opt3001_id[] = {
  640. { "opt3001", 0 },
  641. { } /* Terminating Entry */
  642. };
  643. MODULE_DEVICE_TABLE(i2c, opt3001_id);
  644. static const struct of_device_id opt3001_of_match[] = {
  645. { .compatible = "ti,opt3001" },
  646. { }
  647. };
  648. static struct i2c_driver opt3001_driver = {
  649. .probe = opt3001_probe,
  650. .remove = opt3001_remove,
  651. .id_table = opt3001_id,
  652. .driver = {
  653. .name = "opt3001",
  654. .of_match_table = of_match_ptr(opt3001_of_match),
  655. },
  656. };
  657. module_i2c_driver(opt3001_driver);
  658. MODULE_LICENSE("GPL v2");
  659. MODULE_AUTHOR("Andreas Dannenberg <dannenberg@ti.com>");
  660. MODULE_DESCRIPTION("Texas Instruments OPT3001 Light Sensor Driver");