bmc150_magn.c 27 KB

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  1. /*
  2. * Bosch BMC150 three-axis magnetic field sensor driver
  3. *
  4. * Copyright (c) 2015, Intel Corporation.
  5. *
  6. * This code is based on bmm050_api.c authored by contact@bosch.sensortec.com:
  7. *
  8. * (C) Copyright 2011~2014 Bosch Sensortec GmbH All Rights Reserved
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms and conditions of the GNU General Public License,
  12. * version 2, as published by the Free Software Foundation.
  13. *
  14. * This program is distributed in the hope it will be useful, but WITHOUT
  15. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  16. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  17. * more details.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/i2c.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/acpi.h>
  25. #include <linux/gpio/consumer.h>
  26. #include <linux/pm.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/iio/iio.h>
  29. #include <linux/iio/sysfs.h>
  30. #include <linux/iio/buffer.h>
  31. #include <linux/iio/events.h>
  32. #include <linux/iio/trigger.h>
  33. #include <linux/iio/trigger_consumer.h>
  34. #include <linux/iio/triggered_buffer.h>
  35. #include <linux/regmap.h>
  36. #define BMC150_MAGN_DRV_NAME "bmc150_magn"
  37. #define BMC150_MAGN_IRQ_NAME "bmc150_magn_event"
  38. #define BMC150_MAGN_REG_CHIP_ID 0x40
  39. #define BMC150_MAGN_CHIP_ID_VAL 0x32
  40. #define BMC150_MAGN_REG_X_L 0x42
  41. #define BMC150_MAGN_REG_X_M 0x43
  42. #define BMC150_MAGN_REG_Y_L 0x44
  43. #define BMC150_MAGN_REG_Y_M 0x45
  44. #define BMC150_MAGN_SHIFT_XY_L 3
  45. #define BMC150_MAGN_REG_Z_L 0x46
  46. #define BMC150_MAGN_REG_Z_M 0x47
  47. #define BMC150_MAGN_SHIFT_Z_L 1
  48. #define BMC150_MAGN_REG_RHALL_L 0x48
  49. #define BMC150_MAGN_REG_RHALL_M 0x49
  50. #define BMC150_MAGN_SHIFT_RHALL_L 2
  51. #define BMC150_MAGN_REG_INT_STATUS 0x4A
  52. #define BMC150_MAGN_REG_POWER 0x4B
  53. #define BMC150_MAGN_MASK_POWER_CTL BIT(0)
  54. #define BMC150_MAGN_REG_OPMODE_ODR 0x4C
  55. #define BMC150_MAGN_MASK_OPMODE GENMASK(2, 1)
  56. #define BMC150_MAGN_SHIFT_OPMODE 1
  57. #define BMC150_MAGN_MODE_NORMAL 0x00
  58. #define BMC150_MAGN_MODE_FORCED 0x01
  59. #define BMC150_MAGN_MODE_SLEEP 0x03
  60. #define BMC150_MAGN_MASK_ODR GENMASK(5, 3)
  61. #define BMC150_MAGN_SHIFT_ODR 3
  62. #define BMC150_MAGN_REG_INT 0x4D
  63. #define BMC150_MAGN_REG_INT_DRDY 0x4E
  64. #define BMC150_MAGN_MASK_DRDY_EN BIT(7)
  65. #define BMC150_MAGN_SHIFT_DRDY_EN 7
  66. #define BMC150_MAGN_MASK_DRDY_INT3 BIT(6)
  67. #define BMC150_MAGN_MASK_DRDY_Z_EN BIT(5)
  68. #define BMC150_MAGN_MASK_DRDY_Y_EN BIT(4)
  69. #define BMC150_MAGN_MASK_DRDY_X_EN BIT(3)
  70. #define BMC150_MAGN_MASK_DRDY_DR_POLARITY BIT(2)
  71. #define BMC150_MAGN_MASK_DRDY_LATCHING BIT(1)
  72. #define BMC150_MAGN_MASK_DRDY_INT3_POLARITY BIT(0)
  73. #define BMC150_MAGN_REG_LOW_THRESH 0x4F
  74. #define BMC150_MAGN_REG_HIGH_THRESH 0x50
  75. #define BMC150_MAGN_REG_REP_XY 0x51
  76. #define BMC150_MAGN_REG_REP_Z 0x52
  77. #define BMC150_MAGN_REG_REP_DATAMASK GENMASK(7, 0)
  78. #define BMC150_MAGN_REG_TRIM_START 0x5D
  79. #define BMC150_MAGN_REG_TRIM_END 0x71
  80. #define BMC150_MAGN_XY_OVERFLOW_VAL -4096
  81. #define BMC150_MAGN_Z_OVERFLOW_VAL -16384
  82. /* Time from SUSPEND to SLEEP */
  83. #define BMC150_MAGN_START_UP_TIME_MS 3
  84. #define BMC150_MAGN_AUTO_SUSPEND_DELAY_MS 2000
  85. #define BMC150_MAGN_REGVAL_TO_REPXY(regval) (((regval) * 2) + 1)
  86. #define BMC150_MAGN_REGVAL_TO_REPZ(regval) ((regval) + 1)
  87. #define BMC150_MAGN_REPXY_TO_REGVAL(rep) (((rep) - 1) / 2)
  88. #define BMC150_MAGN_REPZ_TO_REGVAL(rep) ((rep) - 1)
  89. enum bmc150_magn_axis {
  90. AXIS_X,
  91. AXIS_Y,
  92. AXIS_Z,
  93. RHALL,
  94. AXIS_XYZ_MAX = RHALL,
  95. AXIS_XYZR_MAX,
  96. };
  97. enum bmc150_magn_power_modes {
  98. BMC150_MAGN_POWER_MODE_SUSPEND,
  99. BMC150_MAGN_POWER_MODE_SLEEP,
  100. BMC150_MAGN_POWER_MODE_NORMAL,
  101. };
  102. struct bmc150_magn_trim_regs {
  103. s8 x1;
  104. s8 y1;
  105. __le16 reserved1;
  106. u8 reserved2;
  107. __le16 z4;
  108. s8 x2;
  109. s8 y2;
  110. __le16 reserved3;
  111. __le16 z2;
  112. __le16 z1;
  113. __le16 xyz1;
  114. __le16 z3;
  115. s8 xy2;
  116. u8 xy1;
  117. } __packed;
  118. struct bmc150_magn_data {
  119. struct i2c_client *client;
  120. /*
  121. * 1. Protect this structure.
  122. * 2. Serialize sequences that power on/off the device and access HW.
  123. */
  124. struct mutex mutex;
  125. struct regmap *regmap;
  126. /* 4 x 32 bits for x, y z, 4 bytes align, 64 bits timestamp */
  127. s32 buffer[6];
  128. struct iio_trigger *dready_trig;
  129. bool dready_trigger_on;
  130. int max_odr;
  131. };
  132. static const struct {
  133. int freq;
  134. u8 reg_val;
  135. } bmc150_magn_samp_freq_table[] = { {2, 0x01},
  136. {6, 0x02},
  137. {8, 0x03},
  138. {10, 0x00},
  139. {15, 0x04},
  140. {20, 0x05},
  141. {25, 0x06},
  142. {30, 0x07} };
  143. enum bmc150_magn_presets {
  144. LOW_POWER_PRESET,
  145. REGULAR_PRESET,
  146. ENHANCED_REGULAR_PRESET,
  147. HIGH_ACCURACY_PRESET
  148. };
  149. static const struct bmc150_magn_preset {
  150. u8 rep_xy;
  151. u8 rep_z;
  152. u8 odr;
  153. } bmc150_magn_presets_table[] = {
  154. [LOW_POWER_PRESET] = {3, 3, 10},
  155. [REGULAR_PRESET] = {9, 15, 10},
  156. [ENHANCED_REGULAR_PRESET] = {15, 27, 10},
  157. [HIGH_ACCURACY_PRESET] = {47, 83, 20},
  158. };
  159. #define BMC150_MAGN_DEFAULT_PRESET REGULAR_PRESET
  160. static bool bmc150_magn_is_writeable_reg(struct device *dev, unsigned int reg)
  161. {
  162. switch (reg) {
  163. case BMC150_MAGN_REG_POWER:
  164. case BMC150_MAGN_REG_OPMODE_ODR:
  165. case BMC150_MAGN_REG_INT:
  166. case BMC150_MAGN_REG_INT_DRDY:
  167. case BMC150_MAGN_REG_LOW_THRESH:
  168. case BMC150_MAGN_REG_HIGH_THRESH:
  169. case BMC150_MAGN_REG_REP_XY:
  170. case BMC150_MAGN_REG_REP_Z:
  171. return true;
  172. default:
  173. return false;
  174. };
  175. }
  176. static bool bmc150_magn_is_volatile_reg(struct device *dev, unsigned int reg)
  177. {
  178. switch (reg) {
  179. case BMC150_MAGN_REG_X_L:
  180. case BMC150_MAGN_REG_X_M:
  181. case BMC150_MAGN_REG_Y_L:
  182. case BMC150_MAGN_REG_Y_M:
  183. case BMC150_MAGN_REG_Z_L:
  184. case BMC150_MAGN_REG_Z_M:
  185. case BMC150_MAGN_REG_RHALL_L:
  186. case BMC150_MAGN_REG_RHALL_M:
  187. case BMC150_MAGN_REG_INT_STATUS:
  188. return true;
  189. default:
  190. return false;
  191. }
  192. }
  193. static const struct regmap_config bmc150_magn_regmap_config = {
  194. .reg_bits = 8,
  195. .val_bits = 8,
  196. .max_register = BMC150_MAGN_REG_TRIM_END,
  197. .cache_type = REGCACHE_RBTREE,
  198. .writeable_reg = bmc150_magn_is_writeable_reg,
  199. .volatile_reg = bmc150_magn_is_volatile_reg,
  200. };
  201. static int bmc150_magn_set_power_mode(struct bmc150_magn_data *data,
  202. enum bmc150_magn_power_modes mode,
  203. bool state)
  204. {
  205. int ret;
  206. switch (mode) {
  207. case BMC150_MAGN_POWER_MODE_SUSPEND:
  208. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_POWER,
  209. BMC150_MAGN_MASK_POWER_CTL, !state);
  210. if (ret < 0)
  211. return ret;
  212. usleep_range(BMC150_MAGN_START_UP_TIME_MS * 1000, 20000);
  213. return 0;
  214. case BMC150_MAGN_POWER_MODE_SLEEP:
  215. return regmap_update_bits(data->regmap,
  216. BMC150_MAGN_REG_OPMODE_ODR,
  217. BMC150_MAGN_MASK_OPMODE,
  218. BMC150_MAGN_MODE_SLEEP <<
  219. BMC150_MAGN_SHIFT_OPMODE);
  220. case BMC150_MAGN_POWER_MODE_NORMAL:
  221. return regmap_update_bits(data->regmap,
  222. BMC150_MAGN_REG_OPMODE_ODR,
  223. BMC150_MAGN_MASK_OPMODE,
  224. BMC150_MAGN_MODE_NORMAL <<
  225. BMC150_MAGN_SHIFT_OPMODE);
  226. }
  227. return -EINVAL;
  228. }
  229. static int bmc150_magn_set_power_state(struct bmc150_magn_data *data, bool on)
  230. {
  231. #ifdef CONFIG_PM
  232. int ret;
  233. if (on) {
  234. ret = pm_runtime_get_sync(&data->client->dev);
  235. } else {
  236. pm_runtime_mark_last_busy(&data->client->dev);
  237. ret = pm_runtime_put_autosuspend(&data->client->dev);
  238. }
  239. if (ret < 0) {
  240. dev_err(&data->client->dev,
  241. "failed to change power state to %d\n", on);
  242. if (on)
  243. pm_runtime_put_noidle(&data->client->dev);
  244. return ret;
  245. }
  246. #endif
  247. return 0;
  248. }
  249. static int bmc150_magn_get_odr(struct bmc150_magn_data *data, int *val)
  250. {
  251. int ret, reg_val;
  252. u8 i, odr_val;
  253. ret = regmap_read(data->regmap, BMC150_MAGN_REG_OPMODE_ODR, &reg_val);
  254. if (ret < 0)
  255. return ret;
  256. odr_val = (reg_val & BMC150_MAGN_MASK_ODR) >> BMC150_MAGN_SHIFT_ODR;
  257. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++)
  258. if (bmc150_magn_samp_freq_table[i].reg_val == odr_val) {
  259. *val = bmc150_magn_samp_freq_table[i].freq;
  260. return 0;
  261. }
  262. return -EINVAL;
  263. }
  264. static int bmc150_magn_set_odr(struct bmc150_magn_data *data, int val)
  265. {
  266. int ret;
  267. u8 i;
  268. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  269. if (bmc150_magn_samp_freq_table[i].freq == val) {
  270. ret = regmap_update_bits(data->regmap,
  271. BMC150_MAGN_REG_OPMODE_ODR,
  272. BMC150_MAGN_MASK_ODR,
  273. bmc150_magn_samp_freq_table[i].
  274. reg_val <<
  275. BMC150_MAGN_SHIFT_ODR);
  276. if (ret < 0)
  277. return ret;
  278. return 0;
  279. }
  280. }
  281. return -EINVAL;
  282. }
  283. static int bmc150_magn_set_max_odr(struct bmc150_magn_data *data, int rep_xy,
  284. int rep_z, int odr)
  285. {
  286. int ret, reg_val, max_odr;
  287. if (rep_xy <= 0) {
  288. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  289. &reg_val);
  290. if (ret < 0)
  291. return ret;
  292. rep_xy = BMC150_MAGN_REGVAL_TO_REPXY(reg_val);
  293. }
  294. if (rep_z <= 0) {
  295. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  296. &reg_val);
  297. if (ret < 0)
  298. return ret;
  299. rep_z = BMC150_MAGN_REGVAL_TO_REPZ(reg_val);
  300. }
  301. if (odr <= 0) {
  302. ret = bmc150_magn_get_odr(data, &odr);
  303. if (ret < 0)
  304. return ret;
  305. }
  306. /* the maximum selectable read-out frequency from datasheet */
  307. max_odr = 1000000 / (145 * rep_xy + 500 * rep_z + 980);
  308. if (odr > max_odr) {
  309. dev_err(&data->client->dev,
  310. "Can't set oversampling with sampling freq %d\n",
  311. odr);
  312. return -EINVAL;
  313. }
  314. data->max_odr = max_odr;
  315. return 0;
  316. }
  317. static s32 bmc150_magn_compensate_x(struct bmc150_magn_trim_regs *tregs, s16 x,
  318. u16 rhall)
  319. {
  320. s16 val;
  321. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  322. if (x == BMC150_MAGN_XY_OVERFLOW_VAL)
  323. return S32_MIN;
  324. if (!rhall)
  325. rhall = xyz1;
  326. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  327. val = ((s16)((((s32)x) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  328. ((s32)val)) >> 7)) + (((s32)val) *
  329. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  330. ((s32)(((s16)tregs->x2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  331. (((s16)tregs->x1) << 3);
  332. return (s32)val;
  333. }
  334. static s32 bmc150_magn_compensate_y(struct bmc150_magn_trim_regs *tregs, s16 y,
  335. u16 rhall)
  336. {
  337. s16 val;
  338. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  339. if (y == BMC150_MAGN_XY_OVERFLOW_VAL)
  340. return S32_MIN;
  341. if (!rhall)
  342. rhall = xyz1;
  343. val = ((s16)(((u16)((((s32)xyz1) << 14) / rhall)) - ((u16)0x4000)));
  344. val = ((s16)((((s32)y) * ((((((((s32)tregs->xy2) * ((((s32)val) *
  345. ((s32)val)) >> 7)) + (((s32)val) *
  346. ((s32)(((s16)tregs->xy1) << 7)))) >> 9) + ((s32)0x100000)) *
  347. ((s32)(((s16)tregs->y2) + ((s16)0xA0)))) >> 12)) >> 13)) +
  348. (((s16)tregs->y1) << 3);
  349. return (s32)val;
  350. }
  351. static s32 bmc150_magn_compensate_z(struct bmc150_magn_trim_regs *tregs, s16 z,
  352. u16 rhall)
  353. {
  354. s32 val;
  355. u16 xyz1 = le16_to_cpu(tregs->xyz1);
  356. u16 z1 = le16_to_cpu(tregs->z1);
  357. s16 z2 = le16_to_cpu(tregs->z2);
  358. s16 z3 = le16_to_cpu(tregs->z3);
  359. s16 z4 = le16_to_cpu(tregs->z4);
  360. if (z == BMC150_MAGN_Z_OVERFLOW_VAL)
  361. return S32_MIN;
  362. val = (((((s32)(z - z4)) << 15) - ((((s32)z3) * ((s32)(((s16)rhall) -
  363. ((s16)xyz1)))) >> 2)) / (z2 + ((s16)(((((s32)z1) *
  364. ((((s16)rhall) << 1))) + (1 << 15)) >> 16))));
  365. return val;
  366. }
  367. static int bmc150_magn_read_xyz(struct bmc150_magn_data *data, s32 *buffer)
  368. {
  369. int ret;
  370. __le16 values[AXIS_XYZR_MAX];
  371. s16 raw_x, raw_y, raw_z;
  372. u16 rhall;
  373. struct bmc150_magn_trim_regs tregs;
  374. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_X_L,
  375. values, sizeof(values));
  376. if (ret < 0)
  377. return ret;
  378. raw_x = (s16)le16_to_cpu(values[AXIS_X]) >> BMC150_MAGN_SHIFT_XY_L;
  379. raw_y = (s16)le16_to_cpu(values[AXIS_Y]) >> BMC150_MAGN_SHIFT_XY_L;
  380. raw_z = (s16)le16_to_cpu(values[AXIS_Z]) >> BMC150_MAGN_SHIFT_Z_L;
  381. rhall = le16_to_cpu(values[RHALL]) >> BMC150_MAGN_SHIFT_RHALL_L;
  382. ret = regmap_bulk_read(data->regmap, BMC150_MAGN_REG_TRIM_START,
  383. &tregs, sizeof(tregs));
  384. if (ret < 0)
  385. return ret;
  386. buffer[AXIS_X] = bmc150_magn_compensate_x(&tregs, raw_x, rhall);
  387. buffer[AXIS_Y] = bmc150_magn_compensate_y(&tregs, raw_y, rhall);
  388. buffer[AXIS_Z] = bmc150_magn_compensate_z(&tregs, raw_z, rhall);
  389. return 0;
  390. }
  391. static int bmc150_magn_read_raw(struct iio_dev *indio_dev,
  392. struct iio_chan_spec const *chan,
  393. int *val, int *val2, long mask)
  394. {
  395. struct bmc150_magn_data *data = iio_priv(indio_dev);
  396. int ret, tmp;
  397. s32 values[AXIS_XYZ_MAX];
  398. switch (mask) {
  399. case IIO_CHAN_INFO_RAW:
  400. if (iio_buffer_enabled(indio_dev))
  401. return -EBUSY;
  402. mutex_lock(&data->mutex);
  403. ret = bmc150_magn_set_power_state(data, true);
  404. if (ret < 0) {
  405. mutex_unlock(&data->mutex);
  406. return ret;
  407. }
  408. ret = bmc150_magn_read_xyz(data, values);
  409. if (ret < 0) {
  410. bmc150_magn_set_power_state(data, false);
  411. mutex_unlock(&data->mutex);
  412. return ret;
  413. }
  414. *val = values[chan->scan_index];
  415. ret = bmc150_magn_set_power_state(data, false);
  416. if (ret < 0) {
  417. mutex_unlock(&data->mutex);
  418. return ret;
  419. }
  420. mutex_unlock(&data->mutex);
  421. return IIO_VAL_INT;
  422. case IIO_CHAN_INFO_SCALE:
  423. /*
  424. * The API/driver performs an off-chip temperature
  425. * compensation and outputs x/y/z magnetic field data in
  426. * 16 LSB/uT to the upper application layer.
  427. */
  428. *val = 0;
  429. *val2 = 625;
  430. return IIO_VAL_INT_PLUS_MICRO;
  431. case IIO_CHAN_INFO_SAMP_FREQ:
  432. ret = bmc150_magn_get_odr(data, val);
  433. if (ret < 0)
  434. return ret;
  435. return IIO_VAL_INT;
  436. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  437. switch (chan->channel2) {
  438. case IIO_MOD_X:
  439. case IIO_MOD_Y:
  440. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_XY,
  441. &tmp);
  442. if (ret < 0)
  443. return ret;
  444. *val = BMC150_MAGN_REGVAL_TO_REPXY(tmp);
  445. return IIO_VAL_INT;
  446. case IIO_MOD_Z:
  447. ret = regmap_read(data->regmap, BMC150_MAGN_REG_REP_Z,
  448. &tmp);
  449. if (ret < 0)
  450. return ret;
  451. *val = BMC150_MAGN_REGVAL_TO_REPZ(tmp);
  452. return IIO_VAL_INT;
  453. default:
  454. return -EINVAL;
  455. }
  456. default:
  457. return -EINVAL;
  458. }
  459. }
  460. static int bmc150_magn_write_raw(struct iio_dev *indio_dev,
  461. struct iio_chan_spec const *chan,
  462. int val, int val2, long mask)
  463. {
  464. struct bmc150_magn_data *data = iio_priv(indio_dev);
  465. int ret;
  466. switch (mask) {
  467. case IIO_CHAN_INFO_SAMP_FREQ:
  468. if (val > data->max_odr)
  469. return -EINVAL;
  470. mutex_lock(&data->mutex);
  471. ret = bmc150_magn_set_odr(data, val);
  472. mutex_unlock(&data->mutex);
  473. return ret;
  474. case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
  475. switch (chan->channel2) {
  476. case IIO_MOD_X:
  477. case IIO_MOD_Y:
  478. if (val < 1 || val > 511)
  479. return -EINVAL;
  480. mutex_lock(&data->mutex);
  481. ret = bmc150_magn_set_max_odr(data, val, 0, 0);
  482. if (ret < 0) {
  483. mutex_unlock(&data->mutex);
  484. return ret;
  485. }
  486. ret = regmap_update_bits(data->regmap,
  487. BMC150_MAGN_REG_REP_XY,
  488. BMC150_MAGN_REG_REP_DATAMASK,
  489. BMC150_MAGN_REPXY_TO_REGVAL
  490. (val));
  491. mutex_unlock(&data->mutex);
  492. return ret;
  493. case IIO_MOD_Z:
  494. if (val < 1 || val > 256)
  495. return -EINVAL;
  496. mutex_lock(&data->mutex);
  497. ret = bmc150_magn_set_max_odr(data, 0, val, 0);
  498. if (ret < 0) {
  499. mutex_unlock(&data->mutex);
  500. return ret;
  501. }
  502. ret = regmap_update_bits(data->regmap,
  503. BMC150_MAGN_REG_REP_Z,
  504. BMC150_MAGN_REG_REP_DATAMASK,
  505. BMC150_MAGN_REPZ_TO_REGVAL
  506. (val));
  507. mutex_unlock(&data->mutex);
  508. return ret;
  509. default:
  510. return -EINVAL;
  511. }
  512. default:
  513. return -EINVAL;
  514. }
  515. }
  516. static ssize_t bmc150_magn_show_samp_freq_avail(struct device *dev,
  517. struct device_attribute *attr,
  518. char *buf)
  519. {
  520. struct iio_dev *indio_dev = dev_to_iio_dev(dev);
  521. struct bmc150_magn_data *data = iio_priv(indio_dev);
  522. size_t len = 0;
  523. u8 i;
  524. for (i = 0; i < ARRAY_SIZE(bmc150_magn_samp_freq_table); i++) {
  525. if (bmc150_magn_samp_freq_table[i].freq > data->max_odr)
  526. break;
  527. len += scnprintf(buf + len, PAGE_SIZE - len, "%d ",
  528. bmc150_magn_samp_freq_table[i].freq);
  529. }
  530. /* replace last space with a newline */
  531. buf[len - 1] = '\n';
  532. return len;
  533. }
  534. static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(bmc150_magn_show_samp_freq_avail);
  535. static struct attribute *bmc150_magn_attributes[] = {
  536. &iio_dev_attr_sampling_frequency_available.dev_attr.attr,
  537. NULL,
  538. };
  539. static const struct attribute_group bmc150_magn_attrs_group = {
  540. .attrs = bmc150_magn_attributes,
  541. };
  542. #define BMC150_MAGN_CHANNEL(_axis) { \
  543. .type = IIO_MAGN, \
  544. .modified = 1, \
  545. .channel2 = IIO_MOD_##_axis, \
  546. .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
  547. BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
  548. .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
  549. BIT(IIO_CHAN_INFO_SCALE), \
  550. .scan_index = AXIS_##_axis, \
  551. .scan_type = { \
  552. .sign = 's', \
  553. .realbits = 32, \
  554. .storagebits = 32, \
  555. .endianness = IIO_LE \
  556. }, \
  557. }
  558. static const struct iio_chan_spec bmc150_magn_channels[] = {
  559. BMC150_MAGN_CHANNEL(X),
  560. BMC150_MAGN_CHANNEL(Y),
  561. BMC150_MAGN_CHANNEL(Z),
  562. IIO_CHAN_SOFT_TIMESTAMP(3),
  563. };
  564. static const struct iio_info bmc150_magn_info = {
  565. .attrs = &bmc150_magn_attrs_group,
  566. .read_raw = bmc150_magn_read_raw,
  567. .write_raw = bmc150_magn_write_raw,
  568. .driver_module = THIS_MODULE,
  569. };
  570. static const unsigned long bmc150_magn_scan_masks[] = {
  571. BIT(AXIS_X) | BIT(AXIS_Y) | BIT(AXIS_Z),
  572. 0};
  573. static irqreturn_t bmc150_magn_trigger_handler(int irq, void *p)
  574. {
  575. struct iio_poll_func *pf = p;
  576. struct iio_dev *indio_dev = pf->indio_dev;
  577. struct bmc150_magn_data *data = iio_priv(indio_dev);
  578. int ret;
  579. mutex_lock(&data->mutex);
  580. ret = bmc150_magn_read_xyz(data, data->buffer);
  581. if (ret < 0)
  582. goto err;
  583. iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
  584. pf->timestamp);
  585. err:
  586. mutex_unlock(&data->mutex);
  587. iio_trigger_notify_done(indio_dev->trig);
  588. return IRQ_HANDLED;
  589. }
  590. static int bmc150_magn_init(struct bmc150_magn_data *data)
  591. {
  592. int ret, chip_id;
  593. struct bmc150_magn_preset preset;
  594. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND,
  595. false);
  596. if (ret < 0) {
  597. dev_err(&data->client->dev,
  598. "Failed to bring up device from suspend mode\n");
  599. return ret;
  600. }
  601. ret = regmap_read(data->regmap, BMC150_MAGN_REG_CHIP_ID, &chip_id);
  602. if (ret < 0) {
  603. dev_err(&data->client->dev, "Failed reading chip id\n");
  604. goto err_poweroff;
  605. }
  606. if (chip_id != BMC150_MAGN_CHIP_ID_VAL) {
  607. dev_err(&data->client->dev, "Invalid chip id 0x%x\n", chip_id);
  608. ret = -ENODEV;
  609. goto err_poweroff;
  610. }
  611. dev_dbg(&data->client->dev, "Chip id %x\n", chip_id);
  612. preset = bmc150_magn_presets_table[BMC150_MAGN_DEFAULT_PRESET];
  613. ret = bmc150_magn_set_odr(data, preset.odr);
  614. if (ret < 0) {
  615. dev_err(&data->client->dev, "Failed to set ODR to %d\n",
  616. preset.odr);
  617. goto err_poweroff;
  618. }
  619. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_XY,
  620. BMC150_MAGN_REPXY_TO_REGVAL(preset.rep_xy));
  621. if (ret < 0) {
  622. dev_err(&data->client->dev, "Failed to set REP XY to %d\n",
  623. preset.rep_xy);
  624. goto err_poweroff;
  625. }
  626. ret = regmap_write(data->regmap, BMC150_MAGN_REG_REP_Z,
  627. BMC150_MAGN_REPZ_TO_REGVAL(preset.rep_z));
  628. if (ret < 0) {
  629. dev_err(&data->client->dev, "Failed to set REP Z to %d\n",
  630. preset.rep_z);
  631. goto err_poweroff;
  632. }
  633. ret = bmc150_magn_set_max_odr(data, preset.rep_xy, preset.rep_z,
  634. preset.odr);
  635. if (ret < 0)
  636. goto err_poweroff;
  637. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  638. true);
  639. if (ret < 0) {
  640. dev_err(&data->client->dev, "Failed to power on device\n");
  641. goto err_poweroff;
  642. }
  643. return 0;
  644. err_poweroff:
  645. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  646. return ret;
  647. }
  648. static int bmc150_magn_reset_intr(struct bmc150_magn_data *data)
  649. {
  650. int tmp;
  651. /*
  652. * Data Ready (DRDY) is always cleared after
  653. * readout of data registers ends.
  654. */
  655. return regmap_read(data->regmap, BMC150_MAGN_REG_X_L, &tmp);
  656. }
  657. static int bmc150_magn_trig_try_reen(struct iio_trigger *trig)
  658. {
  659. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  660. struct bmc150_magn_data *data = iio_priv(indio_dev);
  661. int ret;
  662. if (!data->dready_trigger_on)
  663. return 0;
  664. mutex_lock(&data->mutex);
  665. ret = bmc150_magn_reset_intr(data);
  666. mutex_unlock(&data->mutex);
  667. return ret;
  668. }
  669. static int bmc150_magn_data_rdy_trigger_set_state(struct iio_trigger *trig,
  670. bool state)
  671. {
  672. struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
  673. struct bmc150_magn_data *data = iio_priv(indio_dev);
  674. int ret = 0;
  675. mutex_lock(&data->mutex);
  676. if (state == data->dready_trigger_on)
  677. goto err_unlock;
  678. ret = regmap_update_bits(data->regmap, BMC150_MAGN_REG_INT_DRDY,
  679. BMC150_MAGN_MASK_DRDY_EN,
  680. state << BMC150_MAGN_SHIFT_DRDY_EN);
  681. if (ret < 0)
  682. goto err_unlock;
  683. data->dready_trigger_on = state;
  684. if (state) {
  685. ret = bmc150_magn_reset_intr(data);
  686. if (ret < 0)
  687. goto err_unlock;
  688. }
  689. mutex_unlock(&data->mutex);
  690. return 0;
  691. err_unlock:
  692. mutex_unlock(&data->mutex);
  693. return ret;
  694. }
  695. static const struct iio_trigger_ops bmc150_magn_trigger_ops = {
  696. .set_trigger_state = bmc150_magn_data_rdy_trigger_set_state,
  697. .try_reenable = bmc150_magn_trig_try_reen,
  698. .owner = THIS_MODULE,
  699. };
  700. static int bmc150_magn_buffer_preenable(struct iio_dev *indio_dev)
  701. {
  702. struct bmc150_magn_data *data = iio_priv(indio_dev);
  703. return bmc150_magn_set_power_state(data, true);
  704. }
  705. static int bmc150_magn_buffer_postdisable(struct iio_dev *indio_dev)
  706. {
  707. struct bmc150_magn_data *data = iio_priv(indio_dev);
  708. return bmc150_magn_set_power_state(data, false);
  709. }
  710. static const struct iio_buffer_setup_ops bmc150_magn_buffer_setup_ops = {
  711. .preenable = bmc150_magn_buffer_preenable,
  712. .postenable = iio_triggered_buffer_postenable,
  713. .predisable = iio_triggered_buffer_predisable,
  714. .postdisable = bmc150_magn_buffer_postdisable,
  715. };
  716. static const char *bmc150_magn_match_acpi_device(struct device *dev)
  717. {
  718. const struct acpi_device_id *id;
  719. id = acpi_match_device(dev->driver->acpi_match_table, dev);
  720. if (!id)
  721. return NULL;
  722. return dev_name(dev);
  723. }
  724. static int bmc150_magn_probe(struct i2c_client *client,
  725. const struct i2c_device_id *id)
  726. {
  727. struct bmc150_magn_data *data;
  728. struct iio_dev *indio_dev;
  729. const char *name = NULL;
  730. int ret;
  731. indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
  732. if (!indio_dev)
  733. return -ENOMEM;
  734. data = iio_priv(indio_dev);
  735. i2c_set_clientdata(client, indio_dev);
  736. data->client = client;
  737. if (id)
  738. name = id->name;
  739. else if (ACPI_HANDLE(&client->dev))
  740. name = bmc150_magn_match_acpi_device(&client->dev);
  741. else
  742. return -ENOSYS;
  743. mutex_init(&data->mutex);
  744. data->regmap = devm_regmap_init_i2c(client, &bmc150_magn_regmap_config);
  745. if (IS_ERR(data->regmap)) {
  746. dev_err(&client->dev, "Failed to allocate register map\n");
  747. return PTR_ERR(data->regmap);
  748. }
  749. ret = bmc150_magn_init(data);
  750. if (ret < 0)
  751. return ret;
  752. indio_dev->dev.parent = &client->dev;
  753. indio_dev->channels = bmc150_magn_channels;
  754. indio_dev->num_channels = ARRAY_SIZE(bmc150_magn_channels);
  755. indio_dev->available_scan_masks = bmc150_magn_scan_masks;
  756. indio_dev->name = name;
  757. indio_dev->modes = INDIO_DIRECT_MODE;
  758. indio_dev->info = &bmc150_magn_info;
  759. if (client->irq > 0) {
  760. data->dready_trig = devm_iio_trigger_alloc(&client->dev,
  761. "%s-dev%d",
  762. indio_dev->name,
  763. indio_dev->id);
  764. if (!data->dready_trig) {
  765. ret = -ENOMEM;
  766. dev_err(&client->dev, "iio trigger alloc failed\n");
  767. goto err_poweroff;
  768. }
  769. data->dready_trig->dev.parent = &client->dev;
  770. data->dready_trig->ops = &bmc150_magn_trigger_ops;
  771. iio_trigger_set_drvdata(data->dready_trig, indio_dev);
  772. ret = iio_trigger_register(data->dready_trig);
  773. if (ret) {
  774. dev_err(&client->dev, "iio trigger register failed\n");
  775. goto err_poweroff;
  776. }
  777. ret = request_threaded_irq(client->irq,
  778. iio_trigger_generic_data_rdy_poll,
  779. NULL,
  780. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  781. BMC150_MAGN_IRQ_NAME,
  782. data->dready_trig);
  783. if (ret < 0) {
  784. dev_err(&client->dev, "request irq %d failed\n",
  785. client->irq);
  786. goto err_trigger_unregister;
  787. }
  788. }
  789. ret = iio_triggered_buffer_setup(indio_dev,
  790. iio_pollfunc_store_time,
  791. bmc150_magn_trigger_handler,
  792. &bmc150_magn_buffer_setup_ops);
  793. if (ret < 0) {
  794. dev_err(&client->dev,
  795. "iio triggered buffer setup failed\n");
  796. goto err_free_irq;
  797. }
  798. ret = iio_device_register(indio_dev);
  799. if (ret < 0) {
  800. dev_err(&client->dev, "unable to register iio device\n");
  801. goto err_buffer_cleanup;
  802. }
  803. ret = pm_runtime_set_active(&client->dev);
  804. if (ret)
  805. goto err_iio_unregister;
  806. pm_runtime_enable(&client->dev);
  807. pm_runtime_set_autosuspend_delay(&client->dev,
  808. BMC150_MAGN_AUTO_SUSPEND_DELAY_MS);
  809. pm_runtime_use_autosuspend(&client->dev);
  810. dev_dbg(&indio_dev->dev, "Registered device %s\n", name);
  811. return 0;
  812. err_iio_unregister:
  813. iio_device_unregister(indio_dev);
  814. err_buffer_cleanup:
  815. iio_triggered_buffer_cleanup(indio_dev);
  816. err_free_irq:
  817. if (client->irq > 0)
  818. free_irq(client->irq, data->dready_trig);
  819. err_trigger_unregister:
  820. if (data->dready_trig)
  821. iio_trigger_unregister(data->dready_trig);
  822. err_poweroff:
  823. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  824. return ret;
  825. }
  826. static int bmc150_magn_remove(struct i2c_client *client)
  827. {
  828. struct iio_dev *indio_dev = i2c_get_clientdata(client);
  829. struct bmc150_magn_data *data = iio_priv(indio_dev);
  830. pm_runtime_disable(&client->dev);
  831. pm_runtime_set_suspended(&client->dev);
  832. pm_runtime_put_noidle(&client->dev);
  833. iio_device_unregister(indio_dev);
  834. iio_triggered_buffer_cleanup(indio_dev);
  835. if (client->irq > 0)
  836. free_irq(data->client->irq, data->dready_trig);
  837. if (data->dready_trig)
  838. iio_trigger_unregister(data->dready_trig);
  839. mutex_lock(&data->mutex);
  840. bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SUSPEND, true);
  841. mutex_unlock(&data->mutex);
  842. return 0;
  843. }
  844. #ifdef CONFIG_PM
  845. static int bmc150_magn_runtime_suspend(struct device *dev)
  846. {
  847. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  848. struct bmc150_magn_data *data = iio_priv(indio_dev);
  849. int ret;
  850. mutex_lock(&data->mutex);
  851. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  852. true);
  853. mutex_unlock(&data->mutex);
  854. if (ret < 0) {
  855. dev_err(&data->client->dev, "powering off device failed\n");
  856. return ret;
  857. }
  858. return 0;
  859. }
  860. /*
  861. * Should be called with data->mutex held.
  862. */
  863. static int bmc150_magn_runtime_resume(struct device *dev)
  864. {
  865. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  866. struct bmc150_magn_data *data = iio_priv(indio_dev);
  867. return bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  868. true);
  869. }
  870. #endif
  871. #ifdef CONFIG_PM_SLEEP
  872. static int bmc150_magn_suspend(struct device *dev)
  873. {
  874. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  875. struct bmc150_magn_data *data = iio_priv(indio_dev);
  876. int ret;
  877. mutex_lock(&data->mutex);
  878. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_SLEEP,
  879. true);
  880. mutex_unlock(&data->mutex);
  881. return ret;
  882. }
  883. static int bmc150_magn_resume(struct device *dev)
  884. {
  885. struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
  886. struct bmc150_magn_data *data = iio_priv(indio_dev);
  887. int ret;
  888. mutex_lock(&data->mutex);
  889. ret = bmc150_magn_set_power_mode(data, BMC150_MAGN_POWER_MODE_NORMAL,
  890. true);
  891. mutex_unlock(&data->mutex);
  892. return ret;
  893. }
  894. #endif
  895. static const struct dev_pm_ops bmc150_magn_pm_ops = {
  896. SET_SYSTEM_SLEEP_PM_OPS(bmc150_magn_suspend, bmc150_magn_resume)
  897. SET_RUNTIME_PM_OPS(bmc150_magn_runtime_suspend,
  898. bmc150_magn_runtime_resume, NULL)
  899. };
  900. static const struct acpi_device_id bmc150_magn_acpi_match[] = {
  901. {"BMC150B", 0},
  902. {"BMC156B", 0},
  903. {},
  904. };
  905. MODULE_DEVICE_TABLE(acpi, bmc150_magn_acpi_match);
  906. static const struct i2c_device_id bmc150_magn_id[] = {
  907. {"bmc150_magn", 0},
  908. {"bmc156_magn", 0},
  909. {},
  910. };
  911. MODULE_DEVICE_TABLE(i2c, bmc150_magn_id);
  912. static struct i2c_driver bmc150_magn_driver = {
  913. .driver = {
  914. .name = BMC150_MAGN_DRV_NAME,
  915. .acpi_match_table = ACPI_PTR(bmc150_magn_acpi_match),
  916. .pm = &bmc150_magn_pm_ops,
  917. },
  918. .probe = bmc150_magn_probe,
  919. .remove = bmc150_magn_remove,
  920. .id_table = bmc150_magn_id,
  921. };
  922. module_i2c_driver(bmc150_magn_driver);
  923. MODULE_AUTHOR("Irina Tirdea <irina.tirdea@intel.com>");
  924. MODULE_LICENSE("GPL v2");
  925. MODULE_DESCRIPTION("BMC150 magnetometer driver");