bcm-keypad.c 11 KB

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  1. /*
  2. * Copyright (C) 2014 Broadcom Corporation
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License as
  6. * published by the Free Software Foundation version 2.
  7. *
  8. * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  9. * kind, whether express or implied; without even the implied warranty
  10. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. */
  13. #include <linux/bitops.h>
  14. #include <linux/clk.h>
  15. #include <linux/gfp.h>
  16. #include <linux/io.h>
  17. #include <linux/input.h>
  18. #include <linux/input/matrix_keypad.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/module.h>
  21. #include <linux/of.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/stddef.h>
  24. #include <linux/types.h>
  25. #define DEFAULT_CLK_HZ 31250
  26. #define MAX_ROWS 8
  27. #define MAX_COLS 8
  28. /* Register/field definitions */
  29. #define KPCR_OFFSET 0x00000080
  30. #define KPCR_MODE 0x00000002
  31. #define KPCR_MODE_SHIFT 1
  32. #define KPCR_MODE_MASK 1
  33. #define KPCR_ENABLE 0x00000001
  34. #define KPCR_STATUSFILTERENABLE 0x00008000
  35. #define KPCR_STATUSFILTERTYPE_SHIFT 12
  36. #define KPCR_COLFILTERENABLE 0x00000800
  37. #define KPCR_COLFILTERTYPE_SHIFT 8
  38. #define KPCR_ROWWIDTH_SHIFT 20
  39. #define KPCR_COLUMNWIDTH_SHIFT 16
  40. #define KPIOR_OFFSET 0x00000084
  41. #define KPIOR_ROWOCONTRL_SHIFT 24
  42. #define KPIOR_ROWOCONTRL_MASK 0xFF000000
  43. #define KPIOR_COLUMNOCONTRL_SHIFT 16
  44. #define KPIOR_COLUMNOCONTRL_MASK 0x00FF0000
  45. #define KPIOR_COLUMN_IO_DATA_SHIFT 0
  46. #define KPEMR0_OFFSET 0x00000090
  47. #define KPEMR1_OFFSET 0x00000094
  48. #define KPEMR2_OFFSET 0x00000098
  49. #define KPEMR3_OFFSET 0x0000009C
  50. #define KPEMR_EDGETYPE_BOTH 3
  51. #define KPSSR0_OFFSET 0x000000A0
  52. #define KPSSR1_OFFSET 0x000000A4
  53. #define KPSSRN_OFFSET(reg_n) (KPSSR0_OFFSET + 4 * (reg_n))
  54. #define KPIMR0_OFFSET 0x000000B0
  55. #define KPIMR1_OFFSET 0x000000B4
  56. #define KPICR0_OFFSET 0x000000B8
  57. #define KPICR1_OFFSET 0x000000BC
  58. #define KPICRN_OFFSET(reg_n) (KPICR0_OFFSET + 4 * (reg_n))
  59. #define KPISR0_OFFSET 0x000000C0
  60. #define KPISR1_OFFSET 0x000000C4
  61. #define KPCR_STATUSFILTERTYPE_MAX 7
  62. #define KPCR_COLFILTERTYPE_MAX 7
  63. /* Macros to determine the row/column from a bit that is set in SSR0/1. */
  64. #define BIT_TO_ROW_SSRN(bit_nr, reg_n) (((bit_nr) >> 3) + 4 * (reg_n))
  65. #define BIT_TO_COL(bit_nr) ((bit_nr) % 8)
  66. /* Structure representing various run-time entities */
  67. struct bcm_kp {
  68. void __iomem *base;
  69. int irq;
  70. struct clk *clk;
  71. struct input_dev *input_dev;
  72. unsigned long last_state[2];
  73. unsigned int n_rows;
  74. unsigned int n_cols;
  75. u32 kpcr;
  76. u32 kpior;
  77. u32 kpemr;
  78. u32 imr0_val;
  79. u32 imr1_val;
  80. };
  81. /*
  82. * Returns the keycode from the input device keymap given the row and
  83. * column.
  84. */
  85. static int bcm_kp_get_keycode(struct bcm_kp *kp, int row, int col)
  86. {
  87. unsigned int row_shift = get_count_order(kp->n_cols);
  88. unsigned short *keymap = kp->input_dev->keycode;
  89. return keymap[MATRIX_SCAN_CODE(row, col, row_shift)];
  90. }
  91. static void bcm_kp_report_keys(struct bcm_kp *kp, int reg_num, int pull_mode)
  92. {
  93. unsigned long state, change;
  94. int bit_nr;
  95. int key_press;
  96. int row, col;
  97. unsigned int keycode;
  98. /* Clear interrupts */
  99. writel(0xFFFFFFFF, kp->base + KPICRN_OFFSET(reg_num));
  100. state = readl(kp->base + KPSSRN_OFFSET(reg_num));
  101. change = kp->last_state[reg_num] ^ state;
  102. kp->last_state[reg_num] = state;
  103. for_each_set_bit(bit_nr, &change, BITS_PER_LONG) {
  104. key_press = state & BIT(bit_nr);
  105. /* The meaning of SSR register depends on pull mode. */
  106. key_press = pull_mode ? !key_press : key_press;
  107. row = BIT_TO_ROW_SSRN(bit_nr, reg_num);
  108. col = BIT_TO_COL(bit_nr);
  109. keycode = bcm_kp_get_keycode(kp, row, col);
  110. input_report_key(kp->input_dev, keycode, key_press);
  111. }
  112. }
  113. static irqreturn_t bcm_kp_isr_thread(int irq, void *dev_id)
  114. {
  115. struct bcm_kp *kp = dev_id;
  116. int pull_mode = (kp->kpcr >> KPCR_MODE_SHIFT) & KPCR_MODE_MASK;
  117. int reg_num;
  118. for (reg_num = 0; reg_num <= 1; reg_num++)
  119. bcm_kp_report_keys(kp, reg_num, pull_mode);
  120. input_sync(kp->input_dev);
  121. return IRQ_HANDLED;
  122. }
  123. static int bcm_kp_start(struct bcm_kp *kp)
  124. {
  125. int error;
  126. if (kp->clk) {
  127. error = clk_prepare_enable(kp->clk);
  128. if (error)
  129. return error;
  130. }
  131. writel(kp->kpior, kp->base + KPIOR_OFFSET);
  132. writel(kp->imr0_val, kp->base + KPIMR0_OFFSET);
  133. writel(kp->imr1_val, kp->base + KPIMR1_OFFSET);
  134. writel(kp->kpemr, kp->base + KPEMR0_OFFSET);
  135. writel(kp->kpemr, kp->base + KPEMR1_OFFSET);
  136. writel(kp->kpemr, kp->base + KPEMR2_OFFSET);
  137. writel(kp->kpemr, kp->base + KPEMR3_OFFSET);
  138. writel(0xFFFFFFFF, kp->base + KPICR0_OFFSET);
  139. writel(0xFFFFFFFF, kp->base + KPICR1_OFFSET);
  140. kp->last_state[0] = readl(kp->base + KPSSR0_OFFSET);
  141. kp->last_state[0] = readl(kp->base + KPSSR1_OFFSET);
  142. writel(kp->kpcr | KPCR_ENABLE, kp->base + KPCR_OFFSET);
  143. return 0;
  144. }
  145. static void bcm_kp_stop(const struct bcm_kp *kp)
  146. {
  147. u32 val;
  148. val = readl(kp->base + KPCR_OFFSET);
  149. val &= ~KPCR_ENABLE;
  150. writel(0, kp->base + KPCR_OFFSET);
  151. writel(0, kp->base + KPIMR0_OFFSET);
  152. writel(0, kp->base + KPIMR1_OFFSET);
  153. writel(0xFFFFFFFF, kp->base + KPICR0_OFFSET);
  154. writel(0xFFFFFFFF, kp->base + KPICR1_OFFSET);
  155. if (kp->clk)
  156. clk_disable_unprepare(kp->clk);
  157. }
  158. static int bcm_kp_open(struct input_dev *dev)
  159. {
  160. struct bcm_kp *kp = input_get_drvdata(dev);
  161. return bcm_kp_start(kp);
  162. }
  163. static void bcm_kp_close(struct input_dev *dev)
  164. {
  165. struct bcm_kp *kp = input_get_drvdata(dev);
  166. bcm_kp_stop(kp);
  167. }
  168. static int bcm_kp_matrix_key_parse_dt(struct bcm_kp *kp)
  169. {
  170. struct device *dev = kp->input_dev->dev.parent;
  171. struct device_node *np = dev->of_node;
  172. int error;
  173. unsigned int dt_val;
  174. unsigned int i;
  175. unsigned int num_rows, col_mask, rows_set;
  176. /* Initialize the KPCR Keypad Configuration Register */
  177. kp->kpcr = KPCR_STATUSFILTERENABLE | KPCR_COLFILTERENABLE;
  178. error = matrix_keypad_parse_of_params(dev, &kp->n_rows, &kp->n_cols);
  179. if (error) {
  180. dev_err(dev, "failed to parse kp params\n");
  181. return error;
  182. }
  183. /* Set row width for the ASIC block. */
  184. kp->kpcr |= (kp->n_rows - 1) << KPCR_ROWWIDTH_SHIFT;
  185. /* Set column width for the ASIC block. */
  186. kp->kpcr |= (kp->n_cols - 1) << KPCR_COLUMNWIDTH_SHIFT;
  187. /* Configure the IMR registers */
  188. /*
  189. * IMR registers contain interrupt enable bits for 8x8 matrix
  190. * IMR0 register format: <row3> <row2> <row1> <row0>
  191. * IMR1 register format: <row7> <row6> <row5> <row4>
  192. */
  193. col_mask = (1 << (kp->n_cols)) - 1;
  194. num_rows = kp->n_rows;
  195. /* Set column bits in rows 0 to 3 in IMR0 */
  196. kp->imr0_val = col_mask;
  197. rows_set = 1;
  198. while (--num_rows && rows_set++ < 4)
  199. kp->imr0_val |= kp->imr0_val << MAX_COLS;
  200. /* Set column bits in rows 4 to 7 in IMR1 */
  201. kp->imr1_val = 0;
  202. if (num_rows) {
  203. kp->imr1_val = col_mask;
  204. while (--num_rows)
  205. kp->imr1_val |= kp->imr1_val << MAX_COLS;
  206. }
  207. /* Initialize the KPEMR Keypress Edge Mode Registers */
  208. /* Trigger on both edges */
  209. kp->kpemr = 0;
  210. for (i = 0; i <= 30; i += 2)
  211. kp->kpemr |= (KPEMR_EDGETYPE_BOTH << i);
  212. /*
  213. * Obtain the Status filter debounce value and verify against the
  214. * possible values specified in the DT binding.
  215. */
  216. of_property_read_u32(np, "status-debounce-filter-period", &dt_val);
  217. if (dt_val > KPCR_STATUSFILTERTYPE_MAX) {
  218. dev_err(dev, "Invalid Status filter debounce value %d\n",
  219. dt_val);
  220. return -EINVAL;
  221. }
  222. kp->kpcr |= dt_val << KPCR_STATUSFILTERTYPE_SHIFT;
  223. /*
  224. * Obtain the Column filter debounce value and verify against the
  225. * possible values specified in the DT binding.
  226. */
  227. of_property_read_u32(np, "col-debounce-filter-period", &dt_val);
  228. if (dt_val > KPCR_COLFILTERTYPE_MAX) {
  229. dev_err(dev, "Invalid Column filter debounce value %d\n",
  230. dt_val);
  231. return -EINVAL;
  232. }
  233. kp->kpcr |= dt_val << KPCR_COLFILTERTYPE_SHIFT;
  234. /*
  235. * Determine between the row and column,
  236. * which should be configured as output.
  237. */
  238. if (of_property_read_bool(np, "row-output-enabled")) {
  239. /*
  240. * Set RowOContrl or ColumnOContrl in KPIOR
  241. * to the number of pins to drive as outputs
  242. */
  243. kp->kpior = ((1 << kp->n_rows) - 1) <<
  244. KPIOR_ROWOCONTRL_SHIFT;
  245. } else {
  246. kp->kpior = ((1 << kp->n_cols) - 1) <<
  247. KPIOR_COLUMNOCONTRL_SHIFT;
  248. }
  249. /*
  250. * Determine if the scan pull up needs to be enabled
  251. */
  252. if (of_property_read_bool(np, "pull-up-enabled"))
  253. kp->kpcr |= KPCR_MODE;
  254. dev_dbg(dev, "n_rows=%d n_col=%d kpcr=%x kpior=%x kpemr=%x\n",
  255. kp->n_rows, kp->n_cols,
  256. kp->kpcr, kp->kpior, kp->kpemr);
  257. return 0;
  258. }
  259. static int bcm_kp_probe(struct platform_device *pdev)
  260. {
  261. struct bcm_kp *kp;
  262. struct input_dev *input_dev;
  263. struct resource *res;
  264. int error;
  265. kp = devm_kzalloc(&pdev->dev, sizeof(*kp), GFP_KERNEL);
  266. if (!kp)
  267. return -ENOMEM;
  268. input_dev = devm_input_allocate_device(&pdev->dev);
  269. if (!input_dev) {
  270. dev_err(&pdev->dev, "failed to allocate the input device\n");
  271. return -ENOMEM;
  272. }
  273. __set_bit(EV_KEY, input_dev->evbit);
  274. /* Enable auto repeat feature of Linux input subsystem */
  275. if (of_property_read_bool(pdev->dev.of_node, "autorepeat"))
  276. __set_bit(EV_REP, input_dev->evbit);
  277. input_dev->name = pdev->name;
  278. input_dev->phys = "keypad/input0";
  279. input_dev->dev.parent = &pdev->dev;
  280. input_dev->open = bcm_kp_open;
  281. input_dev->close = bcm_kp_close;
  282. input_dev->id.bustype = BUS_HOST;
  283. input_dev->id.vendor = 0x0001;
  284. input_dev->id.product = 0x0001;
  285. input_dev->id.version = 0x0100;
  286. input_set_drvdata(input_dev, kp);
  287. kp->input_dev = input_dev;
  288. platform_set_drvdata(pdev, kp);
  289. error = bcm_kp_matrix_key_parse_dt(kp);
  290. if (error)
  291. return error;
  292. error = matrix_keypad_build_keymap(NULL, NULL,
  293. kp->n_rows, kp->n_cols,
  294. NULL, input_dev);
  295. if (error) {
  296. dev_err(&pdev->dev, "failed to build keymap\n");
  297. return error;
  298. }
  299. /* Get the KEYPAD base address */
  300. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  301. if (!res) {
  302. dev_err(&pdev->dev, "Missing keypad base address resource\n");
  303. return -ENODEV;
  304. }
  305. kp->base = devm_ioremap_resource(&pdev->dev, res);
  306. if (IS_ERR(kp->base))
  307. return PTR_ERR(kp->base);
  308. /* Enable clock */
  309. kp->clk = devm_clk_get(&pdev->dev, "peri_clk");
  310. if (IS_ERR(kp->clk)) {
  311. error = PTR_ERR(kp->clk);
  312. if (error != -ENOENT) {
  313. if (error != -EPROBE_DEFER)
  314. dev_err(&pdev->dev, "Failed to get clock\n");
  315. return error;
  316. }
  317. dev_dbg(&pdev->dev,
  318. "No clock specified. Assuming it's enabled\n");
  319. kp->clk = NULL;
  320. } else {
  321. unsigned int desired_rate;
  322. long actual_rate;
  323. error = of_property_read_u32(pdev->dev.of_node,
  324. "clock-frequency", &desired_rate);
  325. if (error < 0)
  326. desired_rate = DEFAULT_CLK_HZ;
  327. actual_rate = clk_round_rate(kp->clk, desired_rate);
  328. if (actual_rate <= 0)
  329. return -EINVAL;
  330. error = clk_set_rate(kp->clk, actual_rate);
  331. if (error)
  332. return error;
  333. error = clk_prepare_enable(kp->clk);
  334. if (error)
  335. return error;
  336. }
  337. /* Put the kp into a known sane state */
  338. bcm_kp_stop(kp);
  339. kp->irq = platform_get_irq(pdev, 0);
  340. if (kp->irq < 0) {
  341. dev_err(&pdev->dev, "no IRQ specified\n");
  342. return -EINVAL;
  343. }
  344. error = devm_request_threaded_irq(&pdev->dev, kp->irq,
  345. NULL, bcm_kp_isr_thread,
  346. IRQF_ONESHOT, pdev->name, kp);
  347. if (error) {
  348. dev_err(&pdev->dev, "failed to request IRQ\n");
  349. return error;
  350. }
  351. error = input_register_device(input_dev);
  352. if (error) {
  353. dev_err(&pdev->dev, "failed to register input device\n");
  354. return error;
  355. }
  356. return 0;
  357. }
  358. static const struct of_device_id bcm_kp_of_match[] = {
  359. { .compatible = "brcm,bcm-keypad" },
  360. { },
  361. };
  362. MODULE_DEVICE_TABLE(of, bcm_kp_of_match);
  363. static struct platform_driver bcm_kp_device_driver = {
  364. .probe = bcm_kp_probe,
  365. .driver = {
  366. .name = "bcm-keypad",
  367. .of_match_table = of_match_ptr(bcm_kp_of_match),
  368. }
  369. };
  370. module_platform_driver(bcm_kp_device_driver);
  371. MODULE_AUTHOR("Broadcom Corporation");
  372. MODULE_DESCRIPTION("BCM Keypad Driver");
  373. MODULE_LICENSE("GPL v2");