irq-clps711x.c 6.2 KB

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  1. /*
  2. * CLPS711X IRQ driver
  3. *
  4. * Copyright (C) 2013 Alexander Shiyan <shc_work@mail.ru>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/io.h>
  12. #include <linux/irq.h>
  13. #include <linux/irqchip.h>
  14. #include <linux/irqdomain.h>
  15. #include <linux/of_address.h>
  16. #include <linux/of_irq.h>
  17. #include <linux/slab.h>
  18. #include <asm/exception.h>
  19. #include <asm/mach/irq.h>
  20. #define CLPS711X_INTSR1 (0x0240)
  21. #define CLPS711X_INTMR1 (0x0280)
  22. #define CLPS711X_BLEOI (0x0600)
  23. #define CLPS711X_MCEOI (0x0640)
  24. #define CLPS711X_TEOI (0x0680)
  25. #define CLPS711X_TC1EOI (0x06c0)
  26. #define CLPS711X_TC2EOI (0x0700)
  27. #define CLPS711X_RTCEOI (0x0740)
  28. #define CLPS711X_UMSEOI (0x0780)
  29. #define CLPS711X_COEOI (0x07c0)
  30. #define CLPS711X_INTSR2 (0x1240)
  31. #define CLPS711X_INTMR2 (0x1280)
  32. #define CLPS711X_SRXEOF (0x1600)
  33. #define CLPS711X_KBDEOI (0x1700)
  34. #define CLPS711X_INTSR3 (0x2240)
  35. #define CLPS711X_INTMR3 (0x2280)
  36. static const struct {
  37. #define CLPS711X_FLAG_EN (1 << 0)
  38. #define CLPS711X_FLAG_FIQ (1 << 1)
  39. unsigned int flags;
  40. phys_addr_t eoi;
  41. } clps711x_irqs[] = {
  42. [1] = { CLPS711X_FLAG_FIQ, CLPS711X_BLEOI, },
  43. [3] = { CLPS711X_FLAG_FIQ, CLPS711X_MCEOI, },
  44. [4] = { CLPS711X_FLAG_EN, CLPS711X_COEOI, },
  45. [5] = { CLPS711X_FLAG_EN, },
  46. [6] = { CLPS711X_FLAG_EN, },
  47. [7] = { CLPS711X_FLAG_EN, },
  48. [8] = { CLPS711X_FLAG_EN, CLPS711X_TC1EOI, },
  49. [9] = { CLPS711X_FLAG_EN, CLPS711X_TC2EOI, },
  50. [10] = { CLPS711X_FLAG_EN, CLPS711X_RTCEOI, },
  51. [11] = { CLPS711X_FLAG_EN, CLPS711X_TEOI, },
  52. [12] = { CLPS711X_FLAG_EN, },
  53. [13] = { CLPS711X_FLAG_EN, },
  54. [14] = { CLPS711X_FLAG_EN, CLPS711X_UMSEOI, },
  55. [15] = { CLPS711X_FLAG_EN, CLPS711X_SRXEOF, },
  56. [16] = { CLPS711X_FLAG_EN, CLPS711X_KBDEOI, },
  57. [17] = { CLPS711X_FLAG_EN, },
  58. [18] = { CLPS711X_FLAG_EN, },
  59. [28] = { CLPS711X_FLAG_EN, },
  60. [29] = { CLPS711X_FLAG_EN, },
  61. [32] = { CLPS711X_FLAG_FIQ, },
  62. };
  63. static struct {
  64. void __iomem *base;
  65. void __iomem *intmr[3];
  66. void __iomem *intsr[3];
  67. struct irq_domain *domain;
  68. struct irq_domain_ops ops;
  69. } *clps711x_intc;
  70. static asmlinkage void __exception_irq_entry clps711x_irqh(struct pt_regs *regs)
  71. {
  72. u32 irqstat;
  73. do {
  74. irqstat = readw_relaxed(clps711x_intc->intmr[0]) &
  75. readw_relaxed(clps711x_intc->intsr[0]);
  76. if (irqstat)
  77. handle_domain_irq(clps711x_intc->domain,
  78. fls(irqstat) - 1, regs);
  79. irqstat = readw_relaxed(clps711x_intc->intmr[1]) &
  80. readw_relaxed(clps711x_intc->intsr[1]);
  81. if (irqstat)
  82. handle_domain_irq(clps711x_intc->domain,
  83. fls(irqstat) - 1 + 16, regs);
  84. } while (irqstat);
  85. }
  86. static void clps711x_intc_eoi(struct irq_data *d)
  87. {
  88. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  89. writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi);
  90. }
  91. static void clps711x_intc_mask(struct irq_data *d)
  92. {
  93. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  94. void __iomem *intmr = clps711x_intc->intmr[hwirq / 16];
  95. u32 tmp;
  96. tmp = readl_relaxed(intmr);
  97. tmp &= ~(1 << (hwirq % 16));
  98. writel_relaxed(tmp, intmr);
  99. }
  100. static void clps711x_intc_unmask(struct irq_data *d)
  101. {
  102. irq_hw_number_t hwirq = irqd_to_hwirq(d);
  103. void __iomem *intmr = clps711x_intc->intmr[hwirq / 16];
  104. u32 tmp;
  105. tmp = readl_relaxed(intmr);
  106. tmp |= 1 << (hwirq % 16);
  107. writel_relaxed(tmp, intmr);
  108. }
  109. static struct irq_chip clps711x_intc_chip = {
  110. .name = "clps711x-intc",
  111. .irq_eoi = clps711x_intc_eoi,
  112. .irq_mask = clps711x_intc_mask,
  113. .irq_unmask = clps711x_intc_unmask,
  114. };
  115. static int __init clps711x_intc_irq_map(struct irq_domain *h, unsigned int virq,
  116. irq_hw_number_t hw)
  117. {
  118. irq_flow_handler_t handler = handle_level_irq;
  119. unsigned int flags = 0;
  120. if (!clps711x_irqs[hw].flags)
  121. return 0;
  122. if (clps711x_irqs[hw].flags & CLPS711X_FLAG_FIQ) {
  123. handler = handle_bad_irq;
  124. flags |= IRQ_NOAUTOEN;
  125. } else if (clps711x_irqs[hw].eoi) {
  126. handler = handle_fasteoi_irq;
  127. }
  128. /* Clear down pending interrupt */
  129. if (clps711x_irqs[hw].eoi)
  130. writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hw].eoi);
  131. irq_set_chip_and_handler(virq, &clps711x_intc_chip, handler);
  132. irq_modify_status(virq, IRQ_NOPROBE, flags);
  133. return 0;
  134. }
  135. static int __init _clps711x_intc_init(struct device_node *np,
  136. phys_addr_t base, resource_size_t size)
  137. {
  138. int err;
  139. clps711x_intc = kzalloc(sizeof(*clps711x_intc), GFP_KERNEL);
  140. if (!clps711x_intc)
  141. return -ENOMEM;
  142. clps711x_intc->base = ioremap(base, size);
  143. if (!clps711x_intc->base) {
  144. err = -ENOMEM;
  145. goto out_kfree;
  146. }
  147. clps711x_intc->intsr[0] = clps711x_intc->base + CLPS711X_INTSR1;
  148. clps711x_intc->intmr[0] = clps711x_intc->base + CLPS711X_INTMR1;
  149. clps711x_intc->intsr[1] = clps711x_intc->base + CLPS711X_INTSR2;
  150. clps711x_intc->intmr[1] = clps711x_intc->base + CLPS711X_INTMR2;
  151. clps711x_intc->intsr[2] = clps711x_intc->base + CLPS711X_INTSR3;
  152. clps711x_intc->intmr[2] = clps711x_intc->base + CLPS711X_INTMR3;
  153. /* Mask all interrupts */
  154. writel_relaxed(0, clps711x_intc->intmr[0]);
  155. writel_relaxed(0, clps711x_intc->intmr[1]);
  156. writel_relaxed(0, clps711x_intc->intmr[2]);
  157. err = irq_alloc_descs(-1, 0, ARRAY_SIZE(clps711x_irqs), numa_node_id());
  158. if (IS_ERR_VALUE(err))
  159. goto out_iounmap;
  160. clps711x_intc->ops.map = clps711x_intc_irq_map;
  161. clps711x_intc->ops.xlate = irq_domain_xlate_onecell;
  162. clps711x_intc->domain =
  163. irq_domain_add_legacy(np, ARRAY_SIZE(clps711x_irqs),
  164. 0, 0, &clps711x_intc->ops, NULL);
  165. if (!clps711x_intc->domain) {
  166. err = -ENOMEM;
  167. goto out_irqfree;
  168. }
  169. irq_set_default_host(clps711x_intc->domain);
  170. set_handle_irq(clps711x_irqh);
  171. #ifdef CONFIG_FIQ
  172. init_FIQ(0);
  173. #endif
  174. return 0;
  175. out_irqfree:
  176. irq_free_descs(0, ARRAY_SIZE(clps711x_irqs));
  177. out_iounmap:
  178. iounmap(clps711x_intc->base);
  179. out_kfree:
  180. kfree(clps711x_intc);
  181. return err;
  182. }
  183. void __init clps711x_intc_init(phys_addr_t base, resource_size_t size)
  184. {
  185. BUG_ON(_clps711x_intc_init(NULL, base, size));
  186. }
  187. #ifdef CONFIG_IRQCHIP
  188. static int __init clps711x_intc_init_dt(struct device_node *np,
  189. struct device_node *parent)
  190. {
  191. struct resource res;
  192. int err;
  193. err = of_address_to_resource(np, 0, &res);
  194. if (err)
  195. return err;
  196. return _clps711x_intc_init(np, res.start, resource_size(&res));
  197. }
  198. IRQCHIP_DECLARE(clps711x, "cirrus,clps711x-intc", clps711x_intc_init_dt);
  199. #endif