irq-renesas-irqc.c 7.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308
  1. /*
  2. * Renesas IRQC Driver
  3. *
  4. * Copyright (C) 2013 Magnus Damm
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/clk.h>
  20. #include <linux/init.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/ioport.h>
  25. #include <linux/io.h>
  26. #include <linux/irq.h>
  27. #include <linux/irqdomain.h>
  28. #include <linux/err.h>
  29. #include <linux/slab.h>
  30. #include <linux/module.h>
  31. #include <linux/pm_runtime.h>
  32. #define IRQC_IRQ_MAX 32 /* maximum 32 interrupts per driver instance */
  33. #define IRQC_REQ_STS 0x00 /* Interrupt Request Status Register */
  34. #define IRQC_EN_STS 0x04 /* Interrupt Enable Status Register */
  35. #define IRQC_EN_SET 0x08 /* Interrupt Enable Set Register */
  36. #define IRQC_INT_CPU_BASE(n) (0x000 + ((n) * 0x10))
  37. /* SYS-CPU vs. RT-CPU */
  38. #define DETECT_STATUS 0x100 /* IRQn Detect Status Register */
  39. #define MONITOR 0x104 /* IRQn Signal Level Monitor Register */
  40. #define HLVL_STS 0x108 /* IRQn High Level Detect Status Register */
  41. #define LLVL_STS 0x10c /* IRQn Low Level Detect Status Register */
  42. #define S_R_EDGE_STS 0x110 /* IRQn Sync Rising Edge Detect Status Reg. */
  43. #define S_F_EDGE_STS 0x114 /* IRQn Sync Falling Edge Detect Status Reg. */
  44. #define A_R_EDGE_STS 0x118 /* IRQn Async Rising Edge Detect Status Reg. */
  45. #define A_F_EDGE_STS 0x11c /* IRQn Async Falling Edge Detect Status Reg. */
  46. #define CHTEN_STS 0x120 /* Chattering Reduction Status Register */
  47. #define IRQC_CONFIG(n) (0x180 + ((n) * 0x04))
  48. /* IRQn Configuration Register */
  49. struct irqc_irq {
  50. int hw_irq;
  51. int requested_irq;
  52. struct irqc_priv *p;
  53. };
  54. struct irqc_priv {
  55. void __iomem *iomem;
  56. void __iomem *cpu_int_base;
  57. struct irqc_irq irq[IRQC_IRQ_MAX];
  58. unsigned int number_of_irqs;
  59. struct platform_device *pdev;
  60. struct irq_chip_generic *gc;
  61. struct irq_domain *irq_domain;
  62. struct clk *clk;
  63. };
  64. static struct irqc_priv *irq_data_to_priv(struct irq_data *data)
  65. {
  66. return data->domain->host_data;
  67. }
  68. static void irqc_dbg(struct irqc_irq *i, char *str)
  69. {
  70. dev_dbg(&i->p->pdev->dev, "%s (%d:%d)\n",
  71. str, i->requested_irq, i->hw_irq);
  72. }
  73. static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = {
  74. [IRQ_TYPE_LEVEL_LOW] = 0x01,
  75. [IRQ_TYPE_LEVEL_HIGH] = 0x02,
  76. [IRQ_TYPE_EDGE_FALLING] = 0x04, /* Synchronous */
  77. [IRQ_TYPE_EDGE_RISING] = 0x08, /* Synchronous */
  78. [IRQ_TYPE_EDGE_BOTH] = 0x0c, /* Synchronous */
  79. };
  80. static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
  81. {
  82. struct irqc_priv *p = irq_data_to_priv(d);
  83. int hw_irq = irqd_to_hwirq(d);
  84. unsigned char value = irqc_sense[type & IRQ_TYPE_SENSE_MASK];
  85. u32 tmp;
  86. irqc_dbg(&p->irq[hw_irq], "sense");
  87. if (!value)
  88. return -EINVAL;
  89. tmp = ioread32(p->iomem + IRQC_CONFIG(hw_irq));
  90. tmp &= ~0x3f;
  91. tmp |= value;
  92. iowrite32(tmp, p->iomem + IRQC_CONFIG(hw_irq));
  93. return 0;
  94. }
  95. static int irqc_irq_set_wake(struct irq_data *d, unsigned int on)
  96. {
  97. struct irqc_priv *p = irq_data_to_priv(d);
  98. int hw_irq = irqd_to_hwirq(d);
  99. irq_set_irq_wake(p->irq[hw_irq].requested_irq, on);
  100. if (!p->clk)
  101. return 0;
  102. if (on)
  103. clk_enable(p->clk);
  104. else
  105. clk_disable(p->clk);
  106. return 0;
  107. }
  108. static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
  109. {
  110. struct irqc_irq *i = dev_id;
  111. struct irqc_priv *p = i->p;
  112. u32 bit = BIT(i->hw_irq);
  113. irqc_dbg(i, "demux1");
  114. if (ioread32(p->iomem + DETECT_STATUS) & bit) {
  115. iowrite32(bit, p->iomem + DETECT_STATUS);
  116. irqc_dbg(i, "demux2");
  117. generic_handle_irq(irq_find_mapping(p->irq_domain, i->hw_irq));
  118. return IRQ_HANDLED;
  119. }
  120. return IRQ_NONE;
  121. }
  122. static int irqc_probe(struct platform_device *pdev)
  123. {
  124. struct irqc_priv *p;
  125. struct resource *io;
  126. struct resource *irq;
  127. const char *name = dev_name(&pdev->dev);
  128. int ret;
  129. int k;
  130. p = kzalloc(sizeof(*p), GFP_KERNEL);
  131. if (!p) {
  132. dev_err(&pdev->dev, "failed to allocate driver data\n");
  133. ret = -ENOMEM;
  134. goto err0;
  135. }
  136. p->pdev = pdev;
  137. platform_set_drvdata(pdev, p);
  138. p->clk = devm_clk_get(&pdev->dev, NULL);
  139. if (IS_ERR(p->clk)) {
  140. dev_warn(&pdev->dev, "unable to get clock\n");
  141. p->clk = NULL;
  142. }
  143. pm_runtime_enable(&pdev->dev);
  144. pm_runtime_get_sync(&pdev->dev);
  145. /* get hold of manadatory IOMEM */
  146. io = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  147. if (!io) {
  148. dev_err(&pdev->dev, "not enough IOMEM resources\n");
  149. ret = -EINVAL;
  150. goto err1;
  151. }
  152. /* allow any number of IRQs between 1 and IRQC_IRQ_MAX */
  153. for (k = 0; k < IRQC_IRQ_MAX; k++) {
  154. irq = platform_get_resource(pdev, IORESOURCE_IRQ, k);
  155. if (!irq)
  156. break;
  157. p->irq[k].p = p;
  158. p->irq[k].hw_irq = k;
  159. p->irq[k].requested_irq = irq->start;
  160. }
  161. p->number_of_irqs = k;
  162. if (p->number_of_irqs < 1) {
  163. dev_err(&pdev->dev, "not enough IRQ resources\n");
  164. ret = -EINVAL;
  165. goto err1;
  166. }
  167. /* ioremap IOMEM and setup read/write callbacks */
  168. p->iomem = ioremap_nocache(io->start, resource_size(io));
  169. if (!p->iomem) {
  170. dev_err(&pdev->dev, "failed to remap IOMEM\n");
  171. ret = -ENXIO;
  172. goto err2;
  173. }
  174. p->cpu_int_base = p->iomem + IRQC_INT_CPU_BASE(0); /* SYS-SPI */
  175. p->irq_domain = irq_domain_add_linear(pdev->dev.of_node,
  176. p->number_of_irqs,
  177. &irq_generic_chip_ops, p);
  178. if (!p->irq_domain) {
  179. ret = -ENXIO;
  180. dev_err(&pdev->dev, "cannot initialize irq domain\n");
  181. goto err2;
  182. }
  183. ret = irq_alloc_domain_generic_chips(p->irq_domain, p->number_of_irqs,
  184. 1, name, handle_level_irq,
  185. 0, 0, IRQ_GC_INIT_NESTED_LOCK);
  186. if (ret) {
  187. dev_err(&pdev->dev, "cannot allocate generic chip\n");
  188. goto err3;
  189. }
  190. p->gc = irq_get_domain_generic_chip(p->irq_domain, 0);
  191. p->gc->reg_base = p->cpu_int_base;
  192. p->gc->chip_types[0].regs.enable = IRQC_EN_SET;
  193. p->gc->chip_types[0].regs.disable = IRQC_EN_STS;
  194. p->gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg;
  195. p->gc->chip_types[0].chip.irq_unmask = irq_gc_unmask_enable_reg;
  196. p->gc->chip_types[0].chip.irq_set_type = irqc_irq_set_type;
  197. p->gc->chip_types[0].chip.irq_set_wake = irqc_irq_set_wake;
  198. p->gc->chip_types[0].chip.flags = IRQCHIP_MASK_ON_SUSPEND;
  199. /* request interrupts one by one */
  200. for (k = 0; k < p->number_of_irqs; k++) {
  201. if (request_irq(p->irq[k].requested_irq, irqc_irq_handler,
  202. 0, name, &p->irq[k])) {
  203. dev_err(&pdev->dev, "failed to request IRQ\n");
  204. ret = -ENOENT;
  205. goto err4;
  206. }
  207. }
  208. dev_info(&pdev->dev, "driving %d irqs\n", p->number_of_irqs);
  209. return 0;
  210. err4:
  211. while (--k >= 0)
  212. free_irq(p->irq[k].requested_irq, &p->irq[k]);
  213. err3:
  214. irq_domain_remove(p->irq_domain);
  215. err2:
  216. iounmap(p->iomem);
  217. err1:
  218. pm_runtime_put(&pdev->dev);
  219. pm_runtime_disable(&pdev->dev);
  220. kfree(p);
  221. err0:
  222. return ret;
  223. }
  224. static int irqc_remove(struct platform_device *pdev)
  225. {
  226. struct irqc_priv *p = platform_get_drvdata(pdev);
  227. int k;
  228. for (k = 0; k < p->number_of_irqs; k++)
  229. free_irq(p->irq[k].requested_irq, &p->irq[k]);
  230. irq_domain_remove(p->irq_domain);
  231. iounmap(p->iomem);
  232. pm_runtime_put(&pdev->dev);
  233. pm_runtime_disable(&pdev->dev);
  234. kfree(p);
  235. return 0;
  236. }
  237. static const struct of_device_id irqc_dt_ids[] = {
  238. { .compatible = "renesas,irqc", },
  239. {},
  240. };
  241. MODULE_DEVICE_TABLE(of, irqc_dt_ids);
  242. static struct platform_driver irqc_device_driver = {
  243. .probe = irqc_probe,
  244. .remove = irqc_remove,
  245. .driver = {
  246. .name = "renesas_irqc",
  247. .of_match_table = irqc_dt_ids,
  248. }
  249. };
  250. static int __init irqc_init(void)
  251. {
  252. return platform_driver_register(&irqc_device_driver);
  253. }
  254. postcore_initcall(irqc_init);
  255. static void __exit irqc_exit(void)
  256. {
  257. platform_driver_unregister(&irqc_device_driver);
  258. }
  259. module_exit(irqc_exit);
  260. MODULE_AUTHOR("Magnus Damm");
  261. MODULE_DESCRIPTION("Renesas IRQC Driver");
  262. MODULE_LICENSE("GPL v2");