jade.h 4.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134
  1. /* $Id: jade.h,v 1.5.2.3 2004/01/14 16:04:48 keil Exp $
  2. *
  3. * JADE specific defines
  4. *
  5. * Author Roland Klabunde
  6. * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
  7. *
  8. * This software may be used and distributed according to the terms
  9. * of the GNU General Public License, incorporated herein by reference.
  10. *
  11. */
  12. /* All Registers original Siemens Spec */
  13. #ifndef __JADE_H__
  14. #define __JADE_H__
  15. /* Special registers for access to indirect accessible JADE regs */
  16. #define DIRECT_IO_JADE 0x0000 /* Jade direct io access area */
  17. #define COMM_JADE 0x0040 /* Jade communication area */
  18. /********************************************************************/
  19. /* JADE-HDLC registers */
  20. /********************************************************************/
  21. #define jade_HDLC_RFIFO 0x00 /* R */
  22. #define jade_HDLC_XFIFO 0x00 /* W */
  23. #define jade_HDLC_STAR 0x20 /* R */
  24. #define jadeSTAR_XDOV 0x80
  25. #define jadeSTAR_XFW 0x40 /* Does not work*/
  26. #define jadeSTAR_XCEC 0x20
  27. #define jadeSTAR_RCEC 0x10
  28. #define jadeSTAR_BSY 0x08
  29. #define jadeSTAR_RNA 0x04
  30. #define jadeSTAR_STR 0x02
  31. #define jadeSTAR_STX 0x01
  32. #define jade_HDLC_XCMD 0x20 /* W */
  33. #define jadeXCMD_XF 0x80
  34. #define jadeXCMD_XME 0x40
  35. #define jadeXCMD_XRES 0x20
  36. #define jadeXCMD_STX 0x01
  37. #define jade_HDLC_RSTA 0x21 /* R */
  38. #define jadeRSTA_VFR 0x80
  39. #define jadeRSTA_RDO 0x40
  40. #define jadeRSTA_CRC 0x20
  41. #define jadeRSTA_RAB 0x10
  42. #define jadeRSTA_MASK 0xF0
  43. #define jade_HDLC_MODE 0x22 /* RW*/
  44. #define jadeMODE_TMO 0x80
  45. #define jadeMODE_RAC 0x40
  46. #define jadeMODE_XAC 0x20
  47. #define jadeMODE_TLP 0x10
  48. #define jadeMODE_ERFS 0x02
  49. #define jadeMODE_ETFS 0x01
  50. #define jade_HDLC_RBCH 0x24 /* R */
  51. #define jade_HDLC_RBCL 0x25 /* R */
  52. #define jade_HDLC_RCMD 0x25 /* W */
  53. #define jadeRCMD_RMC 0x80
  54. #define jadeRCMD_RRES 0x40
  55. #define jadeRCMD_RMD 0x20
  56. #define jadeRCMD_STR 0x02
  57. #define jade_HDLC_CCR0 0x26 /* RW*/
  58. #define jadeCCR0_PU 0x80
  59. #define jadeCCR0_ITF 0x40
  60. #define jadeCCR0_C32 0x20
  61. #define jadeCCR0_CRL 0x10
  62. #define jadeCCR0_RCRC 0x08
  63. #define jadeCCR0_XCRC 0x04
  64. #define jadeCCR0_RMSB 0x02
  65. #define jadeCCR0_XMSB 0x01
  66. #define jade_HDLC_CCR1 0x27 /* RW*/
  67. #define jadeCCR1_RCS0 0x80
  68. #define jadeCCR1_RCONT 0x40
  69. #define jadeCCR1_RFDIS 0x20
  70. #define jadeCCR1_XCS0 0x10
  71. #define jadeCCR1_XCONT 0x08
  72. #define jadeCCR1_XFDIS 0x04
  73. #define jade_HDLC_TSAR 0x28 /* RW*/
  74. #define jade_HDLC_TSAX 0x29 /* RW*/
  75. #define jade_HDLC_RCCR 0x2A /* RW*/
  76. #define jade_HDLC_XCCR 0x2B /* RW*/
  77. #define jade_HDLC_ISR 0x2C /* R */
  78. #define jade_HDLC_IMR 0x2C /* W */
  79. #define jadeISR_RME 0x80
  80. #define jadeISR_RPF 0x40
  81. #define jadeISR_RFO 0x20
  82. #define jadeISR_XPR 0x10
  83. #define jadeISR_XDU 0x08
  84. #define jadeISR_ALLS 0x04
  85. #define jade_INT 0x75
  86. #define jadeINT_HDLC1 0x02
  87. #define jadeINT_HDLC2 0x01
  88. #define jadeINT_DSP 0x04
  89. #define jade_INTR 0x70
  90. /********************************************************************/
  91. /* Indirect accessible JADE registers of common interest */
  92. /********************************************************************/
  93. #define jade_CHIPVERSIONNR 0x00 /* Does not work*/
  94. #define jade_HDLCCNTRACCESS 0x10
  95. #define jadeINDIRECT_HAH1 0x02
  96. #define jadeINDIRECT_HAH2 0x01
  97. #define jade_HDLC1SERRXPATH 0x1D
  98. #define jade_HDLC1SERTXPATH 0x1E
  99. #define jade_HDLC2SERRXPATH 0x1F
  100. #define jade_HDLC2SERTXPATH 0x20
  101. #define jadeINDIRECT_SLIN1 0x10
  102. #define jadeINDIRECT_SLIN0 0x08
  103. #define jadeINDIRECT_LMOD1 0x04
  104. #define jadeINDIRECT_LMOD0 0x02
  105. #define jadeINDIRECT_HHR 0x01
  106. #define jadeINDIRECT_HHX 0x01
  107. #define jade_RXAUDIOCH1CFG 0x11
  108. #define jade_RXAUDIOCH2CFG 0x14
  109. #define jade_TXAUDIOCH1CFG 0x17
  110. #define jade_TXAUDIOCH2CFG 0x1A
  111. extern int JadeVersion(struct IsdnCardState *cs, char *s);
  112. extern void clear_pending_jade_ints(struct IsdnCardState *cs);
  113. extern void initjade(struct IsdnCardState *cs);
  114. #endif /* __JADE_H__ */