netjet.c 26 KB

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  1. /* $Id: netjet.c,v 1.29.2.4 2004/02/11 13:21:34 keil Exp $
  2. *
  3. * low level stuff for Traverse Technologie NETJet ISDN cards
  4. *
  5. * Author Karsten Keil
  6. * Copyright by Karsten Keil <keil@isdn4linux.de>
  7. *
  8. * This software may be used and distributed according to the terms
  9. * of the GNU General Public License, incorporated herein by reference.
  10. *
  11. * Thanks to Traverse Technologies Australia for documents and information
  12. *
  13. * 16-Apr-2002 - led code added - Guy Ellis (guy@traverse.com.au)
  14. *
  15. */
  16. #include <linux/init.h>
  17. #include "hisax.h"
  18. #include "isac.h"
  19. #include "hscx.h"
  20. #include "isdnl1.h"
  21. #include <linux/interrupt.h>
  22. #include <linux/ppp_defs.h>
  23. #include <linux/slab.h>
  24. #include <asm/io.h>
  25. #include "netjet.h"
  26. /* Interface functions */
  27. u_char
  28. NETjet_ReadIC(struct IsdnCardState *cs, u_char offset)
  29. {
  30. u_char ret;
  31. cs->hw.njet.auxd &= 0xfc;
  32. cs->hw.njet.auxd |= (offset >> 4) & 3;
  33. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  34. ret = bytein(cs->hw.njet.isac + ((offset & 0xf) << 2));
  35. return (ret);
  36. }
  37. void
  38. NETjet_WriteIC(struct IsdnCardState *cs, u_char offset, u_char value)
  39. {
  40. cs->hw.njet.auxd &= 0xfc;
  41. cs->hw.njet.auxd |= (offset >> 4) & 3;
  42. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  43. byteout(cs->hw.njet.isac + ((offset & 0xf) << 2), value);
  44. }
  45. void
  46. NETjet_ReadICfifo(struct IsdnCardState *cs, u_char *data, int size)
  47. {
  48. cs->hw.njet.auxd &= 0xfc;
  49. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  50. insb(cs->hw.njet.isac, data, size);
  51. }
  52. void
  53. NETjet_WriteICfifo(struct IsdnCardState *cs, u_char *data, int size)
  54. {
  55. cs->hw.njet.auxd &= 0xfc;
  56. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  57. outsb(cs->hw.njet.isac, data, size);
  58. }
  59. static void fill_mem(struct BCState *bcs, u_int *pos, u_int cnt, int chan, u_char fill)
  60. {
  61. u_int mask = 0x000000ff, val = 0, *p = pos;
  62. u_int i;
  63. val |= fill;
  64. if (chan) {
  65. val <<= 8;
  66. mask <<= 8;
  67. }
  68. mask ^= 0xffffffff;
  69. for (i = 0; i < cnt; i++) {
  70. *p &= mask;
  71. *p++ |= val;
  72. if (p > bcs->hw.tiger.s_end)
  73. p = bcs->hw.tiger.send;
  74. }
  75. }
  76. static void
  77. mode_tiger(struct BCState *bcs, int mode, int bc)
  78. {
  79. struct IsdnCardState *cs = bcs->cs;
  80. u_char led;
  81. if (cs->debug & L1_DEB_HSCX)
  82. debugl1(cs, "Tiger mode %d bchan %d/%d",
  83. mode, bc, bcs->channel);
  84. bcs->mode = mode;
  85. bcs->channel = bc;
  86. switch (mode) {
  87. case (L1_MODE_NULL):
  88. fill_mem(bcs, bcs->hw.tiger.send,
  89. NETJET_DMA_TXSIZE, bc, 0xff);
  90. if (cs->debug & L1_DEB_HSCX)
  91. debugl1(cs, "Tiger stat rec %d/%d send %d",
  92. bcs->hw.tiger.r_tot, bcs->hw.tiger.r_err,
  93. bcs->hw.tiger.s_tot);
  94. if ((cs->bcs[0].mode == L1_MODE_NULL) &&
  95. (cs->bcs[1].mode == L1_MODE_NULL)) {
  96. cs->hw.njet.dmactrl = 0;
  97. byteout(cs->hw.njet.base + NETJET_DMACTRL,
  98. cs->hw.njet.dmactrl);
  99. byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
  100. }
  101. if (cs->typ == ISDN_CTYPE_NETJET_S)
  102. {
  103. // led off
  104. led = bc & 0x01;
  105. led = 0x01 << (6 + led); // convert to mask
  106. led = ~led;
  107. cs->hw.njet.auxd &= led;
  108. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  109. }
  110. break;
  111. case (L1_MODE_TRANS):
  112. break;
  113. case (L1_MODE_HDLC_56K):
  114. case (L1_MODE_HDLC):
  115. fill_mem(bcs, bcs->hw.tiger.send,
  116. NETJET_DMA_TXSIZE, bc, 0xff);
  117. bcs->hw.tiger.r_state = HDLC_ZERO_SEARCH;
  118. bcs->hw.tiger.r_tot = 0;
  119. bcs->hw.tiger.r_bitcnt = 0;
  120. bcs->hw.tiger.r_one = 0;
  121. bcs->hw.tiger.r_err = 0;
  122. bcs->hw.tiger.s_tot = 0;
  123. if (!cs->hw.njet.dmactrl) {
  124. fill_mem(bcs, bcs->hw.tiger.send,
  125. NETJET_DMA_TXSIZE, !bc, 0xff);
  126. cs->hw.njet.dmactrl = 1;
  127. byteout(cs->hw.njet.base + NETJET_DMACTRL,
  128. cs->hw.njet.dmactrl);
  129. byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0x0f);
  130. /* was 0x3f now 0x0f for TJ300 and TJ320 GE 13/07/00 */
  131. }
  132. bcs->hw.tiger.sendp = bcs->hw.tiger.send;
  133. bcs->hw.tiger.free = NETJET_DMA_TXSIZE;
  134. test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag);
  135. if (cs->typ == ISDN_CTYPE_NETJET_S)
  136. {
  137. // led on
  138. led = bc & 0x01;
  139. led = 0x01 << (6 + led); // convert to mask
  140. cs->hw.njet.auxd |= led;
  141. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  142. }
  143. break;
  144. }
  145. if (cs->debug & L1_DEB_HSCX)
  146. debugl1(cs, "tiger: set %x %x %x %x/%x pulse=%d",
  147. bytein(cs->hw.njet.base + NETJET_DMACTRL),
  148. bytein(cs->hw.njet.base + NETJET_IRQMASK0),
  149. bytein(cs->hw.njet.base + NETJET_IRQSTAT0),
  150. inl(cs->hw.njet.base + NETJET_DMA_READ_ADR),
  151. inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR),
  152. bytein(cs->hw.njet.base + NETJET_PULSE_CNT));
  153. }
  154. static void printframe(struct IsdnCardState *cs, u_char *buf, int count, char *s) {
  155. char tmp[128];
  156. char *t = tmp;
  157. int i = count, j;
  158. u_char *p = buf;
  159. t += sprintf(t, "tiger %s(%4d)", s, count);
  160. while (i > 0) {
  161. if (i > 16)
  162. j = 16;
  163. else
  164. j = i;
  165. QuickHex(t, p, j);
  166. debugl1(cs, "%s", tmp);
  167. p += j;
  168. i -= j;
  169. t = tmp;
  170. t += sprintf(t, "tiger %s ", s);
  171. }
  172. }
  173. // macro for 64k
  174. #define MAKE_RAW_BYTE for (j = 0; j < 8; j++) { \
  175. bitcnt++; \
  176. s_val >>= 1; \
  177. if (val & 1) { \
  178. s_one++; \
  179. s_val |= 0x80; \
  180. } else { \
  181. s_one = 0; \
  182. s_val &= 0x7f; \
  183. } \
  184. if (bitcnt == 8) { \
  185. bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
  186. bitcnt = 0; \
  187. } \
  188. if (s_one == 5) { \
  189. s_val >>= 1; \
  190. s_val &= 0x7f; \
  191. bitcnt++; \
  192. s_one = 0; \
  193. } \
  194. if (bitcnt == 8) { \
  195. bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
  196. bitcnt = 0; \
  197. } \
  198. val >>= 1; \
  199. }
  200. static int make_raw_data(struct BCState *bcs) {
  201. // this make_raw is for 64k
  202. register u_int i, s_cnt = 0;
  203. register u_char j;
  204. register u_char val;
  205. register u_char s_one = 0;
  206. register u_char s_val = 0;
  207. register u_char bitcnt = 0;
  208. u_int fcs;
  209. if (!bcs->tx_skb) {
  210. debugl1(bcs->cs, "tiger make_raw: NULL skb");
  211. return (1);
  212. }
  213. bcs->hw.tiger.sendbuf[s_cnt++] = HDLC_FLAG_VALUE;
  214. fcs = PPP_INITFCS;
  215. for (i = 0; i < bcs->tx_skb->len; i++) {
  216. val = bcs->tx_skb->data[i];
  217. fcs = PPP_FCS(fcs, val);
  218. MAKE_RAW_BYTE;
  219. }
  220. fcs ^= 0xffff;
  221. val = fcs & 0xff;
  222. MAKE_RAW_BYTE;
  223. val = (fcs >> 8) & 0xff;
  224. MAKE_RAW_BYTE;
  225. val = HDLC_FLAG_VALUE;
  226. for (j = 0; j < 8; j++) {
  227. bitcnt++;
  228. s_val >>= 1;
  229. if (val & 1)
  230. s_val |= 0x80;
  231. else
  232. s_val &= 0x7f;
  233. if (bitcnt == 8) {
  234. bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
  235. bitcnt = 0;
  236. }
  237. val >>= 1;
  238. }
  239. if (bcs->cs->debug & L1_DEB_HSCX)
  240. debugl1(bcs->cs, "tiger make_raw: in %u out %d.%d",
  241. bcs->tx_skb->len, s_cnt, bitcnt);
  242. if (bitcnt) {
  243. while (8 > bitcnt++) {
  244. s_val >>= 1;
  245. s_val |= 0x80;
  246. }
  247. bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
  248. bcs->hw.tiger.sendbuf[s_cnt++] = 0xff; // NJ<->NJ thoughput bug fix
  249. }
  250. bcs->hw.tiger.sendcnt = s_cnt;
  251. bcs->tx_cnt -= bcs->tx_skb->len;
  252. bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf;
  253. return (0);
  254. }
  255. // macro for 56k
  256. #define MAKE_RAW_BYTE_56K for (j = 0; j < 8; j++) { \
  257. bitcnt++; \
  258. s_val >>= 1; \
  259. if (val & 1) { \
  260. s_one++; \
  261. s_val |= 0x80; \
  262. } else { \
  263. s_one = 0; \
  264. s_val &= 0x7f; \
  265. } \
  266. if (bitcnt == 7) { \
  267. s_val >>= 1; \
  268. s_val |= 0x80; \
  269. bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
  270. bitcnt = 0; \
  271. } \
  272. if (s_one == 5) { \
  273. s_val >>= 1; \
  274. s_val &= 0x7f; \
  275. bitcnt++; \
  276. s_one = 0; \
  277. } \
  278. if (bitcnt == 7) { \
  279. s_val >>= 1; \
  280. s_val |= 0x80; \
  281. bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
  282. bitcnt = 0; \
  283. } \
  284. val >>= 1; \
  285. }
  286. static int make_raw_data_56k(struct BCState *bcs) {
  287. // this make_raw is for 56k
  288. register u_int i, s_cnt = 0;
  289. register u_char j;
  290. register u_char val;
  291. register u_char s_one = 0;
  292. register u_char s_val = 0;
  293. register u_char bitcnt = 0;
  294. u_int fcs;
  295. if (!bcs->tx_skb) {
  296. debugl1(bcs->cs, "tiger make_raw_56k: NULL skb");
  297. return (1);
  298. }
  299. val = HDLC_FLAG_VALUE;
  300. for (j = 0; j < 8; j++) {
  301. bitcnt++;
  302. s_val >>= 1;
  303. if (val & 1)
  304. s_val |= 0x80;
  305. else
  306. s_val &= 0x7f;
  307. if (bitcnt == 7) {
  308. s_val >>= 1;
  309. s_val |= 0x80;
  310. bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
  311. bitcnt = 0;
  312. }
  313. val >>= 1;
  314. };
  315. fcs = PPP_INITFCS;
  316. for (i = 0; i < bcs->tx_skb->len; i++) {
  317. val = bcs->tx_skb->data[i];
  318. fcs = PPP_FCS(fcs, val);
  319. MAKE_RAW_BYTE_56K;
  320. }
  321. fcs ^= 0xffff;
  322. val = fcs & 0xff;
  323. MAKE_RAW_BYTE_56K;
  324. val = (fcs >> 8) & 0xff;
  325. MAKE_RAW_BYTE_56K;
  326. val = HDLC_FLAG_VALUE;
  327. for (j = 0; j < 8; j++) {
  328. bitcnt++;
  329. s_val >>= 1;
  330. if (val & 1)
  331. s_val |= 0x80;
  332. else
  333. s_val &= 0x7f;
  334. if (bitcnt == 7) {
  335. s_val >>= 1;
  336. s_val |= 0x80;
  337. bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
  338. bitcnt = 0;
  339. }
  340. val >>= 1;
  341. }
  342. if (bcs->cs->debug & L1_DEB_HSCX)
  343. debugl1(bcs->cs, "tiger make_raw_56k: in %u out %d.%d",
  344. bcs->tx_skb->len, s_cnt, bitcnt);
  345. if (bitcnt) {
  346. while (8 > bitcnt++) {
  347. s_val >>= 1;
  348. s_val |= 0x80;
  349. }
  350. bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
  351. bcs->hw.tiger.sendbuf[s_cnt++] = 0xff; // NJ<->NJ thoughput bug fix
  352. }
  353. bcs->hw.tiger.sendcnt = s_cnt;
  354. bcs->tx_cnt -= bcs->tx_skb->len;
  355. bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf;
  356. return (0);
  357. }
  358. static void got_frame(struct BCState *bcs, int count) {
  359. struct sk_buff *skb;
  360. if (!(skb = dev_alloc_skb(count)))
  361. printk(KERN_WARNING "TIGER: receive out of memory\n");
  362. else {
  363. memcpy(skb_put(skb, count), bcs->hw.tiger.rcvbuf, count);
  364. skb_queue_tail(&bcs->rqueue, skb);
  365. }
  366. test_and_set_bit(B_RCVBUFREADY, &bcs->event);
  367. schedule_work(&bcs->tqueue);
  368. if (bcs->cs->debug & L1_DEB_RECEIVE_FRAME)
  369. printframe(bcs->cs, bcs->hw.tiger.rcvbuf, count, "rec");
  370. }
  371. static void read_raw(struct BCState *bcs, u_int *buf, int cnt) {
  372. int i;
  373. register u_char j;
  374. register u_char val;
  375. u_int *pend = bcs->hw.tiger.rec + NETJET_DMA_RXSIZE - 1;
  376. register u_char state = bcs->hw.tiger.r_state;
  377. register u_char r_one = bcs->hw.tiger.r_one;
  378. register u_char r_val = bcs->hw.tiger.r_val;
  379. register u_int bitcnt = bcs->hw.tiger.r_bitcnt;
  380. u_int *p = buf;
  381. int bits;
  382. u_char mask;
  383. if (bcs->mode == L1_MODE_HDLC) { // it's 64k
  384. mask = 0xff;
  385. bits = 8;
  386. }
  387. else { // it's 56K
  388. mask = 0x7f;
  389. bits = 7;
  390. };
  391. for (i = 0; i < cnt; i++) {
  392. val = bcs->channel ? ((*p >> 8) & 0xff) : (*p & 0xff);
  393. p++;
  394. if (p > pend)
  395. p = bcs->hw.tiger.rec;
  396. if ((val & mask) == mask) {
  397. state = HDLC_ZERO_SEARCH;
  398. bcs->hw.tiger.r_tot++;
  399. bitcnt = 0;
  400. r_one = 0;
  401. continue;
  402. }
  403. for (j = 0; j < bits; j++) {
  404. if (state == HDLC_ZERO_SEARCH) {
  405. if (val & 1) {
  406. r_one++;
  407. } else {
  408. r_one = 0;
  409. state = HDLC_FLAG_SEARCH;
  410. if (bcs->cs->debug & L1_DEB_HSCX)
  411. debugl1(bcs->cs, "tiger read_raw: zBit(%d,%d,%d) %x",
  412. bcs->hw.tiger.r_tot, i, j, val);
  413. }
  414. } else if (state == HDLC_FLAG_SEARCH) {
  415. if (val & 1) {
  416. r_one++;
  417. if (r_one > 6) {
  418. state = HDLC_ZERO_SEARCH;
  419. }
  420. } else {
  421. if (r_one == 6) {
  422. bitcnt = 0;
  423. r_val = 0;
  424. state = HDLC_FLAG_FOUND;
  425. if (bcs->cs->debug & L1_DEB_HSCX)
  426. debugl1(bcs->cs, "tiger read_raw: flag(%d,%d,%d) %x",
  427. bcs->hw.tiger.r_tot, i, j, val);
  428. }
  429. r_one = 0;
  430. }
  431. } else if (state == HDLC_FLAG_FOUND) {
  432. if (val & 1) {
  433. r_one++;
  434. if (r_one > 6) {
  435. state = HDLC_ZERO_SEARCH;
  436. } else {
  437. r_val >>= 1;
  438. r_val |= 0x80;
  439. bitcnt++;
  440. }
  441. } else {
  442. if (r_one == 6) {
  443. bitcnt = 0;
  444. r_val = 0;
  445. r_one = 0;
  446. val >>= 1;
  447. continue;
  448. } else if (r_one != 5) {
  449. r_val >>= 1;
  450. r_val &= 0x7f;
  451. bitcnt++;
  452. }
  453. r_one = 0;
  454. }
  455. if ((state != HDLC_ZERO_SEARCH) &&
  456. !(bitcnt & 7)) {
  457. state = HDLC_FRAME_FOUND;
  458. bcs->hw.tiger.r_fcs = PPP_INITFCS;
  459. bcs->hw.tiger.rcvbuf[0] = r_val;
  460. bcs->hw.tiger.r_fcs = PPP_FCS(bcs->hw.tiger.r_fcs, r_val);
  461. if (bcs->cs->debug & L1_DEB_HSCX)
  462. debugl1(bcs->cs, "tiger read_raw: byte1(%d,%d,%d) rval %x val %x i %x",
  463. bcs->hw.tiger.r_tot, i, j, r_val, val,
  464. bcs->cs->hw.njet.irqstat0);
  465. }
  466. } else if (state == HDLC_FRAME_FOUND) {
  467. if (val & 1) {
  468. r_one++;
  469. if (r_one > 6) {
  470. state = HDLC_ZERO_SEARCH;
  471. bitcnt = 0;
  472. } else {
  473. r_val >>= 1;
  474. r_val |= 0x80;
  475. bitcnt++;
  476. }
  477. } else {
  478. if (r_one == 6) {
  479. r_val = 0;
  480. r_one = 0;
  481. bitcnt++;
  482. if (bitcnt & 7) {
  483. debugl1(bcs->cs, "tiger: frame not byte aligned");
  484. state = HDLC_FLAG_SEARCH;
  485. bcs->hw.tiger.r_err++;
  486. #ifdef ERROR_STATISTIC
  487. bcs->err_inv++;
  488. #endif
  489. } else {
  490. if (bcs->cs->debug & L1_DEB_HSCX)
  491. debugl1(bcs->cs, "tiger frame end(%d,%d): fcs(%x) i %x",
  492. i, j, bcs->hw.tiger.r_fcs, bcs->cs->hw.njet.irqstat0);
  493. if (bcs->hw.tiger.r_fcs == PPP_GOODFCS) {
  494. got_frame(bcs, (bitcnt >> 3) - 3);
  495. } else {
  496. if (bcs->cs->debug) {
  497. debugl1(bcs->cs, "tiger FCS error");
  498. printframe(bcs->cs, bcs->hw.tiger.rcvbuf,
  499. (bitcnt >> 3) - 1, "rec");
  500. bcs->hw.tiger.r_err++;
  501. }
  502. #ifdef ERROR_STATISTIC
  503. bcs->err_crc++;
  504. #endif
  505. }
  506. state = HDLC_FLAG_FOUND;
  507. }
  508. bitcnt = 0;
  509. } else if (r_one == 5) {
  510. val >>= 1;
  511. r_one = 0;
  512. continue;
  513. } else {
  514. r_val >>= 1;
  515. r_val &= 0x7f;
  516. bitcnt++;
  517. }
  518. r_one = 0;
  519. }
  520. if ((state == HDLC_FRAME_FOUND) &&
  521. !(bitcnt & 7)) {
  522. if ((bitcnt >> 3) >= HSCX_BUFMAX) {
  523. debugl1(bcs->cs, "tiger: frame too big");
  524. r_val = 0;
  525. state = HDLC_FLAG_SEARCH;
  526. bcs->hw.tiger.r_err++;
  527. #ifdef ERROR_STATISTIC
  528. bcs->err_inv++;
  529. #endif
  530. } else {
  531. bcs->hw.tiger.rcvbuf[(bitcnt >> 3) - 1] = r_val;
  532. bcs->hw.tiger.r_fcs =
  533. PPP_FCS(bcs->hw.tiger.r_fcs, r_val);
  534. }
  535. }
  536. }
  537. val >>= 1;
  538. }
  539. bcs->hw.tiger.r_tot++;
  540. }
  541. bcs->hw.tiger.r_state = state;
  542. bcs->hw.tiger.r_one = r_one;
  543. bcs->hw.tiger.r_val = r_val;
  544. bcs->hw.tiger.r_bitcnt = bitcnt;
  545. }
  546. void read_tiger(struct IsdnCardState *cs) {
  547. u_int *p;
  548. int cnt = NETJET_DMA_RXSIZE / 2;
  549. if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_READ) {
  550. debugl1(cs, "tiger warn read double dma %x/%x",
  551. cs->hw.njet.irqstat0, cs->hw.njet.last_is0);
  552. #ifdef ERROR_STATISTIC
  553. if (cs->bcs[0].mode)
  554. cs->bcs[0].err_rdo++;
  555. if (cs->bcs[1].mode)
  556. cs->bcs[1].err_rdo++;
  557. #endif
  558. return;
  559. } else {
  560. cs->hw.njet.last_is0 &= ~NETJET_IRQM0_READ;
  561. cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ);
  562. }
  563. if (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ_1)
  564. p = cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1;
  565. else
  566. p = cs->bcs[0].hw.tiger.rec + cnt - 1;
  567. if ((cs->bcs[0].mode == L1_MODE_HDLC) || (cs->bcs[0].mode == L1_MODE_HDLC_56K))
  568. read_raw(cs->bcs, p, cnt);
  569. if ((cs->bcs[1].mode == L1_MODE_HDLC) || (cs->bcs[1].mode == L1_MODE_HDLC_56K))
  570. read_raw(cs->bcs + 1, p, cnt);
  571. cs->hw.njet.irqstat0 &= ~NETJET_IRQM0_READ;
  572. }
  573. static void write_raw(struct BCState *bcs, u_int *buf, int cnt);
  574. void netjet_fill_dma(struct BCState *bcs)
  575. {
  576. register u_int *p, *sp;
  577. register int cnt;
  578. if (!bcs->tx_skb)
  579. return;
  580. if (bcs->cs->debug & L1_DEB_HSCX)
  581. debugl1(bcs->cs, "tiger fill_dma1: c%d %4lx", bcs->channel,
  582. bcs->Flag);
  583. if (test_and_set_bit(BC_FLG_BUSY, &bcs->Flag))
  584. return;
  585. if (bcs->mode == L1_MODE_HDLC) { // it's 64k
  586. if (make_raw_data(bcs))
  587. return;
  588. }
  589. else { // it's 56k
  590. if (make_raw_data_56k(bcs))
  591. return;
  592. };
  593. if (bcs->cs->debug & L1_DEB_HSCX)
  594. debugl1(bcs->cs, "tiger fill_dma2: c%d %4lx", bcs->channel,
  595. bcs->Flag);
  596. if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) {
  597. write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free);
  598. } else if (test_and_clear_bit(BC_FLG_HALF, &bcs->Flag)) {
  599. p = bus_to_virt(inl(bcs->cs->hw.njet.base + NETJET_DMA_READ_ADR));
  600. sp = bcs->hw.tiger.sendp;
  601. if (p == bcs->hw.tiger.s_end)
  602. p = bcs->hw.tiger.send - 1;
  603. if (sp == bcs->hw.tiger.s_end)
  604. sp = bcs->hw.tiger.send - 1;
  605. cnt = p - sp;
  606. if (cnt < 0) {
  607. write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free);
  608. } else {
  609. p++;
  610. cnt++;
  611. if (p > bcs->hw.tiger.s_end)
  612. p = bcs->hw.tiger.send;
  613. p++;
  614. cnt++;
  615. if (p > bcs->hw.tiger.s_end)
  616. p = bcs->hw.tiger.send;
  617. write_raw(bcs, p, bcs->hw.tiger.free - cnt);
  618. }
  619. } else if (test_and_clear_bit(BC_FLG_EMPTY, &bcs->Flag)) {
  620. p = bus_to_virt(inl(bcs->cs->hw.njet.base + NETJET_DMA_READ_ADR));
  621. cnt = bcs->hw.tiger.s_end - p;
  622. if (cnt < 2) {
  623. p = bcs->hw.tiger.send + 1;
  624. cnt = NETJET_DMA_TXSIZE / 2 - 2;
  625. } else {
  626. p++;
  627. p++;
  628. if (cnt <= (NETJET_DMA_TXSIZE / 2))
  629. cnt += NETJET_DMA_TXSIZE / 2;
  630. cnt--;
  631. cnt--;
  632. }
  633. write_raw(bcs, p, cnt);
  634. }
  635. if (bcs->cs->debug & L1_DEB_HSCX)
  636. debugl1(bcs->cs, "tiger fill_dma3: c%d %4lx", bcs->channel,
  637. bcs->Flag);
  638. }
  639. static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
  640. u_int mask, val, *p = buf;
  641. u_int i, s_cnt;
  642. if (cnt <= 0)
  643. return;
  644. if (test_bit(BC_FLG_BUSY, &bcs->Flag)) {
  645. if (bcs->hw.tiger.sendcnt > cnt) {
  646. s_cnt = cnt;
  647. bcs->hw.tiger.sendcnt -= cnt;
  648. } else {
  649. s_cnt = bcs->hw.tiger.sendcnt;
  650. bcs->hw.tiger.sendcnt = 0;
  651. }
  652. if (bcs->channel)
  653. mask = 0xffff00ff;
  654. else
  655. mask = 0xffffff00;
  656. for (i = 0; i < s_cnt; i++) {
  657. val = bcs->channel ? ((bcs->hw.tiger.sp[i] << 8) & 0xff00) :
  658. (bcs->hw.tiger.sp[i]);
  659. *p &= mask;
  660. *p++ |= val;
  661. if (p > bcs->hw.tiger.s_end)
  662. p = bcs->hw.tiger.send;
  663. }
  664. bcs->hw.tiger.s_tot += s_cnt;
  665. if (bcs->cs->debug & L1_DEB_HSCX)
  666. debugl1(bcs->cs, "tiger write_raw: c%d %p-%p %d/%d %d %x", bcs->channel,
  667. buf, p, s_cnt, cnt,
  668. bcs->hw.tiger.sendcnt, bcs->cs->hw.njet.irqstat0);
  669. if (bcs->cs->debug & L1_DEB_HSCX_FIFO)
  670. printframe(bcs->cs, bcs->hw.tiger.sp, s_cnt, "snd");
  671. bcs->hw.tiger.sp += s_cnt;
  672. bcs->hw.tiger.sendp = p;
  673. if (!bcs->hw.tiger.sendcnt) {
  674. if (!bcs->tx_skb) {
  675. debugl1(bcs->cs, "tiger write_raw: NULL skb s_cnt %d", s_cnt);
  676. } else {
  677. if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
  678. (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
  679. u_long flags;
  680. spin_lock_irqsave(&bcs->aclock, flags);
  681. bcs->ackcnt += bcs->tx_skb->len;
  682. spin_unlock_irqrestore(&bcs->aclock, flags);
  683. schedule_event(bcs, B_ACKPENDING);
  684. }
  685. dev_kfree_skb_any(bcs->tx_skb);
  686. bcs->tx_skb = NULL;
  687. }
  688. test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
  689. bcs->hw.tiger.free = cnt - s_cnt;
  690. if (bcs->hw.tiger.free > (NETJET_DMA_TXSIZE / 2))
  691. test_and_set_bit(BC_FLG_HALF, &bcs->Flag);
  692. else {
  693. test_and_clear_bit(BC_FLG_HALF, &bcs->Flag);
  694. test_and_set_bit(BC_FLG_NOFRAME, &bcs->Flag);
  695. }
  696. if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
  697. netjet_fill_dma(bcs);
  698. } else {
  699. mask ^= 0xffffffff;
  700. if (s_cnt < cnt) {
  701. for (i = s_cnt; i < cnt; i++) {
  702. *p++ |= mask;
  703. if (p > bcs->hw.tiger.s_end)
  704. p = bcs->hw.tiger.send;
  705. }
  706. if (bcs->cs->debug & L1_DEB_HSCX)
  707. debugl1(bcs->cs, "tiger write_raw: fill rest %d",
  708. cnt - s_cnt);
  709. }
  710. test_and_set_bit(B_XMTBUFREADY, &bcs->event);
  711. schedule_work(&bcs->tqueue);
  712. }
  713. }
  714. } else if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) {
  715. test_and_set_bit(BC_FLG_HALF, &bcs->Flag);
  716. fill_mem(bcs, buf, cnt, bcs->channel, 0xff);
  717. bcs->hw.tiger.free += cnt;
  718. if (bcs->cs->debug & L1_DEB_HSCX)
  719. debugl1(bcs->cs, "tiger write_raw: fill half");
  720. } else if (test_and_clear_bit(BC_FLG_HALF, &bcs->Flag)) {
  721. test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag);
  722. fill_mem(bcs, buf, cnt, bcs->channel, 0xff);
  723. if (bcs->cs->debug & L1_DEB_HSCX)
  724. debugl1(bcs->cs, "tiger write_raw: fill full");
  725. }
  726. }
  727. void write_tiger(struct IsdnCardState *cs) {
  728. u_int *p, cnt = NETJET_DMA_TXSIZE / 2;
  729. if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_WRITE) {
  730. debugl1(cs, "tiger warn write double dma %x/%x",
  731. cs->hw.njet.irqstat0, cs->hw.njet.last_is0);
  732. #ifdef ERROR_STATISTIC
  733. if (cs->bcs[0].mode)
  734. cs->bcs[0].err_tx++;
  735. if (cs->bcs[1].mode)
  736. cs->bcs[1].err_tx++;
  737. #endif
  738. return;
  739. } else {
  740. cs->hw.njet.last_is0 &= ~NETJET_IRQM0_WRITE;
  741. cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE);
  742. }
  743. if (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE_1)
  744. p = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1;
  745. else
  746. p = cs->bcs[0].hw.tiger.send + cnt - 1;
  747. if ((cs->bcs[0].mode == L1_MODE_HDLC) || (cs->bcs[0].mode == L1_MODE_HDLC_56K))
  748. write_raw(cs->bcs, p, cnt);
  749. if ((cs->bcs[1].mode == L1_MODE_HDLC) || (cs->bcs[1].mode == L1_MODE_HDLC_56K))
  750. write_raw(cs->bcs + 1, p, cnt);
  751. cs->hw.njet.irqstat0 &= ~NETJET_IRQM0_WRITE;
  752. }
  753. static void
  754. tiger_l2l1(struct PStack *st, int pr, void *arg)
  755. {
  756. struct BCState *bcs = st->l1.bcs;
  757. struct sk_buff *skb = arg;
  758. u_long flags;
  759. switch (pr) {
  760. case (PH_DATA | REQUEST):
  761. spin_lock_irqsave(&bcs->cs->lock, flags);
  762. if (bcs->tx_skb) {
  763. skb_queue_tail(&bcs->squeue, skb);
  764. } else {
  765. bcs->tx_skb = skb;
  766. bcs->cs->BC_Send_Data(bcs);
  767. }
  768. spin_unlock_irqrestore(&bcs->cs->lock, flags);
  769. break;
  770. case (PH_PULL | INDICATION):
  771. spin_lock_irqsave(&bcs->cs->lock, flags);
  772. if (bcs->tx_skb) {
  773. printk(KERN_WARNING "tiger_l2l1: this shouldn't happen\n");
  774. } else {
  775. bcs->tx_skb = skb;
  776. bcs->cs->BC_Send_Data(bcs);
  777. }
  778. spin_unlock_irqrestore(&bcs->cs->lock, flags);
  779. break;
  780. case (PH_PULL | REQUEST):
  781. if (!bcs->tx_skb) {
  782. test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
  783. st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
  784. } else
  785. test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
  786. break;
  787. case (PH_ACTIVATE | REQUEST):
  788. spin_lock_irqsave(&bcs->cs->lock, flags);
  789. test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
  790. mode_tiger(bcs, st->l1.mode, st->l1.bc);
  791. /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */
  792. spin_unlock_irqrestore(&bcs->cs->lock, flags);
  793. bcs->cs->cardmsg(bcs->cs, MDL_BC_ASSIGN, (void *)(&st->l1.bc));
  794. l1_msg_b(st, pr, arg);
  795. break;
  796. case (PH_DEACTIVATE | REQUEST):
  797. /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */
  798. bcs->cs->cardmsg(bcs->cs, MDL_BC_RELEASE, (void *)(&st->l1.bc));
  799. l1_msg_b(st, pr, arg);
  800. break;
  801. case (PH_DEACTIVATE | CONFIRM):
  802. spin_lock_irqsave(&bcs->cs->lock, flags);
  803. test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
  804. test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
  805. mode_tiger(bcs, 0, st->l1.bc);
  806. spin_unlock_irqrestore(&bcs->cs->lock, flags);
  807. st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
  808. break;
  809. }
  810. }
  811. static void
  812. close_tigerstate(struct BCState *bcs)
  813. {
  814. mode_tiger(bcs, 0, bcs->channel);
  815. if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
  816. kfree(bcs->hw.tiger.rcvbuf);
  817. bcs->hw.tiger.rcvbuf = NULL;
  818. kfree(bcs->hw.tiger.sendbuf);
  819. bcs->hw.tiger.sendbuf = NULL;
  820. skb_queue_purge(&bcs->rqueue);
  821. skb_queue_purge(&bcs->squeue);
  822. if (bcs->tx_skb) {
  823. dev_kfree_skb_any(bcs->tx_skb);
  824. bcs->tx_skb = NULL;
  825. test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
  826. }
  827. }
  828. }
  829. static int
  830. open_tigerstate(struct IsdnCardState *cs, struct BCState *bcs)
  831. {
  832. if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
  833. if (!(bcs->hw.tiger.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
  834. printk(KERN_WARNING
  835. "HiSax: No memory for tiger.rcvbuf\n");
  836. return (1);
  837. }
  838. if (!(bcs->hw.tiger.sendbuf = kmalloc(RAW_BUFMAX, GFP_ATOMIC))) {
  839. printk(KERN_WARNING
  840. "HiSax: No memory for tiger.sendbuf\n");
  841. return (1);
  842. }
  843. skb_queue_head_init(&bcs->rqueue);
  844. skb_queue_head_init(&bcs->squeue);
  845. }
  846. bcs->tx_skb = NULL;
  847. bcs->hw.tiger.sendcnt = 0;
  848. test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
  849. bcs->event = 0;
  850. bcs->tx_cnt = 0;
  851. return (0);
  852. }
  853. static int
  854. setstack_tiger(struct PStack *st, struct BCState *bcs)
  855. {
  856. bcs->channel = st->l1.bc;
  857. if (open_tigerstate(st->l1.hardware, bcs))
  858. return (-1);
  859. st->l1.bcs = bcs;
  860. st->l2.l2l1 = tiger_l2l1;
  861. setstack_manager(st);
  862. bcs->st = st;
  863. setstack_l1_B(st);
  864. return (0);
  865. }
  866. void
  867. inittiger(struct IsdnCardState *cs)
  868. {
  869. if (!(cs->bcs[0].hw.tiger.send = kmalloc(NETJET_DMA_TXSIZE * sizeof(unsigned int),
  870. GFP_KERNEL | GFP_DMA))) {
  871. printk(KERN_WARNING
  872. "HiSax: No memory for tiger.send\n");
  873. return;
  874. }
  875. cs->bcs[0].hw.tiger.s_irq = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE / 2 - 1;
  876. cs->bcs[0].hw.tiger.s_end = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1;
  877. cs->bcs[1].hw.tiger.send = cs->bcs[0].hw.tiger.send;
  878. cs->bcs[1].hw.tiger.s_irq = cs->bcs[0].hw.tiger.s_irq;
  879. cs->bcs[1].hw.tiger.s_end = cs->bcs[0].hw.tiger.s_end;
  880. memset(cs->bcs[0].hw.tiger.send, 0xff, NETJET_DMA_TXSIZE * sizeof(unsigned int));
  881. debugl1(cs, "tiger: send buf %p - %p", cs->bcs[0].hw.tiger.send,
  882. cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1);
  883. outl(virt_to_bus(cs->bcs[0].hw.tiger.send),
  884. cs->hw.njet.base + NETJET_DMA_READ_START);
  885. outl(virt_to_bus(cs->bcs[0].hw.tiger.s_irq),
  886. cs->hw.njet.base + NETJET_DMA_READ_IRQ);
  887. outl(virt_to_bus(cs->bcs[0].hw.tiger.s_end),
  888. cs->hw.njet.base + NETJET_DMA_READ_END);
  889. if (!(cs->bcs[0].hw.tiger.rec = kmalloc(NETJET_DMA_RXSIZE * sizeof(unsigned int),
  890. GFP_KERNEL | GFP_DMA))) {
  891. printk(KERN_WARNING
  892. "HiSax: No memory for tiger.rec\n");
  893. return;
  894. }
  895. debugl1(cs, "tiger: rec buf %p - %p", cs->bcs[0].hw.tiger.rec,
  896. cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1);
  897. cs->bcs[1].hw.tiger.rec = cs->bcs[0].hw.tiger.rec;
  898. memset(cs->bcs[0].hw.tiger.rec, 0xff, NETJET_DMA_RXSIZE * sizeof(unsigned int));
  899. outl(virt_to_bus(cs->bcs[0].hw.tiger.rec),
  900. cs->hw.njet.base + NETJET_DMA_WRITE_START);
  901. outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE / 2 - 1),
  902. cs->hw.njet.base + NETJET_DMA_WRITE_IRQ);
  903. outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1),
  904. cs->hw.njet.base + NETJET_DMA_WRITE_END);
  905. debugl1(cs, "tiger: dmacfg %x/%x pulse=%d",
  906. inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR),
  907. inl(cs->hw.njet.base + NETJET_DMA_READ_ADR),
  908. bytein(cs->hw.njet.base + NETJET_PULSE_CNT));
  909. cs->hw.njet.last_is0 = 0;
  910. cs->bcs[0].BC_SetStack = setstack_tiger;
  911. cs->bcs[1].BC_SetStack = setstack_tiger;
  912. cs->bcs[0].BC_Close = close_tigerstate;
  913. cs->bcs[1].BC_Close = close_tigerstate;
  914. }
  915. static void
  916. releasetiger(struct IsdnCardState *cs)
  917. {
  918. kfree(cs->bcs[0].hw.tiger.send);
  919. cs->bcs[0].hw.tiger.send = NULL;
  920. cs->bcs[1].hw.tiger.send = NULL;
  921. kfree(cs->bcs[0].hw.tiger.rec);
  922. cs->bcs[0].hw.tiger.rec = NULL;
  923. cs->bcs[1].hw.tiger.rec = NULL;
  924. }
  925. void
  926. release_io_netjet(struct IsdnCardState *cs)
  927. {
  928. byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
  929. byteout(cs->hw.njet.base + NETJET_IRQMASK1, 0);
  930. releasetiger(cs);
  931. release_region(cs->hw.njet.base, 256);
  932. }