nj_u.c 6.8 KB

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  1. /* $Id: nj_u.c,v 2.14.2.3 2004/01/13 14:31:26 keil Exp $
  2. *
  3. * This software may be used and distributed according to the terms
  4. * of the GNU General Public License, incorporated herein by reference.
  5. *
  6. */
  7. #include <linux/init.h>
  8. #include "hisax.h"
  9. #include "icc.h"
  10. #include "isdnl1.h"
  11. #include <linux/pci.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/ppp_defs.h>
  14. #include "netjet.h"
  15. static const char *NETjet_U_revision = "$Revision: 2.14.2.3 $";
  16. static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
  17. {
  18. return (5);
  19. }
  20. static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
  21. {
  22. }
  23. static irqreturn_t
  24. netjet_u_interrupt(int intno, void *dev_id)
  25. {
  26. struct IsdnCardState *cs = dev_id;
  27. u_char val, sval;
  28. u_long flags;
  29. spin_lock_irqsave(&cs->lock, flags);
  30. if (!((sval = bytein(cs->hw.njet.base + NETJET_IRQSTAT1)) &
  31. NETJET_ISACIRQ)) {
  32. val = NETjet_ReadIC(cs, ICC_ISTA);
  33. if (cs->debug & L1_DEB_ISAC)
  34. debugl1(cs, "tiger: i1 %x %x", sval, val);
  35. if (val) {
  36. icc_interrupt(cs, val);
  37. NETjet_WriteIC(cs, ICC_MASK, 0xFF);
  38. NETjet_WriteIC(cs, ICC_MASK, 0x0);
  39. }
  40. }
  41. /* start new code 13/07/00 GE */
  42. /* set bits in sval to indicate which page is free */
  43. if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
  44. inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
  45. /* the 2nd write page is free */
  46. sval = 0x08;
  47. else /* the 1st write page is free */
  48. sval = 0x04;
  49. if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
  50. inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
  51. /* the 2nd read page is free */
  52. sval = sval | 0x02;
  53. else /* the 1st read page is free */
  54. sval = sval | 0x01;
  55. if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
  56. {
  57. if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
  58. spin_unlock_irqrestore(&cs->lock, flags);
  59. return IRQ_HANDLED;
  60. }
  61. cs->hw.njet.irqstat0 = sval;
  62. if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
  63. (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
  64. /* we have a read dma int */
  65. read_tiger(cs);
  66. if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
  67. (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
  68. /* we have a write dma int */
  69. write_tiger(cs);
  70. /* end new code 13/07/00 GE */
  71. test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
  72. }
  73. spin_unlock_irqrestore(&cs->lock, flags);
  74. return IRQ_HANDLED;
  75. }
  76. static void
  77. reset_netjet_u(struct IsdnCardState *cs)
  78. {
  79. cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
  80. byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
  81. mdelay(10);
  82. cs->hw.njet.ctrl_reg = 0x40; /* Reset Off and status read clear */
  83. /* now edge triggered for TJ320 GE 13/07/00 */
  84. byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
  85. mdelay(10);
  86. cs->hw.njet.auxd = 0xC0;
  87. cs->hw.njet.dmactrl = 0;
  88. byteout(cs->hw.njet.auxa, 0);
  89. byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
  90. byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
  91. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  92. }
  93. static int
  94. NETjet_U_card_msg(struct IsdnCardState *cs, int mt, void *arg)
  95. {
  96. u_long flags;
  97. switch (mt) {
  98. case CARD_RESET:
  99. spin_lock_irqsave(&cs->lock, flags);
  100. reset_netjet_u(cs);
  101. spin_unlock_irqrestore(&cs->lock, flags);
  102. return (0);
  103. case CARD_RELEASE:
  104. release_io_netjet(cs);
  105. return (0);
  106. case CARD_INIT:
  107. spin_lock_irqsave(&cs->lock, flags);
  108. inittiger(cs);
  109. reset_netjet_u(cs);
  110. clear_pending_icc_ints(cs);
  111. initicc(cs);
  112. /* Reenable all IRQ */
  113. cs->writeisac(cs, ICC_MASK, 0);
  114. spin_unlock_irqrestore(&cs->lock, flags);
  115. return (0);
  116. case CARD_TEST:
  117. return (0);
  118. }
  119. return (0);
  120. }
  121. static int nju_pci_probe(struct pci_dev *dev_netjet, struct IsdnCardState *cs)
  122. {
  123. if (pci_enable_device(dev_netjet))
  124. return (0);
  125. pci_set_master(dev_netjet);
  126. cs->irq = dev_netjet->irq;
  127. if (!cs->irq) {
  128. printk(KERN_WARNING "NETspider-U: No IRQ for PCI card found\n");
  129. return (0);
  130. }
  131. cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
  132. if (!cs->hw.njet.base) {
  133. printk(KERN_WARNING "NETspider-U: No IO-Adr for PCI card found\n");
  134. return (0);
  135. }
  136. return (1);
  137. }
  138. static int nju_cs_init(struct IsdnCard *card, struct IsdnCardState *cs)
  139. {
  140. cs->hw.njet.auxa = cs->hw.njet.base + NETJET_AUXDATA;
  141. cs->hw.njet.isac = cs->hw.njet.base | NETJET_ISAC_OFF;
  142. mdelay(10);
  143. cs->hw.njet.ctrl_reg = 0xff; /* Reset On */
  144. byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
  145. mdelay(10);
  146. cs->hw.njet.ctrl_reg = 0x00; /* Reset Off and status read clear */
  147. byteout(cs->hw.njet.base + NETJET_CTRL, cs->hw.njet.ctrl_reg);
  148. mdelay(10);
  149. cs->hw.njet.auxd = 0xC0;
  150. cs->hw.njet.dmactrl = 0;
  151. byteout(cs->hw.njet.auxa, 0);
  152. byteout(cs->hw.njet.base + NETJET_AUXCTRL, ~NETJET_ISACIRQ);
  153. byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
  154. byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
  155. switch (((NETjet_ReadIC(cs, ICC_RBCH) >> 5) & 3))
  156. {
  157. case 3:
  158. return 1; /* end loop */
  159. case 0:
  160. printk(KERN_WARNING "NETspider-U: NETjet-S PCI card found\n");
  161. return -1; /* continue looping */
  162. default:
  163. printk(KERN_WARNING "NETspider-U: No PCI card found\n");
  164. return 0; /* end loop & function */
  165. }
  166. return 1; /* end loop */
  167. }
  168. static int nju_cs_init_rest(struct IsdnCard *card, struct IsdnCardState *cs)
  169. {
  170. const int bytecnt = 256;
  171. printk(KERN_INFO
  172. "NETspider-U: PCI card configured at %#lx IRQ %d\n",
  173. cs->hw.njet.base, cs->irq);
  174. if (!request_region(cs->hw.njet.base, bytecnt, "netspider-u isdn")) {
  175. printk(KERN_WARNING
  176. "HiSax: NETspider-U config port %#lx-%#lx "
  177. "already in use\n",
  178. cs->hw.njet.base,
  179. cs->hw.njet.base + bytecnt);
  180. return (0);
  181. }
  182. setup_icc(cs);
  183. cs->readisac = &NETjet_ReadIC;
  184. cs->writeisac = &NETjet_WriteIC;
  185. cs->readisacfifo = &NETjet_ReadICfifo;
  186. cs->writeisacfifo = &NETjet_WriteICfifo;
  187. cs->BC_Read_Reg = &dummyrr;
  188. cs->BC_Write_Reg = &dummywr;
  189. cs->BC_Send_Data = &netjet_fill_dma;
  190. cs->cardmsg = &NETjet_U_card_msg;
  191. cs->irq_func = &netjet_u_interrupt;
  192. cs->irq_flags |= IRQF_SHARED;
  193. ICCVersion(cs, "NETspider-U:");
  194. return (1);
  195. }
  196. static struct pci_dev *dev_netjet = NULL;
  197. int setup_netjet_u(struct IsdnCard *card)
  198. {
  199. int ret;
  200. struct IsdnCardState *cs = card->cs;
  201. char tmp[64];
  202. #ifdef __BIG_ENDIAN
  203. #error "not running on big endian machines now"
  204. #endif
  205. strcpy(tmp, NETjet_U_revision);
  206. printk(KERN_INFO "HiSax: Traverse Tech. NETspider-U driver Rev. %s\n", HiSax_getrev(tmp));
  207. if (cs->typ != ISDN_CTYPE_NETJET_U)
  208. return (0);
  209. test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
  210. for (;;)
  211. {
  212. if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
  213. PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
  214. ret = nju_pci_probe(dev_netjet, cs);
  215. if (!ret)
  216. return (0);
  217. } else {
  218. printk(KERN_WARNING "NETspider-U: No PCI card found\n");
  219. return (0);
  220. }
  221. ret = nju_cs_init(card, cs);
  222. if (!ret)
  223. return (0);
  224. if (ret > 0)
  225. break;
  226. /* ret < 0 == continue looping */
  227. }
  228. return nju_cs_init_rest(card, cs);
  229. }