flexcop-sram.c 8.5 KB

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  1. /*
  2. * Linux driver for digital TV devices equipped with B2C2 FlexcopII(b)/III
  3. * flexcop-sram.c - functions for controlling the SRAM
  4. * see flexcop.c for copyright information
  5. */
  6. #include "flexcop.h"
  7. static void flexcop_sram_set_chip(struct flexcop_device *fc,
  8. flexcop_sram_type_t type)
  9. {
  10. flexcop_set_ibi_value(wan_ctrl_reg_71c, sram_chip, type);
  11. }
  12. int flexcop_sram_init(struct flexcop_device *fc)
  13. {
  14. switch (fc->rev) {
  15. case FLEXCOP_II:
  16. case FLEXCOP_IIB:
  17. flexcop_sram_set_chip(fc, FC_SRAM_1_32KB);
  18. break;
  19. case FLEXCOP_III:
  20. flexcop_sram_set_chip(fc, FC_SRAM_1_48KB);
  21. break;
  22. default:
  23. return -EINVAL;
  24. }
  25. return 0;
  26. }
  27. int flexcop_sram_set_dest(struct flexcop_device *fc, flexcop_sram_dest_t dest,
  28. flexcop_sram_dest_target_t target)
  29. {
  30. flexcop_ibi_value v;
  31. v = fc->read_ibi_reg(fc, sram_dest_reg_714);
  32. if (fc->rev != FLEXCOP_III && target == FC_SRAM_DEST_TARGET_FC3_CA) {
  33. err("SRAM destination target to available on FlexCopII(b)\n");
  34. return -EINVAL;
  35. }
  36. deb_sram("sram dest: %x target: %x\n", dest, target);
  37. if (dest & FC_SRAM_DEST_NET)
  38. v.sram_dest_reg_714.NET_Dest = target;
  39. if (dest & FC_SRAM_DEST_CAI)
  40. v.sram_dest_reg_714.CAI_Dest = target;
  41. if (dest & FC_SRAM_DEST_CAO)
  42. v.sram_dest_reg_714.CAO_Dest = target;
  43. if (dest & FC_SRAM_DEST_MEDIA)
  44. v.sram_dest_reg_714.MEDIA_Dest = target;
  45. fc->write_ibi_reg(fc,sram_dest_reg_714,v);
  46. udelay(1000); /* TODO delay really necessary */
  47. return 0;
  48. }
  49. EXPORT_SYMBOL(flexcop_sram_set_dest);
  50. void flexcop_wan_set_speed(struct flexcop_device *fc, flexcop_wan_speed_t s)
  51. {
  52. flexcop_set_ibi_value(wan_ctrl_reg_71c,wan_speed_sig,s);
  53. }
  54. EXPORT_SYMBOL(flexcop_wan_set_speed);
  55. void flexcop_sram_ctrl(struct flexcop_device *fc, int usb_wan, int sramdma, int maximumfill)
  56. {
  57. flexcop_ibi_value v = fc->read_ibi_reg(fc,sram_dest_reg_714);
  58. v.sram_dest_reg_714.ctrl_usb_wan = usb_wan;
  59. v.sram_dest_reg_714.ctrl_sramdma = sramdma;
  60. v.sram_dest_reg_714.ctrl_maximumfill = maximumfill;
  61. fc->write_ibi_reg(fc,sram_dest_reg_714,v);
  62. }
  63. EXPORT_SYMBOL(flexcop_sram_ctrl);
  64. #if 0
  65. static void flexcop_sram_write(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
  66. {
  67. int i, retries;
  68. u32 command;
  69. for (i = 0; i < len; i++) {
  70. command = bank | addr | 0x04000000 | (*buf << 0x10);
  71. retries = 2;
  72. while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
  73. mdelay(1);
  74. retries--;
  75. }
  76. if (retries == 0)
  77. printk("%s: SRAM timeout\n", __func__);
  78. write_reg_dw(adapter, 0x700, command);
  79. buf++;
  80. addr++;
  81. }
  82. }
  83. static void flex_sram_read(struct adapter *adapter, u32 bank, u32 addr, u8 *buf, u32 len)
  84. {
  85. int i, retries;
  86. u32 command, value;
  87. for (i = 0; i < len; i++) {
  88. command = bank | addr | 0x04008000;
  89. retries = 10000;
  90. while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
  91. mdelay(1);
  92. retries--;
  93. }
  94. if (retries == 0)
  95. printk("%s: SRAM timeout\n", __func__);
  96. write_reg_dw(adapter, 0x700, command);
  97. retries = 10000;
  98. while (((read_reg_dw(adapter, 0x700) & 0x80000000) != 0) && (retries > 0)) {
  99. mdelay(1);
  100. retries--;
  101. }
  102. if (retries == 0)
  103. printk("%s: SRAM timeout\n", __func__);
  104. value = read_reg_dw(adapter, 0x700) >> 0x10;
  105. *buf = (value & 0xff);
  106. addr++;
  107. buf++;
  108. }
  109. }
  110. static void sram_write_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
  111. {
  112. u32 bank;
  113. bank = 0;
  114. if (adapter->dw_sram_type == 0x20000) {
  115. bank = (addr & 0x18000) << 0x0d;
  116. }
  117. if (adapter->dw_sram_type == 0x00000) {
  118. if ((addr >> 0x0f) == 0)
  119. bank = 0x20000000;
  120. else
  121. bank = 0x10000000;
  122. }
  123. flex_sram_write(adapter, bank, addr & 0x7fff, buf, len);
  124. }
  125. static void sram_read_chunk(struct adapter *adapter, u32 addr, u8 *buf, u16 len)
  126. {
  127. u32 bank;
  128. bank = 0;
  129. if (adapter->dw_sram_type == 0x20000) {
  130. bank = (addr & 0x18000) << 0x0d;
  131. }
  132. if (adapter->dw_sram_type == 0x00000) {
  133. if ((addr >> 0x0f) == 0)
  134. bank = 0x20000000;
  135. else
  136. bank = 0x10000000;
  137. }
  138. flex_sram_read(adapter, bank, addr & 0x7fff, buf, len);
  139. }
  140. static void sram_read(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
  141. {
  142. u32 length;
  143. while (len != 0) {
  144. length = len;
  145. /* check if the address range belongs to the same
  146. * 32K memory chip. If not, the data is read
  147. * from one chip at a time */
  148. if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
  149. length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
  150. }
  151. sram_read_chunk(adapter, addr, buf, length);
  152. addr = addr + length;
  153. buf = buf + length;
  154. len = len - length;
  155. }
  156. }
  157. static void sram_write(struct adapter *adapter, u32 addr, u8 *buf, u32 len)
  158. {
  159. u32 length;
  160. while (len != 0) {
  161. length = len;
  162. /* check if the address range belongs to the same
  163. * 32K memory chip. If not, the data is
  164. * written to one chip at a time */
  165. if ((addr >> 0x0f) != ((addr + len - 1) >> 0x0f)) {
  166. length = (((addr >> 0x0f) + 1) << 0x0f) - addr;
  167. }
  168. sram_write_chunk(adapter, addr, buf, length);
  169. addr = addr + length;
  170. buf = buf + length;
  171. len = len - length;
  172. }
  173. }
  174. static void sram_set_size(struct adapter *adapter, u32 mask)
  175. {
  176. write_reg_dw(adapter, 0x71c,
  177. (mask | (~0x30000 & read_reg_dw(adapter, 0x71c))));
  178. }
  179. static void sram_init(struct adapter *adapter)
  180. {
  181. u32 tmp;
  182. tmp = read_reg_dw(adapter, 0x71c);
  183. write_reg_dw(adapter, 0x71c, 1);
  184. if (read_reg_dw(adapter, 0x71c) != 0) {
  185. write_reg_dw(adapter, 0x71c, tmp);
  186. adapter->dw_sram_type = tmp & 0x30000;
  187. ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
  188. } else {
  189. adapter->dw_sram_type = 0x10000;
  190. ddprintk("%s: dw_sram_type = %x\n", __func__, adapter->dw_sram_type);
  191. }
  192. }
  193. static int sram_test_location(struct adapter *adapter, u32 mask, u32 addr)
  194. {
  195. u8 tmp1, tmp2;
  196. dprintk("%s: mask = %x, addr = %x\n", __func__, mask, addr);
  197. sram_set_size(adapter, mask);
  198. sram_init(adapter);
  199. tmp2 = 0xa5;
  200. tmp1 = 0x4f;
  201. sram_write(adapter, addr, &tmp2, 1);
  202. sram_write(adapter, addr + 4, &tmp1, 1);
  203. tmp2 = 0;
  204. mdelay(20);
  205. sram_read(adapter, addr, &tmp2, 1);
  206. sram_read(adapter, addr, &tmp2, 1);
  207. dprintk("%s: wrote 0xa5, read 0x%2x\n", __func__, tmp2);
  208. if (tmp2 != 0xa5)
  209. return 0;
  210. tmp2 = 0x5a;
  211. tmp1 = 0xf4;
  212. sram_write(adapter, addr, &tmp2, 1);
  213. sram_write(adapter, addr + 4, &tmp1, 1);
  214. tmp2 = 0;
  215. mdelay(20);
  216. sram_read(adapter, addr, &tmp2, 1);
  217. sram_read(adapter, addr, &tmp2, 1);
  218. dprintk("%s: wrote 0x5a, read 0x%2x\n", __func__, tmp2);
  219. if (tmp2 != 0x5a)
  220. return 0;
  221. return 1;
  222. }
  223. static u32 sram_length(struct adapter *adapter)
  224. {
  225. if (adapter->dw_sram_type == 0x10000)
  226. return 32768; /* 32K */
  227. if (adapter->dw_sram_type == 0x00000)
  228. return 65536; /* 64K */
  229. if (adapter->dw_sram_type == 0x20000)
  230. return 131072; /* 128K */
  231. return 32768; /* 32K */
  232. }
  233. /* FlexcopII can work with 32K, 64K or 128K of external SRAM memory.
  234. - for 128K there are 4x32K chips at bank 0,1,2,3.
  235. - for 64K there are 2x32K chips at bank 1,2.
  236. - for 32K there is one 32K chip at bank 0.
  237. FlexCop works only with one bank at a time. The bank is selected
  238. by bits 28-29 of the 0x700 register.
  239. bank 0 covers addresses 0x00000-0x07fff
  240. bank 1 covers addresses 0x08000-0x0ffff
  241. bank 2 covers addresses 0x10000-0x17fff
  242. bank 3 covers addresses 0x18000-0x1ffff */
  243. static int flexcop_sram_detect(struct flexcop_device *fc)
  244. {
  245. flexcop_ibi_value r208, r71c_0, vr71c_1;
  246. r208 = fc->read_ibi_reg(fc, ctrl_208);
  247. fc->write_ibi_reg(fc, ctrl_208, ibi_zero);
  248. r71c_0 = fc->read_ibi_reg(fc, wan_ctrl_reg_71c);
  249. write_reg_dw(adapter, 0x71c, 1);
  250. tmp3 = read_reg_dw(adapter, 0x71c);
  251. dprintk("%s: tmp3 = %x\n", __func__, tmp3);
  252. write_reg_dw(adapter, 0x71c, tmp2);
  253. // check for internal SRAM ???
  254. tmp3--;
  255. if (tmp3 != 0) {
  256. sram_set_size(adapter, 0x10000);
  257. sram_init(adapter);
  258. write_reg_dw(adapter, 0x208, tmp);
  259. dprintk("%s: sram size = 32K\n", __func__);
  260. return 32;
  261. }
  262. if (sram_test_location(adapter, 0x20000, 0x18000) != 0) {
  263. sram_set_size(adapter, 0x20000);
  264. sram_init(adapter);
  265. write_reg_dw(adapter, 0x208, tmp);
  266. dprintk("%s: sram size = 128K\n", __func__);
  267. return 128;
  268. }
  269. if (sram_test_location(adapter, 0x00000, 0x10000) != 0) {
  270. sram_set_size(adapter, 0x00000);
  271. sram_init(adapter);
  272. write_reg_dw(adapter, 0x208, tmp);
  273. dprintk("%s: sram size = 64K\n", __func__);
  274. return 64;
  275. }
  276. if (sram_test_location(adapter, 0x10000, 0x00000) != 0) {
  277. sram_set_size(adapter, 0x10000);
  278. sram_init(adapter);
  279. write_reg_dw(adapter, 0x208, tmp);
  280. dprintk("%s: sram size = 32K\n", __func__);
  281. return 32;
  282. }
  283. sram_set_size(adapter, 0x10000);
  284. sram_init(adapter);
  285. write_reg_dw(adapter, 0x208, tmp);
  286. dprintk("%s: SRAM detection failed. Set to 32K \n", __func__);
  287. return 0;
  288. }
  289. static void sll_detect_sram_size(struct adapter *adapter)
  290. {
  291. sram_detect_for_flex2(adapter);
  292. }
  293. #endif