horus3a.c 10 KB

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  1. /*
  2. * horus3a.h
  3. *
  4. * Sony Horus3A DVB-S/S2 tuner driver
  5. *
  6. * Copyright 2012 Sony Corporation
  7. * Copyright (C) 2014 NetUP Inc.
  8. * Copyright (C) 2014 Sergey Kozlov <serjk@netup.ru>
  9. * Copyright (C) 2014 Abylay Ospan <aospan@netup.ru>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. */
  21. #include <linux/slab.h>
  22. #include <linux/module.h>
  23. #include <linux/dvb/frontend.h>
  24. #include <linux/types.h>
  25. #include "horus3a.h"
  26. #include "dvb_frontend.h"
  27. #define MAX_WRITE_REGSIZE 5
  28. enum horus3a_state {
  29. STATE_UNKNOWN,
  30. STATE_SLEEP,
  31. STATE_ACTIVE
  32. };
  33. struct horus3a_priv {
  34. u32 frequency;
  35. u8 i2c_address;
  36. struct i2c_adapter *i2c;
  37. enum horus3a_state state;
  38. void *set_tuner_data;
  39. int (*set_tuner)(void *, int);
  40. };
  41. static void horus3a_i2c_debug(struct horus3a_priv *priv,
  42. u8 reg, u8 write, const u8 *data, u32 len)
  43. {
  44. dev_dbg(&priv->i2c->dev, "horus3a: I2C %s reg 0x%02x size %d\n",
  45. (write == 0 ? "read" : "write"), reg, len);
  46. print_hex_dump_bytes("horus3a: I2C data: ",
  47. DUMP_PREFIX_OFFSET, data, len);
  48. }
  49. static int horus3a_write_regs(struct horus3a_priv *priv,
  50. u8 reg, const u8 *data, u32 len)
  51. {
  52. int ret;
  53. u8 buf[MAX_WRITE_REGSIZE + 1];
  54. struct i2c_msg msg[1] = {
  55. {
  56. .addr = priv->i2c_address,
  57. .flags = 0,
  58. .len = len + 1,
  59. .buf = buf,
  60. }
  61. };
  62. if (len + 1 >= sizeof(buf)) {
  63. dev_warn(&priv->i2c->dev,"wr reg=%04x: len=%d is too big!\n",
  64. reg, len + 1);
  65. return -E2BIG;
  66. }
  67. horus3a_i2c_debug(priv, reg, 1, data, len);
  68. buf[0] = reg;
  69. memcpy(&buf[1], data, len);
  70. ret = i2c_transfer(priv->i2c, msg, 1);
  71. if (ret >= 0 && ret != 1)
  72. ret = -EREMOTEIO;
  73. if (ret < 0) {
  74. dev_warn(&priv->i2c->dev,
  75. "%s: i2c wr failed=%d reg=%02x len=%d\n",
  76. KBUILD_MODNAME, ret, reg, len);
  77. return ret;
  78. }
  79. return 0;
  80. }
  81. static int horus3a_write_reg(struct horus3a_priv *priv, u8 reg, u8 val)
  82. {
  83. u8 tmp = val; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
  84. return horus3a_write_regs(priv, reg, &tmp, 1);
  85. }
  86. static int horus3a_enter_power_save(struct horus3a_priv *priv)
  87. {
  88. u8 data[2];
  89. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  90. if (priv->state == STATE_SLEEP)
  91. return 0;
  92. /* IQ Generator disable */
  93. horus3a_write_reg(priv, 0x2a, 0x79);
  94. /* MDIV_EN = 0 */
  95. horus3a_write_reg(priv, 0x29, 0x70);
  96. /* VCO disable preparation */
  97. horus3a_write_reg(priv, 0x28, 0x3e);
  98. /* VCO buffer disable */
  99. horus3a_write_reg(priv, 0x2a, 0x19);
  100. /* VCO calibration disable */
  101. horus3a_write_reg(priv, 0x1c, 0x00);
  102. /* Power save setting (xtal is not stopped) */
  103. data[0] = 0xC0;
  104. /* LNA is Disabled */
  105. data[1] = 0xA7;
  106. /* 0x11 - 0x12 */
  107. horus3a_write_regs(priv, 0x11, data, sizeof(data));
  108. priv->state = STATE_SLEEP;
  109. return 0;
  110. }
  111. static int horus3a_leave_power_save(struct horus3a_priv *priv)
  112. {
  113. u8 data[2];
  114. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  115. if (priv->state == STATE_ACTIVE)
  116. return 0;
  117. /* Leave power save */
  118. data[0] = 0x00;
  119. /* LNA is Disabled */
  120. data[1] = 0xa7;
  121. /* 0x11 - 0x12 */
  122. horus3a_write_regs(priv, 0x11, data, sizeof(data));
  123. /* VCO buffer enable */
  124. horus3a_write_reg(priv, 0x2a, 0x79);
  125. /* VCO calibration enable */
  126. horus3a_write_reg(priv, 0x1c, 0xc0);
  127. /* MDIV_EN = 1 */
  128. horus3a_write_reg(priv, 0x29, 0x71);
  129. usleep_range(5000, 7000);
  130. priv->state = STATE_ACTIVE;
  131. return 0;
  132. }
  133. static int horus3a_init(struct dvb_frontend *fe)
  134. {
  135. struct horus3a_priv *priv = fe->tuner_priv;
  136. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  137. return 0;
  138. }
  139. static int horus3a_release(struct dvb_frontend *fe)
  140. {
  141. struct horus3a_priv *priv = fe->tuner_priv;
  142. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  143. kfree(fe->tuner_priv);
  144. fe->tuner_priv = NULL;
  145. return 0;
  146. }
  147. static int horus3a_sleep(struct dvb_frontend *fe)
  148. {
  149. struct horus3a_priv *priv = fe->tuner_priv;
  150. dev_dbg(&priv->i2c->dev, "%s()\n", __func__);
  151. horus3a_enter_power_save(priv);
  152. return 0;
  153. }
  154. static int horus3a_set_params(struct dvb_frontend *fe)
  155. {
  156. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  157. struct horus3a_priv *priv = fe->tuner_priv;
  158. u32 frequency = p->frequency;
  159. u32 symbol_rate = p->symbol_rate/1000;
  160. u8 mixdiv = 0;
  161. u8 mdiv = 0;
  162. u32 ms = 0;
  163. u8 f_ctl = 0;
  164. u8 g_ctl = 0;
  165. u8 fc_lpf = 0;
  166. u8 data[5];
  167. dev_dbg(&priv->i2c->dev, "%s(): frequency %dkHz symbol_rate %dksps\n",
  168. __func__, frequency, symbol_rate);
  169. if (priv->set_tuner)
  170. priv->set_tuner(priv->set_tuner_data, 0);
  171. if (priv->state == STATE_SLEEP)
  172. horus3a_leave_power_save(priv);
  173. /* frequency should be X MHz (X : integer) */
  174. frequency = DIV_ROUND_CLOSEST(frequency, 1000) * 1000;
  175. if (frequency <= 1155000) {
  176. mixdiv = 4;
  177. mdiv = 1;
  178. } else {
  179. mixdiv = 2;
  180. mdiv = 0;
  181. }
  182. /* Assumed that fREF == 1MHz (1000kHz) */
  183. ms = DIV_ROUND_CLOSEST((frequency * mixdiv) / 2, 1000);
  184. if (ms > 0x7FFF) { /* 15 bit */
  185. dev_err(&priv->i2c->dev, "horus3a: invalid frequency %d\n",
  186. frequency);
  187. return -EINVAL;
  188. }
  189. if (frequency < 975000) {
  190. /* F_CTL=11100 G_CTL=001 */
  191. f_ctl = 0x1C;
  192. g_ctl = 0x01;
  193. } else if (frequency < 1050000) {
  194. /* F_CTL=11000 G_CTL=010 */
  195. f_ctl = 0x18;
  196. g_ctl = 0x02;
  197. } else if (frequency < 1150000) {
  198. /* F_CTL=10100 G_CTL=010 */
  199. f_ctl = 0x14;
  200. g_ctl = 0x02;
  201. } else if (frequency < 1250000) {
  202. /* F_CTL=10000 G_CTL=011 */
  203. f_ctl = 0x10;
  204. g_ctl = 0x03;
  205. } else if (frequency < 1350000) {
  206. /* F_CTL=01100 G_CTL=100 */
  207. f_ctl = 0x0C;
  208. g_ctl = 0x04;
  209. } else if (frequency < 1450000) {
  210. /* F_CTL=01010 G_CTL=100 */
  211. f_ctl = 0x0A;
  212. g_ctl = 0x04;
  213. } else if (frequency < 1600000) {
  214. /* F_CTL=00111 G_CTL=101 */
  215. f_ctl = 0x07;
  216. g_ctl = 0x05;
  217. } else if (frequency < 1800000) {
  218. /* F_CTL=00100 G_CTL=010 */
  219. f_ctl = 0x04;
  220. g_ctl = 0x02;
  221. } else if (frequency < 2000000) {
  222. /* F_CTL=00010 G_CTL=001 */
  223. f_ctl = 0x02;
  224. g_ctl = 0x01;
  225. } else {
  226. /* F_CTL=00000 G_CTL=000 */
  227. f_ctl = 0x00;
  228. g_ctl = 0x00;
  229. }
  230. /* LPF cutoff frequency setting */
  231. if (p->delivery_system == SYS_DVBS) {
  232. /*
  233. * rolloff = 0.35
  234. * SR <= 4.3
  235. * fc_lpf = 5
  236. * 4.3 < SR <= 10
  237. * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2 =
  238. * SR * 1.175 = SR * (47/40)
  239. * 10 < SR
  240. * fc_lpf = SR * (1 + rolloff) / 2 + 5 =
  241. * SR * 0.675 + 5 = SR * (27/40) + 5
  242. * NOTE: The result should be round up.
  243. */
  244. if (symbol_rate <= 4300)
  245. fc_lpf = 5;
  246. else if (symbol_rate <= 10000)
  247. fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 47, 40000);
  248. else
  249. fc_lpf = (u8)DIV_ROUND_UP(symbol_rate * 27, 40000) + 5;
  250. /* 5 <= fc_lpf <= 36 */
  251. if (fc_lpf > 36)
  252. fc_lpf = 36;
  253. } else if (p->delivery_system == SYS_DVBS2) {
  254. int rolloff;
  255. switch (p->rolloff) {
  256. case ROLLOFF_35:
  257. rolloff = 35;
  258. break;
  259. case ROLLOFF_25:
  260. rolloff = 25;
  261. break;
  262. case ROLLOFF_20:
  263. rolloff = 20;
  264. break;
  265. case ROLLOFF_AUTO:
  266. default:
  267. dev_err(&priv->i2c->dev,
  268. "horus3a: auto roll-off is not supported\n");
  269. return -EINVAL;
  270. }
  271. /*
  272. * SR <= 4.5:
  273. * fc_lpf = 5
  274. * 4.5 < SR <= 10:
  275. * fc_lpf = SR * (1 + rolloff) / 2 + SR / 2
  276. * 10 < SR:
  277. * fc_lpf = SR * (1 + rolloff) / 2 + 5
  278. * NOTE: The result should be round up.
  279. */
  280. if (symbol_rate <= 4500)
  281. fc_lpf = 5;
  282. else if (symbol_rate <= 10000)
  283. fc_lpf = (u8)DIV_ROUND_UP(
  284. symbol_rate * (200 + rolloff), 200000);
  285. else
  286. fc_lpf = (u8)DIV_ROUND_UP(
  287. symbol_rate * (100 + rolloff), 200000) + 5;
  288. /* 5 <= fc_lpf <= 36 is valid */
  289. if (fc_lpf > 36)
  290. fc_lpf = 36;
  291. } else {
  292. dev_err(&priv->i2c->dev,
  293. "horus3a: invalid delivery system %d\n",
  294. p->delivery_system);
  295. return -EINVAL;
  296. }
  297. /* 0x00 - 0x04 */
  298. data[0] = (u8)((ms >> 7) & 0xFF);
  299. data[1] = (u8)((ms << 1) & 0xFF);
  300. data[2] = 0x00;
  301. data[3] = 0x00;
  302. data[4] = (u8)(mdiv << 7);
  303. horus3a_write_regs(priv, 0x00, data, sizeof(data));
  304. /* Write G_CTL, F_CTL */
  305. horus3a_write_reg(priv, 0x09, (u8)((g_ctl << 5) | f_ctl));
  306. /* Write LPF cutoff frequency */
  307. horus3a_write_reg(priv, 0x37, (u8)(0x80 | (fc_lpf << 1)));
  308. /* Start Calibration */
  309. horus3a_write_reg(priv, 0x05, 0x80);
  310. /* IQ Generator enable */
  311. horus3a_write_reg(priv, 0x2a, 0x7b);
  312. /* tuner stabilization time */
  313. msleep(60);
  314. /* Store tuned frequency to the struct */
  315. priv->frequency = ms * 2 * 1000 / mixdiv;
  316. return 0;
  317. }
  318. static int horus3a_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  319. {
  320. struct horus3a_priv *priv = fe->tuner_priv;
  321. *frequency = priv->frequency;
  322. return 0;
  323. }
  324. static struct dvb_tuner_ops horus3a_tuner_ops = {
  325. .info = {
  326. .name = "Sony Horus3a",
  327. .frequency_min = 950000,
  328. .frequency_max = 2150000,
  329. .frequency_step = 1000,
  330. },
  331. .init = horus3a_init,
  332. .release = horus3a_release,
  333. .sleep = horus3a_sleep,
  334. .set_params = horus3a_set_params,
  335. .get_frequency = horus3a_get_frequency,
  336. };
  337. struct dvb_frontend *horus3a_attach(struct dvb_frontend *fe,
  338. const struct horus3a_config *config,
  339. struct i2c_adapter *i2c)
  340. {
  341. u8 buf[3], val;
  342. struct horus3a_priv *priv = NULL;
  343. priv = kzalloc(sizeof(struct horus3a_priv), GFP_KERNEL);
  344. if (priv == NULL)
  345. return NULL;
  346. priv->i2c_address = (config->i2c_address >> 1);
  347. priv->i2c = i2c;
  348. priv->set_tuner_data = config->set_tuner_priv;
  349. priv->set_tuner = config->set_tuner_callback;
  350. if (fe->ops.i2c_gate_ctrl)
  351. fe->ops.i2c_gate_ctrl(fe, 1);
  352. /* wait 4ms after power on */
  353. usleep_range(4000, 6000);
  354. /* IQ Generator disable */
  355. horus3a_write_reg(priv, 0x2a, 0x79);
  356. /* REF_R = Xtal Frequency */
  357. buf[0] = config->xtal_freq_mhz;
  358. buf[1] = config->xtal_freq_mhz;
  359. buf[2] = 0;
  360. /* 0x6 - 0x8 */
  361. horus3a_write_regs(priv, 0x6, buf, 3);
  362. /* IQ Out = Single Ended */
  363. horus3a_write_reg(priv, 0x0a, 0x40);
  364. switch (config->xtal_freq_mhz) {
  365. case 27:
  366. val = 0x1f;
  367. break;
  368. case 24:
  369. val = 0x10;
  370. break;
  371. case 16:
  372. val = 0xc;
  373. break;
  374. default:
  375. val = 0;
  376. dev_warn(&priv->i2c->dev,
  377. "horus3a: invalid xtal frequency %dMHz\n",
  378. config->xtal_freq_mhz);
  379. break;
  380. }
  381. val <<= 2;
  382. horus3a_write_reg(priv, 0x0e, val);
  383. horus3a_enter_power_save(priv);
  384. usleep_range(3000, 5000);
  385. if (fe->ops.i2c_gate_ctrl)
  386. fe->ops.i2c_gate_ctrl(fe, 0);
  387. memcpy(&fe->ops.tuner_ops, &horus3a_tuner_ops,
  388. sizeof(struct dvb_tuner_ops));
  389. fe->tuner_priv = priv;
  390. dev_info(&priv->i2c->dev,
  391. "Sony HORUS3A attached on addr=%x at I2C adapter %p\n",
  392. priv->i2c_address, priv->i2c);
  393. return fe;
  394. }
  395. EXPORT_SYMBOL(horus3a_attach);
  396. MODULE_DESCRIPTION("Sony HORUS3A sattelite tuner driver");
  397. MODULE_AUTHOR("Sergey Kozlov <serjk@netup.ru>");
  398. MODULE_LICENSE("GPL");