ts2020.c 18 KB

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  1. /*
  2. Montage Technology TS2020 - Silicon Tuner driver
  3. Copyright (C) 2009-2012 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
  4. Copyright (C) 2009-2012 TurboSight.com
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. */
  17. #include "dvb_frontend.h"
  18. #include "ts2020.h"
  19. #include <linux/regmap.h>
  20. #include <linux/math64.h>
  21. #define TS2020_XTAL_FREQ 27000 /* in kHz */
  22. #define FREQ_OFFSET_LOW_SYM_RATE 3000
  23. struct ts2020_priv {
  24. struct i2c_client *client;
  25. struct mutex regmap_mutex;
  26. struct regmap_config regmap_config;
  27. struct regmap *regmap;
  28. struct dvb_frontend *fe;
  29. struct delayed_work stat_work;
  30. int (*get_agc_pwm)(struct dvb_frontend *fe, u8 *_agc_pwm);
  31. /* i2c details */
  32. struct i2c_adapter *i2c;
  33. int i2c_address;
  34. bool loop_through:1;
  35. u8 clk_out:2;
  36. u8 clk_out_div:5;
  37. bool dont_poll:1;
  38. u32 frequency_div; /* LO output divider switch frequency */
  39. u32 frequency_khz; /* actual used LO frequency */
  40. #define TS2020_M88TS2020 0
  41. #define TS2020_M88TS2022 1
  42. u8 tuner;
  43. };
  44. struct ts2020_reg_val {
  45. u8 reg;
  46. u8 val;
  47. };
  48. static void ts2020_stat_work(struct work_struct *work);
  49. static int ts2020_release(struct dvb_frontend *fe)
  50. {
  51. struct ts2020_priv *priv = fe->tuner_priv;
  52. struct i2c_client *client = priv->client;
  53. dev_dbg(&client->dev, "\n");
  54. i2c_unregister_device(client);
  55. return 0;
  56. }
  57. static int ts2020_sleep(struct dvb_frontend *fe)
  58. {
  59. struct ts2020_priv *priv = fe->tuner_priv;
  60. int ret;
  61. u8 u8tmp;
  62. if (priv->tuner == TS2020_M88TS2020)
  63. u8tmp = 0x0a; /* XXX: probably wrong */
  64. else
  65. u8tmp = 0x00;
  66. ret = regmap_write(priv->regmap, u8tmp, 0x00);
  67. if (ret < 0)
  68. return ret;
  69. /* stop statistics polling */
  70. if (!priv->dont_poll)
  71. cancel_delayed_work_sync(&priv->stat_work);
  72. return 0;
  73. }
  74. static int ts2020_init(struct dvb_frontend *fe)
  75. {
  76. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  77. struct ts2020_priv *priv = fe->tuner_priv;
  78. int i;
  79. u8 u8tmp;
  80. if (priv->tuner == TS2020_M88TS2020) {
  81. regmap_write(priv->regmap, 0x42, 0x73);
  82. regmap_write(priv->regmap, 0x05, priv->clk_out_div);
  83. regmap_write(priv->regmap, 0x20, 0x27);
  84. regmap_write(priv->regmap, 0x07, 0x02);
  85. regmap_write(priv->regmap, 0x11, 0xff);
  86. regmap_write(priv->regmap, 0x60, 0xf9);
  87. regmap_write(priv->regmap, 0x08, 0x01);
  88. regmap_write(priv->regmap, 0x00, 0x41);
  89. } else {
  90. static const struct ts2020_reg_val reg_vals[] = {
  91. {0x7d, 0x9d},
  92. {0x7c, 0x9a},
  93. {0x7a, 0x76},
  94. {0x3b, 0x01},
  95. {0x63, 0x88},
  96. {0x61, 0x85},
  97. {0x22, 0x30},
  98. {0x30, 0x40},
  99. {0x20, 0x23},
  100. {0x24, 0x02},
  101. {0x12, 0xa0},
  102. };
  103. regmap_write(priv->regmap, 0x00, 0x01);
  104. regmap_write(priv->regmap, 0x00, 0x03);
  105. switch (priv->clk_out) {
  106. case TS2020_CLK_OUT_DISABLED:
  107. u8tmp = 0x60;
  108. break;
  109. case TS2020_CLK_OUT_ENABLED:
  110. u8tmp = 0x70;
  111. regmap_write(priv->regmap, 0x05, priv->clk_out_div);
  112. break;
  113. case TS2020_CLK_OUT_ENABLED_XTALOUT:
  114. u8tmp = 0x6c;
  115. break;
  116. default:
  117. u8tmp = 0x60;
  118. break;
  119. }
  120. regmap_write(priv->regmap, 0x42, u8tmp);
  121. if (priv->loop_through)
  122. u8tmp = 0xec;
  123. else
  124. u8tmp = 0x6c;
  125. regmap_write(priv->regmap, 0x62, u8tmp);
  126. for (i = 0; i < ARRAY_SIZE(reg_vals); i++)
  127. regmap_write(priv->regmap, reg_vals[i].reg,
  128. reg_vals[i].val);
  129. }
  130. /* Initialise v5 stats here */
  131. c->strength.len = 1;
  132. c->strength.stat[0].scale = FE_SCALE_DECIBEL;
  133. c->strength.stat[0].uvalue = 0;
  134. /* Start statistics polling by invoking the work function */
  135. ts2020_stat_work(&priv->stat_work.work);
  136. return 0;
  137. }
  138. static int ts2020_tuner_gate_ctrl(struct dvb_frontend *fe, u8 offset)
  139. {
  140. struct ts2020_priv *priv = fe->tuner_priv;
  141. int ret;
  142. ret = regmap_write(priv->regmap, 0x51, 0x1f - offset);
  143. ret |= regmap_write(priv->regmap, 0x51, 0x1f);
  144. ret |= regmap_write(priv->regmap, 0x50, offset);
  145. ret |= regmap_write(priv->regmap, 0x50, 0x00);
  146. msleep(20);
  147. return ret;
  148. }
  149. static int ts2020_set_tuner_rf(struct dvb_frontend *fe)
  150. {
  151. struct ts2020_priv *dev = fe->tuner_priv;
  152. int ret;
  153. unsigned int utmp;
  154. ret = regmap_read(dev->regmap, 0x3d, &utmp);
  155. utmp &= 0x7f;
  156. if (utmp < 0x16)
  157. utmp = 0xa1;
  158. else if (utmp == 0x16)
  159. utmp = 0x99;
  160. else
  161. utmp = 0xf9;
  162. regmap_write(dev->regmap, 0x60, utmp);
  163. ret = ts2020_tuner_gate_ctrl(fe, 0x08);
  164. return ret;
  165. }
  166. static int ts2020_set_params(struct dvb_frontend *fe)
  167. {
  168. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  169. struct ts2020_priv *priv = fe->tuner_priv;
  170. int ret;
  171. unsigned int utmp;
  172. u32 f3db, gdiv28;
  173. u16 u16tmp, value, lpf_coeff;
  174. u8 buf[3], reg10, lpf_mxdiv, mlpf_max, mlpf_min, nlpf;
  175. unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n;
  176. unsigned int frequency_khz = c->frequency;
  177. /*
  178. * Integer-N PLL synthesizer
  179. * kHz is used for all calculations to keep calculations within 32-bit
  180. */
  181. f_ref_khz = TS2020_XTAL_FREQ;
  182. div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
  183. /* select LO output divider */
  184. if (frequency_khz < priv->frequency_div) {
  185. div_out = 4;
  186. reg10 = 0x10;
  187. } else {
  188. div_out = 2;
  189. reg10 = 0x00;
  190. }
  191. f_vco_khz = frequency_khz * div_out;
  192. pll_n = f_vco_khz * div_ref / f_ref_khz;
  193. pll_n += pll_n % 2;
  194. priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
  195. pr_debug("frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
  196. priv->frequency_khz, priv->frequency_khz - c->frequency,
  197. f_vco_khz, pll_n, div_ref, div_out);
  198. if (priv->tuner == TS2020_M88TS2020) {
  199. lpf_coeff = 2766;
  200. reg10 |= 0x01;
  201. ret = regmap_write(priv->regmap, 0x10, reg10);
  202. } else {
  203. lpf_coeff = 3200;
  204. reg10 |= 0x0b;
  205. ret = regmap_write(priv->regmap, 0x10, reg10);
  206. ret |= regmap_write(priv->regmap, 0x11, 0x40);
  207. }
  208. u16tmp = pll_n - 1024;
  209. buf[0] = (u16tmp >> 8) & 0xff;
  210. buf[1] = (u16tmp >> 0) & 0xff;
  211. buf[2] = div_ref - 8;
  212. ret |= regmap_write(priv->regmap, 0x01, buf[0]);
  213. ret |= regmap_write(priv->regmap, 0x02, buf[1]);
  214. ret |= regmap_write(priv->regmap, 0x03, buf[2]);
  215. ret |= ts2020_tuner_gate_ctrl(fe, 0x10);
  216. if (ret < 0)
  217. return -ENODEV;
  218. ret |= ts2020_tuner_gate_ctrl(fe, 0x08);
  219. /* Tuner RF */
  220. if (priv->tuner == TS2020_M88TS2020)
  221. ret |= ts2020_set_tuner_rf(fe);
  222. gdiv28 = (TS2020_XTAL_FREQ / 1000 * 1694 + 500) / 1000;
  223. ret |= regmap_write(priv->regmap, 0x04, gdiv28 & 0xff);
  224. ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
  225. if (ret < 0)
  226. return -ENODEV;
  227. if (priv->tuner == TS2020_M88TS2022) {
  228. ret = regmap_write(priv->regmap, 0x25, 0x00);
  229. ret |= regmap_write(priv->regmap, 0x27, 0x70);
  230. ret |= regmap_write(priv->regmap, 0x41, 0x09);
  231. ret |= regmap_write(priv->regmap, 0x08, 0x0b);
  232. if (ret < 0)
  233. return -ENODEV;
  234. }
  235. regmap_read(priv->regmap, 0x26, &utmp);
  236. value = utmp;
  237. f3db = (c->bandwidth_hz / 1000 / 2) + 2000;
  238. f3db += FREQ_OFFSET_LOW_SYM_RATE; /* FIXME: ~always too wide filter */
  239. f3db = clamp(f3db, 7000U, 40000U);
  240. gdiv28 = gdiv28 * 207 / (value * 2 + 151);
  241. mlpf_max = gdiv28 * 135 / 100;
  242. mlpf_min = gdiv28 * 78 / 100;
  243. if (mlpf_max > 63)
  244. mlpf_max = 63;
  245. nlpf = (f3db * gdiv28 * 2 / lpf_coeff /
  246. (TS2020_XTAL_FREQ / 1000) + 1) / 2;
  247. if (nlpf > 23)
  248. nlpf = 23;
  249. if (nlpf < 1)
  250. nlpf = 1;
  251. lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
  252. * lpf_coeff * 2 / f3db + 1) / 2;
  253. if (lpf_mxdiv < mlpf_min) {
  254. nlpf++;
  255. lpf_mxdiv = (nlpf * (TS2020_XTAL_FREQ / 1000)
  256. * lpf_coeff * 2 / f3db + 1) / 2;
  257. }
  258. if (lpf_mxdiv > mlpf_max)
  259. lpf_mxdiv = mlpf_max;
  260. ret = regmap_write(priv->regmap, 0x04, lpf_mxdiv);
  261. ret |= regmap_write(priv->regmap, 0x06, nlpf);
  262. ret |= ts2020_tuner_gate_ctrl(fe, 0x04);
  263. ret |= ts2020_tuner_gate_ctrl(fe, 0x01);
  264. msleep(80);
  265. return (ret < 0) ? -EINVAL : 0;
  266. }
  267. static int ts2020_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  268. {
  269. struct ts2020_priv *priv = fe->tuner_priv;
  270. *frequency = priv->frequency_khz;
  271. return 0;
  272. }
  273. static int ts2020_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  274. {
  275. *frequency = 0; /* Zero-IF */
  276. return 0;
  277. }
  278. /*
  279. * Get the tuner gain.
  280. * @fe: The front end for which we're determining the gain
  281. * @v_agc: The voltage of the AGC from the demodulator (0-2600mV)
  282. * @_gain: Where to store the gain (in 0.001dB units)
  283. *
  284. * Returns 0 or a negative error code.
  285. */
  286. static int ts2020_read_tuner_gain(struct dvb_frontend *fe, unsigned v_agc,
  287. __s64 *_gain)
  288. {
  289. struct ts2020_priv *priv = fe->tuner_priv;
  290. unsigned long gain1, gain2, gain3;
  291. unsigned utmp;
  292. int ret;
  293. /* Read the RF gain */
  294. ret = regmap_read(priv->regmap, 0x3d, &utmp);
  295. if (ret < 0)
  296. return ret;
  297. gain1 = utmp & 0x1f;
  298. /* Read the baseband gain */
  299. ret = regmap_read(priv->regmap, 0x21, &utmp);
  300. if (ret < 0)
  301. return ret;
  302. gain2 = utmp & 0x1f;
  303. switch (priv->tuner) {
  304. case TS2020_M88TS2020:
  305. gain1 = clamp_t(long, gain1, 0, 15);
  306. gain2 = clamp_t(long, gain2, 0, 13);
  307. v_agc = clamp_t(long, v_agc, 400, 1100);
  308. *_gain = -((__s64)gain1 * 2330 +
  309. gain2 * 3500 +
  310. v_agc * 24 / 10 * 10 +
  311. 10000);
  312. /* gain in range -19600 to -116850 in units of 0.001dB */
  313. break;
  314. case TS2020_M88TS2022:
  315. ret = regmap_read(priv->regmap, 0x66, &utmp);
  316. if (ret < 0)
  317. return ret;
  318. gain3 = (utmp >> 3) & 0x07;
  319. gain1 = clamp_t(long, gain1, 0, 15);
  320. gain2 = clamp_t(long, gain2, 2, 16);
  321. gain3 = clamp_t(long, gain3, 0, 6);
  322. v_agc = clamp_t(long, v_agc, 600, 1600);
  323. *_gain = -((__s64)gain1 * 2650 +
  324. gain2 * 3380 +
  325. gain3 * 2850 +
  326. v_agc * 176 / 100 * 10 -
  327. 30000);
  328. /* gain in range -47320 to -158950 in units of 0.001dB */
  329. break;
  330. }
  331. return 0;
  332. }
  333. /*
  334. * Get the AGC information from the demodulator and use that to calculate the
  335. * tuner gain.
  336. */
  337. static int ts2020_get_tuner_gain(struct dvb_frontend *fe, __s64 *_gain)
  338. {
  339. struct ts2020_priv *priv = fe->tuner_priv;
  340. int v_agc = 0, ret;
  341. u8 agc_pwm;
  342. /* Read the AGC PWM rate from the demodulator */
  343. if (priv->get_agc_pwm) {
  344. ret = priv->get_agc_pwm(fe, &agc_pwm);
  345. if (ret < 0)
  346. return ret;
  347. switch (priv->tuner) {
  348. case TS2020_M88TS2020:
  349. v_agc = (int)agc_pwm * 20 - 1166;
  350. break;
  351. case TS2020_M88TS2022:
  352. v_agc = (int)agc_pwm * 16 - 670;
  353. break;
  354. }
  355. if (v_agc < 0)
  356. v_agc = 0;
  357. }
  358. return ts2020_read_tuner_gain(fe, v_agc, _gain);
  359. }
  360. /*
  361. * Gather statistics on a regular basis
  362. */
  363. static void ts2020_stat_work(struct work_struct *work)
  364. {
  365. struct ts2020_priv *priv = container_of(work, struct ts2020_priv,
  366. stat_work.work);
  367. struct i2c_client *client = priv->client;
  368. struct dtv_frontend_properties *c = &priv->fe->dtv_property_cache;
  369. int ret;
  370. dev_dbg(&client->dev, "\n");
  371. ret = ts2020_get_tuner_gain(priv->fe, &c->strength.stat[0].svalue);
  372. if (ret < 0)
  373. goto err;
  374. c->strength.stat[0].scale = FE_SCALE_DECIBEL;
  375. if (!priv->dont_poll)
  376. schedule_delayed_work(&priv->stat_work, msecs_to_jiffies(2000));
  377. return;
  378. err:
  379. dev_dbg(&client->dev, "failed=%d\n", ret);
  380. }
  381. /*
  382. * Read TS2020 signal strength in v3 format.
  383. */
  384. static int ts2020_read_signal_strength(struct dvb_frontend *fe,
  385. u16 *_signal_strength)
  386. {
  387. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  388. struct ts2020_priv *priv = fe->tuner_priv;
  389. unsigned strength;
  390. __s64 gain;
  391. if (priv->dont_poll)
  392. ts2020_stat_work(&priv->stat_work.work);
  393. if (c->strength.stat[0].scale == FE_SCALE_NOT_AVAILABLE) {
  394. *_signal_strength = 0;
  395. return 0;
  396. }
  397. gain = c->strength.stat[0].svalue;
  398. /* Calculate the signal strength based on the total gain of the tuner */
  399. if (gain < -85000)
  400. /* 0%: no signal or weak signal */
  401. strength = 0;
  402. else if (gain < -65000)
  403. /* 0% - 60%: weak signal */
  404. strength = 0 + div64_s64((85000 + gain) * 3, 1000);
  405. else if (gain < -45000)
  406. /* 60% - 90%: normal signal */
  407. strength = 60 + div64_s64((65000 + gain) * 3, 2000);
  408. else
  409. /* 90% - 99%: strong signal */
  410. strength = 90 + div64_s64((45000 + gain), 5000);
  411. *_signal_strength = strength * 65535 / 100;
  412. return 0;
  413. }
  414. static struct dvb_tuner_ops ts2020_tuner_ops = {
  415. .info = {
  416. .name = "TS2020",
  417. .frequency_min = 950000,
  418. .frequency_max = 2150000
  419. },
  420. .init = ts2020_init,
  421. .release = ts2020_release,
  422. .sleep = ts2020_sleep,
  423. .set_params = ts2020_set_params,
  424. .get_frequency = ts2020_get_frequency,
  425. .get_if_frequency = ts2020_get_if_frequency,
  426. .get_rf_strength = ts2020_read_signal_strength,
  427. };
  428. struct dvb_frontend *ts2020_attach(struct dvb_frontend *fe,
  429. const struct ts2020_config *config,
  430. struct i2c_adapter *i2c)
  431. {
  432. struct i2c_client *client;
  433. struct i2c_board_info board_info;
  434. /* This is only used by ts2020_probe() so can be on the stack */
  435. struct ts2020_config pdata;
  436. memcpy(&pdata, config, sizeof(pdata));
  437. pdata.fe = fe;
  438. pdata.attach_in_use = true;
  439. memset(&board_info, 0, sizeof(board_info));
  440. strlcpy(board_info.type, "ts2020", I2C_NAME_SIZE);
  441. board_info.addr = config->tuner_address;
  442. board_info.platform_data = &pdata;
  443. client = i2c_new_device(i2c, &board_info);
  444. if (!client || !client->dev.driver)
  445. return NULL;
  446. return fe;
  447. }
  448. EXPORT_SYMBOL(ts2020_attach);
  449. /*
  450. * We implement own regmap locking due to legacy DVB attach which uses frontend
  451. * gate control callback to control I2C bus access. We can open / close gate and
  452. * serialize whole open / I2C-operation / close sequence at the same.
  453. */
  454. static void ts2020_regmap_lock(void *__dev)
  455. {
  456. struct ts2020_priv *dev = __dev;
  457. mutex_lock(&dev->regmap_mutex);
  458. if (dev->fe->ops.i2c_gate_ctrl)
  459. dev->fe->ops.i2c_gate_ctrl(dev->fe, 1);
  460. }
  461. static void ts2020_regmap_unlock(void *__dev)
  462. {
  463. struct ts2020_priv *dev = __dev;
  464. if (dev->fe->ops.i2c_gate_ctrl)
  465. dev->fe->ops.i2c_gate_ctrl(dev->fe, 0);
  466. mutex_unlock(&dev->regmap_mutex);
  467. }
  468. static int ts2020_probe(struct i2c_client *client,
  469. const struct i2c_device_id *id)
  470. {
  471. struct ts2020_config *pdata = client->dev.platform_data;
  472. struct dvb_frontend *fe = pdata->fe;
  473. struct ts2020_priv *dev;
  474. int ret;
  475. u8 u8tmp;
  476. unsigned int utmp;
  477. char *chip_str;
  478. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  479. if (!dev) {
  480. ret = -ENOMEM;
  481. goto err;
  482. }
  483. /* create regmap */
  484. mutex_init(&dev->regmap_mutex);
  485. dev->regmap_config.reg_bits = 8,
  486. dev->regmap_config.val_bits = 8,
  487. dev->regmap_config.lock = ts2020_regmap_lock,
  488. dev->regmap_config.unlock = ts2020_regmap_unlock,
  489. dev->regmap_config.lock_arg = dev,
  490. dev->regmap = regmap_init_i2c(client, &dev->regmap_config);
  491. if (IS_ERR(dev->regmap)) {
  492. ret = PTR_ERR(dev->regmap);
  493. goto err_kfree;
  494. }
  495. dev->i2c = client->adapter;
  496. dev->i2c_address = client->addr;
  497. dev->loop_through = pdata->loop_through;
  498. dev->clk_out = pdata->clk_out;
  499. dev->clk_out_div = pdata->clk_out_div;
  500. dev->dont_poll = pdata->dont_poll;
  501. dev->frequency_div = pdata->frequency_div;
  502. dev->fe = fe;
  503. dev->get_agc_pwm = pdata->get_agc_pwm;
  504. fe->tuner_priv = dev;
  505. dev->client = client;
  506. INIT_DELAYED_WORK(&dev->stat_work, ts2020_stat_work);
  507. /* check if the tuner is there */
  508. ret = regmap_read(dev->regmap, 0x00, &utmp);
  509. if (ret)
  510. goto err_regmap_exit;
  511. if ((utmp & 0x03) == 0x00) {
  512. ret = regmap_write(dev->regmap, 0x00, 0x01);
  513. if (ret)
  514. goto err_regmap_exit;
  515. usleep_range(2000, 50000);
  516. }
  517. ret = regmap_write(dev->regmap, 0x00, 0x03);
  518. if (ret)
  519. goto err_regmap_exit;
  520. usleep_range(2000, 50000);
  521. ret = regmap_read(dev->regmap, 0x00, &utmp);
  522. if (ret)
  523. goto err_regmap_exit;
  524. dev_dbg(&client->dev, "chip_id=%02x\n", utmp);
  525. switch (utmp) {
  526. case 0x01:
  527. case 0x41:
  528. case 0x81:
  529. dev->tuner = TS2020_M88TS2020;
  530. chip_str = "TS2020";
  531. if (!dev->frequency_div)
  532. dev->frequency_div = 1060000;
  533. break;
  534. case 0xc3:
  535. case 0x83:
  536. dev->tuner = TS2020_M88TS2022;
  537. chip_str = "TS2022";
  538. if (!dev->frequency_div)
  539. dev->frequency_div = 1103000;
  540. break;
  541. default:
  542. ret = -ENODEV;
  543. goto err_regmap_exit;
  544. }
  545. if (dev->tuner == TS2020_M88TS2022) {
  546. switch (dev->clk_out) {
  547. case TS2020_CLK_OUT_DISABLED:
  548. u8tmp = 0x60;
  549. break;
  550. case TS2020_CLK_OUT_ENABLED:
  551. u8tmp = 0x70;
  552. ret = regmap_write(dev->regmap, 0x05, dev->clk_out_div);
  553. if (ret)
  554. goto err_regmap_exit;
  555. break;
  556. case TS2020_CLK_OUT_ENABLED_XTALOUT:
  557. u8tmp = 0x6c;
  558. break;
  559. default:
  560. ret = -EINVAL;
  561. goto err_regmap_exit;
  562. }
  563. ret = regmap_write(dev->regmap, 0x42, u8tmp);
  564. if (ret)
  565. goto err_regmap_exit;
  566. if (dev->loop_through)
  567. u8tmp = 0xec;
  568. else
  569. u8tmp = 0x6c;
  570. ret = regmap_write(dev->regmap, 0x62, u8tmp);
  571. if (ret)
  572. goto err_regmap_exit;
  573. }
  574. /* sleep */
  575. ret = regmap_write(dev->regmap, 0x00, 0x00);
  576. if (ret)
  577. goto err_regmap_exit;
  578. dev_info(&client->dev,
  579. "Montage Technology %s successfully identified\n", chip_str);
  580. memcpy(&fe->ops.tuner_ops, &ts2020_tuner_ops,
  581. sizeof(struct dvb_tuner_ops));
  582. if (!pdata->attach_in_use)
  583. fe->ops.tuner_ops.release = NULL;
  584. i2c_set_clientdata(client, dev);
  585. return 0;
  586. err_regmap_exit:
  587. regmap_exit(dev->regmap);
  588. err_kfree:
  589. kfree(dev);
  590. err:
  591. dev_dbg(&client->dev, "failed=%d\n", ret);
  592. return ret;
  593. }
  594. static int ts2020_remove(struct i2c_client *client)
  595. {
  596. struct ts2020_priv *dev = i2c_get_clientdata(client);
  597. dev_dbg(&client->dev, "\n");
  598. regmap_exit(dev->regmap);
  599. kfree(dev);
  600. return 0;
  601. }
  602. static const struct i2c_device_id ts2020_id_table[] = {
  603. {"ts2020", 0},
  604. {"ts2022", 0},
  605. {}
  606. };
  607. MODULE_DEVICE_TABLE(i2c, ts2020_id_table);
  608. static struct i2c_driver ts2020_driver = {
  609. .driver = {
  610. .name = "ts2020",
  611. },
  612. .probe = ts2020_probe,
  613. .remove = ts2020_remove,
  614. .id_table = ts2020_id_table,
  615. };
  616. module_i2c_driver(ts2020_driver);
  617. MODULE_AUTHOR("Konstantin Dimitrov <kosio.dimitrov@gmail.com>");
  618. MODULE_DESCRIPTION("Montage Technology TS2020 - Silicon tuner driver module");
  619. MODULE_LICENSE("GPL");