cx88-dvb.c 49 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc4000.h"
  42. #include "xc5000.h"
  43. #include "nxt200x.h"
  44. #include "cx24123.h"
  45. #include "isl6421.h"
  46. #include "tuner-simple.h"
  47. #include "tda9887.h"
  48. #include "s5h1411.h"
  49. #include "stv0299.h"
  50. #include "z0194a.h"
  51. #include "stv0288.h"
  52. #include "stb6000.h"
  53. #include "cx24116.h"
  54. #include "stv0900.h"
  55. #include "stb6100.h"
  56. #include "stb6100_proc.h"
  57. #include "mb86a16.h"
  58. #include "ts2020.h"
  59. #include "ds3000.h"
  60. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  61. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  62. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  63. MODULE_LICENSE("GPL");
  64. MODULE_VERSION(CX88_VERSION);
  65. static unsigned int debug;
  66. module_param(debug, int, 0644);
  67. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  68. static unsigned int dvb_buf_tscnt = 32;
  69. module_param(dvb_buf_tscnt, int, 0644);
  70. MODULE_PARM_DESC(dvb_buf_tscnt, "DVB Buffer TS count [dvb]");
  71. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  72. #define dprintk(level,fmt, arg...) if (debug >= level) \
  73. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  74. /* ------------------------------------------------------------------ */
  75. static int queue_setup(struct vb2_queue *q, const void *parg,
  76. unsigned int *num_buffers, unsigned int *num_planes,
  77. unsigned int sizes[], void *alloc_ctxs[])
  78. {
  79. struct cx8802_dev *dev = q->drv_priv;
  80. *num_planes = 1;
  81. dev->ts_packet_size = 188 * 4;
  82. dev->ts_packet_count = dvb_buf_tscnt;
  83. sizes[0] = dev->ts_packet_size * dev->ts_packet_count;
  84. alloc_ctxs[0] = dev->alloc_ctx;
  85. *num_buffers = dvb_buf_tscnt;
  86. return 0;
  87. }
  88. static int buffer_prepare(struct vb2_buffer *vb)
  89. {
  90. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  91. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  92. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  93. return cx8802_buf_prepare(vb->vb2_queue, dev, buf);
  94. }
  95. static void buffer_finish(struct vb2_buffer *vb)
  96. {
  97. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  98. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  99. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  100. struct cx88_riscmem *risc = &buf->risc;
  101. if (risc->cpu)
  102. pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
  103. memset(risc, 0, sizeof(*risc));
  104. }
  105. static void buffer_queue(struct vb2_buffer *vb)
  106. {
  107. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  108. struct cx8802_dev *dev = vb->vb2_queue->drv_priv;
  109. struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
  110. cx8802_buf_queue(dev, buf);
  111. }
  112. static int start_streaming(struct vb2_queue *q, unsigned int count)
  113. {
  114. struct cx8802_dev *dev = q->drv_priv;
  115. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  116. struct cx88_buffer *buf;
  117. buf = list_entry(dmaq->active.next, struct cx88_buffer, list);
  118. cx8802_start_dma(dev, dmaq, buf);
  119. return 0;
  120. }
  121. static void stop_streaming(struct vb2_queue *q)
  122. {
  123. struct cx8802_dev *dev = q->drv_priv;
  124. struct cx88_dmaqueue *dmaq = &dev->mpegq;
  125. unsigned long flags;
  126. cx8802_cancel_buffers(dev);
  127. spin_lock_irqsave(&dev->slock, flags);
  128. while (!list_empty(&dmaq->active)) {
  129. struct cx88_buffer *buf = list_entry(dmaq->active.next,
  130. struct cx88_buffer, list);
  131. list_del(&buf->list);
  132. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  133. }
  134. spin_unlock_irqrestore(&dev->slock, flags);
  135. }
  136. static struct vb2_ops dvb_qops = {
  137. .queue_setup = queue_setup,
  138. .buf_prepare = buffer_prepare,
  139. .buf_finish = buffer_finish,
  140. .buf_queue = buffer_queue,
  141. .wait_prepare = vb2_ops_wait_prepare,
  142. .wait_finish = vb2_ops_wait_finish,
  143. .start_streaming = start_streaming,
  144. .stop_streaming = stop_streaming,
  145. };
  146. /* ------------------------------------------------------------------ */
  147. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  148. {
  149. struct cx8802_dev *dev= fe->dvb->priv;
  150. struct cx8802_driver *drv = NULL;
  151. int ret = 0;
  152. int fe_id;
  153. fe_id = vb2_dvb_find_frontend(&dev->frontends, fe);
  154. if (!fe_id) {
  155. printk(KERN_ERR "%s() No frontend found\n", __func__);
  156. return -EINVAL;
  157. }
  158. mutex_lock(&dev->core->lock);
  159. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  160. if (drv) {
  161. if (acquire){
  162. dev->frontends.active_fe_id = fe_id;
  163. ret = drv->request_acquire(drv);
  164. } else {
  165. ret = drv->request_release(drv);
  166. dev->frontends.active_fe_id = 0;
  167. }
  168. }
  169. mutex_unlock(&dev->core->lock);
  170. return ret;
  171. }
  172. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  173. {
  174. struct vb2_dvb_frontends *f;
  175. struct vb2_dvb_frontend *fe;
  176. if (!core->dvbdev)
  177. return;
  178. f = &core->dvbdev->frontends;
  179. if (!f)
  180. return;
  181. if (f->gate <= 1) /* undefined or fe0 */
  182. fe = vb2_dvb_get_frontend(f, 1);
  183. else
  184. fe = vb2_dvb_get_frontend(f, f->gate);
  185. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  186. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  187. }
  188. /* ------------------------------------------------------------------ */
  189. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  190. {
  191. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  192. static const u8 reset [] = { RESET, 0x80 };
  193. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  194. static const u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  195. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  196. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  197. mt352_write(fe, clock_config, sizeof(clock_config));
  198. udelay(200);
  199. mt352_write(fe, reset, sizeof(reset));
  200. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  201. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  202. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  203. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  204. return 0;
  205. }
  206. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  207. {
  208. static const u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  209. static const u8 reset [] = { RESET, 0x80 };
  210. static const u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  211. static const u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  212. static const u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  213. static const u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  214. mt352_write(fe, clock_config, sizeof(clock_config));
  215. udelay(200);
  216. mt352_write(fe, reset, sizeof(reset));
  217. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  218. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  219. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  220. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  221. return 0;
  222. }
  223. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  224. {
  225. static const u8 clock_config [] = { 0x89, 0x38, 0x39 };
  226. static const u8 reset [] = { 0x50, 0x80 };
  227. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  228. static const u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  229. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  230. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  231. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  232. mt352_write(fe, clock_config, sizeof(clock_config));
  233. udelay(2000);
  234. mt352_write(fe, reset, sizeof(reset));
  235. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  236. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  237. udelay(2000);
  238. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  239. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  240. return 0;
  241. }
  242. static const struct mt352_config dvico_fusionhdtv = {
  243. .demod_address = 0x0f,
  244. .demod_init = dvico_fusionhdtv_demod_init,
  245. };
  246. static const struct mt352_config dntv_live_dvbt_config = {
  247. .demod_address = 0x0f,
  248. .demod_init = dntv_live_dvbt_demod_init,
  249. };
  250. static const struct mt352_config dvico_fusionhdtv_dual = {
  251. .demod_address = 0x0f,
  252. .demod_init = dvico_dual_demod_init,
  253. };
  254. static const struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  255. .demod_address = (0x1e >> 1),
  256. .no_tuner = 1,
  257. .if2 = 45600,
  258. };
  259. static struct mb86a16_config twinhan_vp1027 = {
  260. .demod_address = 0x08,
  261. };
  262. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  263. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  264. {
  265. static const u8 clock_config [] = { 0x89, 0x38, 0x38 };
  266. static const u8 reset [] = { 0x50, 0x80 };
  267. static const u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  268. static const u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  269. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  270. static const u8 dntv_extra[] = { 0xB5, 0x7A };
  271. static const u8 capt_range_cfg[] = { 0x75, 0x32 };
  272. mt352_write(fe, clock_config, sizeof(clock_config));
  273. udelay(2000);
  274. mt352_write(fe, reset, sizeof(reset));
  275. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  276. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  277. udelay(2000);
  278. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  279. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  280. return 0;
  281. }
  282. static const struct mt352_config dntv_live_dvbt_pro_config = {
  283. .demod_address = 0x0f,
  284. .no_tuner = 1,
  285. .demod_init = dntv_live_dvbt_pro_demod_init,
  286. };
  287. #endif
  288. static const struct zl10353_config dvico_fusionhdtv_hybrid = {
  289. .demod_address = 0x0f,
  290. .no_tuner = 1,
  291. };
  292. static const struct zl10353_config dvico_fusionhdtv_xc3028 = {
  293. .demod_address = 0x0f,
  294. .if2 = 45600,
  295. .no_tuner = 1,
  296. };
  297. static const struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  298. .demod_address = 0x0f,
  299. .if2 = 4560,
  300. .no_tuner = 1,
  301. .demod_init = dvico_fusionhdtv_demod_init,
  302. };
  303. static const struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  304. .demod_address = 0x0f,
  305. };
  306. static const struct cx22702_config connexant_refboard_config = {
  307. .demod_address = 0x43,
  308. .output_mode = CX22702_SERIAL_OUTPUT,
  309. };
  310. static const struct cx22702_config hauppauge_hvr_config = {
  311. .demod_address = 0x63,
  312. .output_mode = CX22702_SERIAL_OUTPUT,
  313. };
  314. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  315. {
  316. struct cx8802_dev *dev= fe->dvb->priv;
  317. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  318. return 0;
  319. }
  320. static const struct or51132_config pchdtv_hd3000 = {
  321. .demod_address = 0x15,
  322. .set_ts_params = or51132_set_ts_param,
  323. };
  324. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  325. {
  326. struct cx8802_dev *dev= fe->dvb->priv;
  327. struct cx88_core *core = dev->core;
  328. dprintk(1, "%s: index = %d\n", __func__, index);
  329. if (index == 0)
  330. cx_clear(MO_GP0_IO, 8);
  331. else
  332. cx_set(MO_GP0_IO, 8);
  333. return 0;
  334. }
  335. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  336. {
  337. struct cx8802_dev *dev= fe->dvb->priv;
  338. if (is_punctured)
  339. dev->ts_gen_cntrl |= 0x04;
  340. else
  341. dev->ts_gen_cntrl &= ~0x04;
  342. return 0;
  343. }
  344. static struct lgdt330x_config fusionhdtv_3_gold = {
  345. .demod_address = 0x0e,
  346. .demod_chip = LGDT3302,
  347. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  348. .set_ts_params = lgdt330x_set_ts_param,
  349. };
  350. static const struct lgdt330x_config fusionhdtv_5_gold = {
  351. .demod_address = 0x0e,
  352. .demod_chip = LGDT3303,
  353. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  354. .set_ts_params = lgdt330x_set_ts_param,
  355. };
  356. static const struct lgdt330x_config pchdtv_hd5500 = {
  357. .demod_address = 0x59,
  358. .demod_chip = LGDT3303,
  359. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  360. .set_ts_params = lgdt330x_set_ts_param,
  361. };
  362. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  363. {
  364. struct cx8802_dev *dev= fe->dvb->priv;
  365. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  366. return 0;
  367. }
  368. static const struct nxt200x_config ati_hdtvwonder = {
  369. .demod_address = 0x0a,
  370. .set_ts_params = nxt200x_set_ts_param,
  371. };
  372. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  373. int is_punctured)
  374. {
  375. struct cx8802_dev *dev= fe->dvb->priv;
  376. dev->ts_gen_cntrl = 0x02;
  377. return 0;
  378. }
  379. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  380. enum fe_sec_voltage voltage)
  381. {
  382. struct cx8802_dev *dev= fe->dvb->priv;
  383. struct cx88_core *core = dev->core;
  384. if (voltage == SEC_VOLTAGE_OFF)
  385. cx_write(MO_GP0_IO, 0x000006fb);
  386. else
  387. cx_write(MO_GP0_IO, 0x000006f9);
  388. if (core->prev_set_voltage)
  389. return core->prev_set_voltage(fe, voltage);
  390. return 0;
  391. }
  392. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  393. enum fe_sec_voltage voltage)
  394. {
  395. struct cx8802_dev *dev= fe->dvb->priv;
  396. struct cx88_core *core = dev->core;
  397. if (voltage == SEC_VOLTAGE_OFF) {
  398. dprintk(1,"LNB Voltage OFF\n");
  399. cx_write(MO_GP0_IO, 0x0000efff);
  400. }
  401. if (core->prev_set_voltage)
  402. return core->prev_set_voltage(fe, voltage);
  403. return 0;
  404. }
  405. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  406. enum fe_sec_voltage voltage)
  407. {
  408. struct cx8802_dev *dev= fe->dvb->priv;
  409. struct cx88_core *core = dev->core;
  410. cx_set(MO_GP0_IO, 0x6040);
  411. switch (voltage) {
  412. case SEC_VOLTAGE_13:
  413. cx_clear(MO_GP0_IO, 0x20);
  414. break;
  415. case SEC_VOLTAGE_18:
  416. cx_set(MO_GP0_IO, 0x20);
  417. break;
  418. case SEC_VOLTAGE_OFF:
  419. cx_clear(MO_GP0_IO, 0x20);
  420. break;
  421. }
  422. if (core->prev_set_voltage)
  423. return core->prev_set_voltage(fe, voltage);
  424. return 0;
  425. }
  426. static int vp1027_set_voltage(struct dvb_frontend *fe,
  427. enum fe_sec_voltage voltage)
  428. {
  429. struct cx8802_dev *dev = fe->dvb->priv;
  430. struct cx88_core *core = dev->core;
  431. switch (voltage) {
  432. case SEC_VOLTAGE_13:
  433. dprintk(1, "LNB SEC Voltage=13\n");
  434. cx_write(MO_GP0_IO, 0x00001220);
  435. break;
  436. case SEC_VOLTAGE_18:
  437. dprintk(1, "LNB SEC Voltage=18\n");
  438. cx_write(MO_GP0_IO, 0x00001222);
  439. break;
  440. case SEC_VOLTAGE_OFF:
  441. dprintk(1, "LNB Voltage OFF\n");
  442. cx_write(MO_GP0_IO, 0x00001230);
  443. break;
  444. }
  445. if (core->prev_set_voltage)
  446. return core->prev_set_voltage(fe, voltage);
  447. return 0;
  448. }
  449. static const struct cx24123_config geniatech_dvbs_config = {
  450. .demod_address = 0x55,
  451. .set_ts_params = cx24123_set_ts_param,
  452. };
  453. static const struct cx24123_config hauppauge_novas_config = {
  454. .demod_address = 0x55,
  455. .set_ts_params = cx24123_set_ts_param,
  456. };
  457. static const struct cx24123_config kworld_dvbs_100_config = {
  458. .demod_address = 0x15,
  459. .set_ts_params = cx24123_set_ts_param,
  460. .lnb_polarity = 1,
  461. };
  462. static const struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  463. .demod_address = 0x32 >> 1,
  464. .output_mode = S5H1409_PARALLEL_OUTPUT,
  465. .gpio = S5H1409_GPIO_ON,
  466. .qam_if = 44000,
  467. .inversion = S5H1409_INVERSION_OFF,
  468. .status_mode = S5H1409_DEMODLOCKING,
  469. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  470. };
  471. static const struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  472. .demod_address = 0x32 >> 1,
  473. .output_mode = S5H1409_SERIAL_OUTPUT,
  474. .gpio = S5H1409_GPIO_OFF,
  475. .inversion = S5H1409_INVERSION_OFF,
  476. .status_mode = S5H1409_DEMODLOCKING,
  477. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  478. };
  479. static const struct s5h1409_config kworld_atsc_120_config = {
  480. .demod_address = 0x32 >> 1,
  481. .output_mode = S5H1409_SERIAL_OUTPUT,
  482. .gpio = S5H1409_GPIO_OFF,
  483. .inversion = S5H1409_INVERSION_OFF,
  484. .status_mode = S5H1409_DEMODLOCKING,
  485. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  486. };
  487. static const struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  488. .i2c_address = 0x64,
  489. .if_khz = 5380,
  490. };
  491. static const struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  492. .demod_address = (0x1e >> 1),
  493. .no_tuner = 1,
  494. .if2 = 45600,
  495. };
  496. static const struct zl10353_config cx88_geniatech_x8000_mt = {
  497. .demod_address = (0x1e >> 1),
  498. .no_tuner = 1,
  499. .disable_i2c_gate_ctrl = 1,
  500. };
  501. static const struct s5h1411_config dvico_fusionhdtv7_config = {
  502. .output_mode = S5H1411_SERIAL_OUTPUT,
  503. .gpio = S5H1411_GPIO_ON,
  504. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  505. .qam_if = S5H1411_IF_44000,
  506. .vsb_if = S5H1411_IF_44000,
  507. .inversion = S5H1411_INVERSION_OFF,
  508. .status_mode = S5H1411_DEMODLOCKING
  509. };
  510. static const struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  511. .i2c_address = 0xc2 >> 1,
  512. .if_khz = 5380,
  513. };
  514. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  515. {
  516. struct dvb_frontend *fe;
  517. struct vb2_dvb_frontend *fe0 = NULL;
  518. struct xc2028_ctrl ctl;
  519. struct xc2028_config cfg = {
  520. .i2c_adap = &dev->core->i2c_adap,
  521. .i2c_addr = addr,
  522. .ctrl = &ctl,
  523. };
  524. /* Get the first frontend */
  525. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  526. if (!fe0)
  527. return -EINVAL;
  528. if (!fe0->dvb.frontend) {
  529. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  530. "Can't attach xc3028\n",
  531. dev->core->name);
  532. return -EINVAL;
  533. }
  534. /*
  535. * Some xc3028 devices may be hidden by an I2C gate. This is known
  536. * to happen with some s5h1409-based devices.
  537. * Now that I2C gate is open, sets up xc3028 configuration
  538. */
  539. cx88_setup_xc3028(dev->core, &ctl);
  540. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  541. if (!fe) {
  542. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  543. dev->core->name);
  544. dvb_frontend_detach(fe0->dvb.frontend);
  545. dvb_unregister_frontend(fe0->dvb.frontend);
  546. fe0->dvb.frontend = NULL;
  547. return -EINVAL;
  548. }
  549. printk(KERN_INFO "%s/2: xc3028 attached\n",
  550. dev->core->name);
  551. return 0;
  552. }
  553. static int attach_xc4000(struct cx8802_dev *dev, struct xc4000_config *cfg)
  554. {
  555. struct dvb_frontend *fe;
  556. struct vb2_dvb_frontend *fe0 = NULL;
  557. /* Get the first frontend */
  558. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  559. if (!fe0)
  560. return -EINVAL;
  561. if (!fe0->dvb.frontend) {
  562. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  563. "Can't attach xc4000\n",
  564. dev->core->name);
  565. return -EINVAL;
  566. }
  567. fe = dvb_attach(xc4000_attach, fe0->dvb.frontend, &dev->core->i2c_adap,
  568. cfg);
  569. if (!fe) {
  570. printk(KERN_ERR "%s/2: xc4000 attach failed\n",
  571. dev->core->name);
  572. dvb_frontend_detach(fe0->dvb.frontend);
  573. dvb_unregister_frontend(fe0->dvb.frontend);
  574. fe0->dvb.frontend = NULL;
  575. return -EINVAL;
  576. }
  577. printk(KERN_INFO "%s/2: xc4000 attached\n", dev->core->name);
  578. return 0;
  579. }
  580. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  581. int is_punctured)
  582. {
  583. struct cx8802_dev *dev = fe->dvb->priv;
  584. dev->ts_gen_cntrl = 0x2;
  585. return 0;
  586. }
  587. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  588. int is_punctured)
  589. {
  590. struct cx8802_dev *dev = fe->dvb->priv;
  591. dev->ts_gen_cntrl = 0;
  592. return 0;
  593. }
  594. static int cx24116_reset_device(struct dvb_frontend *fe)
  595. {
  596. struct cx8802_dev *dev = fe->dvb->priv;
  597. struct cx88_core *core = dev->core;
  598. /* Reset the part */
  599. /* Put the cx24116 into reset */
  600. cx_write(MO_SRST_IO, 0);
  601. msleep(10);
  602. /* Take the cx24116 out of reset */
  603. cx_write(MO_SRST_IO, 1);
  604. msleep(10);
  605. return 0;
  606. }
  607. static const struct cx24116_config hauppauge_hvr4000_config = {
  608. .demod_address = 0x05,
  609. .set_ts_params = cx24116_set_ts_param,
  610. .reset_device = cx24116_reset_device,
  611. };
  612. static const struct cx24116_config tevii_s460_config = {
  613. .demod_address = 0x55,
  614. .set_ts_params = cx24116_set_ts_param,
  615. .reset_device = cx24116_reset_device,
  616. };
  617. static int ds3000_set_ts_param(struct dvb_frontend *fe,
  618. int is_punctured)
  619. {
  620. struct cx8802_dev *dev = fe->dvb->priv;
  621. dev->ts_gen_cntrl = 4;
  622. return 0;
  623. }
  624. static struct ds3000_config tevii_ds3000_config = {
  625. .demod_address = 0x68,
  626. .set_ts_params = ds3000_set_ts_param,
  627. };
  628. static struct ts2020_config tevii_ts2020_config = {
  629. .tuner_address = 0x60,
  630. .clk_out_div = 1,
  631. };
  632. static const struct stv0900_config prof_7301_stv0900_config = {
  633. .demod_address = 0x6a,
  634. /* demod_mode = 0,*/
  635. .xtal = 27000000,
  636. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  637. .diseqc_mode = 2,/* 2/3 PWM */
  638. .tun1_maddress = 0,/* 0x60 */
  639. .tun1_adc = 0,/* 2 Vpp */
  640. .path1_mode = 3,
  641. .set_ts_params = stv0900_set_ts_param,
  642. };
  643. static const struct stb6100_config prof_7301_stb6100_config = {
  644. .tuner_address = 0x60,
  645. .refclock = 27000000,
  646. };
  647. static const struct stv0299_config tevii_tuner_sharp_config = {
  648. .demod_address = 0x68,
  649. .inittab = sharp_z0194a_inittab,
  650. .mclk = 88000000UL,
  651. .invert = 1,
  652. .skip_reinit = 0,
  653. .lock_output = 1,
  654. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  655. .min_delay_ms = 100,
  656. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  657. .set_ts_params = cx24116_set_ts_param,
  658. };
  659. static const struct stv0288_config tevii_tuner_earda_config = {
  660. .demod_address = 0x68,
  661. .min_delay_ms = 100,
  662. .set_ts_params = cx24116_set_ts_param,
  663. };
  664. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  665. {
  666. struct cx88_core *core = dev->core;
  667. struct vb2_dvb_frontend *fe = NULL;
  668. int i;
  669. mutex_init(&dev->frontends.lock);
  670. INIT_LIST_HEAD(&dev->frontends.felist);
  671. if (!core->board.num_frontends)
  672. return -ENODEV;
  673. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  674. core->board.num_frontends);
  675. for (i = 1; i <= core->board.num_frontends; i++) {
  676. fe = vb2_dvb_alloc_frontend(&dev->frontends, i);
  677. if (!fe) {
  678. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  679. vb2_dvb_dealloc_frontends(&dev->frontends);
  680. return -ENOMEM;
  681. }
  682. }
  683. return 0;
  684. }
  685. static const u8 samsung_smt_7020_inittab[] = {
  686. 0x01, 0x15,
  687. 0x02, 0x00,
  688. 0x03, 0x00,
  689. 0x04, 0x7D,
  690. 0x05, 0x0F,
  691. 0x06, 0x02,
  692. 0x07, 0x00,
  693. 0x08, 0x60,
  694. 0x0A, 0xC2,
  695. 0x0B, 0x00,
  696. 0x0C, 0x01,
  697. 0x0D, 0x81,
  698. 0x0E, 0x44,
  699. 0x0F, 0x09,
  700. 0x10, 0x3C,
  701. 0x11, 0x84,
  702. 0x12, 0xDA,
  703. 0x13, 0x99,
  704. 0x14, 0x8D,
  705. 0x15, 0xCE,
  706. 0x16, 0xE8,
  707. 0x17, 0x43,
  708. 0x18, 0x1C,
  709. 0x19, 0x1B,
  710. 0x1A, 0x1D,
  711. 0x1C, 0x12,
  712. 0x1D, 0x00,
  713. 0x1E, 0x00,
  714. 0x1F, 0x00,
  715. 0x20, 0x00,
  716. 0x21, 0x00,
  717. 0x22, 0x00,
  718. 0x23, 0x00,
  719. 0x28, 0x02,
  720. 0x29, 0x28,
  721. 0x2A, 0x14,
  722. 0x2B, 0x0F,
  723. 0x2C, 0x09,
  724. 0x2D, 0x05,
  725. 0x31, 0x1F,
  726. 0x32, 0x19,
  727. 0x33, 0xFC,
  728. 0x34, 0x13,
  729. 0xff, 0xff,
  730. };
  731. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe)
  732. {
  733. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  734. struct cx8802_dev *dev = fe->dvb->priv;
  735. u8 buf[4];
  736. u32 div;
  737. struct i2c_msg msg = {
  738. .addr = 0x61,
  739. .flags = 0,
  740. .buf = buf,
  741. .len = sizeof(buf) };
  742. div = c->frequency / 125;
  743. buf[0] = (div >> 8) & 0x7f;
  744. buf[1] = div & 0xff;
  745. buf[2] = 0x84; /* 0xC4 */
  746. buf[3] = 0x00;
  747. if (c->frequency < 1500000)
  748. buf[3] |= 0x10;
  749. if (fe->ops.i2c_gate_ctrl)
  750. fe->ops.i2c_gate_ctrl(fe, 1);
  751. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  752. return -EIO;
  753. return 0;
  754. }
  755. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  756. enum fe_sec_tone_mode tone)
  757. {
  758. struct cx8802_dev *dev = fe->dvb->priv;
  759. struct cx88_core *core = dev->core;
  760. cx_set(MO_GP0_IO, 0x0800);
  761. switch (tone) {
  762. case SEC_TONE_ON:
  763. cx_set(MO_GP0_IO, 0x08);
  764. break;
  765. case SEC_TONE_OFF:
  766. cx_clear(MO_GP0_IO, 0x08);
  767. break;
  768. default:
  769. return -EINVAL;
  770. }
  771. return 0;
  772. }
  773. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  774. enum fe_sec_voltage voltage)
  775. {
  776. struct cx8802_dev *dev = fe->dvb->priv;
  777. struct cx88_core *core = dev->core;
  778. u8 data;
  779. struct i2c_msg msg = {
  780. .addr = 8,
  781. .flags = 0,
  782. .buf = &data,
  783. .len = sizeof(data) };
  784. cx_set(MO_GP0_IO, 0x8000);
  785. switch (voltage) {
  786. case SEC_VOLTAGE_OFF:
  787. break;
  788. case SEC_VOLTAGE_13:
  789. data = ISL6421_EN1 | ISL6421_LLC1;
  790. cx_clear(MO_GP0_IO, 0x80);
  791. break;
  792. case SEC_VOLTAGE_18:
  793. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  794. cx_clear(MO_GP0_IO, 0x80);
  795. break;
  796. default:
  797. return -EINVAL;
  798. }
  799. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  800. }
  801. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  802. u32 srate, u32 ratio)
  803. {
  804. u8 aclk = 0;
  805. u8 bclk = 0;
  806. if (srate < 1500000) {
  807. aclk = 0xb7;
  808. bclk = 0x47;
  809. } else if (srate < 3000000) {
  810. aclk = 0xb7;
  811. bclk = 0x4b;
  812. } else if (srate < 7000000) {
  813. aclk = 0xb7;
  814. bclk = 0x4f;
  815. } else if (srate < 14000000) {
  816. aclk = 0xb7;
  817. bclk = 0x53;
  818. } else if (srate < 30000000) {
  819. aclk = 0xb6;
  820. bclk = 0x53;
  821. } else if (srate < 45000000) {
  822. aclk = 0xb4;
  823. bclk = 0x51;
  824. }
  825. stv0299_writereg(fe, 0x13, aclk);
  826. stv0299_writereg(fe, 0x14, bclk);
  827. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  828. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  829. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  830. return 0;
  831. }
  832. static const struct stv0299_config samsung_stv0299_config = {
  833. .demod_address = 0x68,
  834. .inittab = samsung_smt_7020_inittab,
  835. .mclk = 88000000UL,
  836. .invert = 0,
  837. .skip_reinit = 0,
  838. .lock_output = STV0299_LOCKOUTPUT_LK,
  839. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  840. .min_delay_ms = 100,
  841. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  842. };
  843. static int dvb_register(struct cx8802_dev *dev)
  844. {
  845. struct cx88_core *core = dev->core;
  846. struct vb2_dvb_frontend *fe0, *fe1 = NULL;
  847. int mfe_shared = 0; /* bus not shared by default */
  848. int res = -EINVAL;
  849. if (0 != core->i2c_rc) {
  850. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  851. goto frontend_detach;
  852. }
  853. /* Get the first frontend */
  854. fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
  855. if (!fe0)
  856. goto frontend_detach;
  857. /* multi-frontend gate control is undefined or defaults to fe0 */
  858. dev->frontends.gate = 0;
  859. /* Sets the gate control callback to be used by i2c command calls */
  860. core->gate_ctrl = cx88_dvb_gate_ctrl;
  861. /* init frontend(s) */
  862. switch (core->boardnr) {
  863. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  864. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  865. &connexant_refboard_config,
  866. &core->i2c_adap);
  867. if (fe0->dvb.frontend != NULL) {
  868. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  869. 0x61, &core->i2c_adap,
  870. DVB_PLL_THOMSON_DTT759X))
  871. goto frontend_detach;
  872. }
  873. break;
  874. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  875. case CX88_BOARD_CONEXANT_DVB_T1:
  876. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  877. case CX88_BOARD_WINFAST_DTV1000:
  878. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  879. &connexant_refboard_config,
  880. &core->i2c_adap);
  881. if (fe0->dvb.frontend != NULL) {
  882. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  883. 0x60, &core->i2c_adap,
  884. DVB_PLL_THOMSON_DTT7579))
  885. goto frontend_detach;
  886. }
  887. break;
  888. case CX88_BOARD_WINFAST_DTV2000H:
  889. case CX88_BOARD_HAUPPAUGE_HVR1100:
  890. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  891. case CX88_BOARD_HAUPPAUGE_HVR1300:
  892. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  893. &hauppauge_hvr_config,
  894. &core->i2c_adap);
  895. if (fe0->dvb.frontend != NULL) {
  896. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  897. &core->i2c_adap, 0x61,
  898. TUNER_PHILIPS_FMD1216ME_MK3))
  899. goto frontend_detach;
  900. }
  901. break;
  902. case CX88_BOARD_WINFAST_DTV2000H_J:
  903. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  904. &hauppauge_hvr_config,
  905. &core->i2c_adap);
  906. if (fe0->dvb.frontend != NULL) {
  907. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  908. &core->i2c_adap, 0x61,
  909. TUNER_PHILIPS_FMD1216MEX_MK3))
  910. goto frontend_detach;
  911. }
  912. break;
  913. case CX88_BOARD_HAUPPAUGE_HVR3000:
  914. /* MFE frontend 1 */
  915. mfe_shared = 1;
  916. dev->frontends.gate = 2;
  917. /* DVB-S init */
  918. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  919. &hauppauge_novas_config,
  920. &dev->core->i2c_adap);
  921. if (fe0->dvb.frontend) {
  922. if (!dvb_attach(isl6421_attach,
  923. fe0->dvb.frontend,
  924. &dev->core->i2c_adap,
  925. 0x08, ISL6421_DCL, 0x00, false))
  926. goto frontend_detach;
  927. }
  928. /* MFE frontend 2 */
  929. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  930. if (!fe1)
  931. goto frontend_detach;
  932. /* DVB-T init */
  933. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  934. &hauppauge_hvr_config,
  935. &dev->core->i2c_adap);
  936. if (fe1->dvb.frontend) {
  937. fe1->dvb.frontend->id = 1;
  938. if (!dvb_attach(simple_tuner_attach,
  939. fe1->dvb.frontend,
  940. &dev->core->i2c_adap,
  941. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  942. goto frontend_detach;
  943. }
  944. break;
  945. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  946. fe0->dvb.frontend = dvb_attach(mt352_attach,
  947. &dvico_fusionhdtv,
  948. &core->i2c_adap);
  949. if (fe0->dvb.frontend != NULL) {
  950. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  951. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  952. goto frontend_detach;
  953. break;
  954. }
  955. /* ZL10353 replaces MT352 on later cards */
  956. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  957. &dvico_fusionhdtv_plus_v1_1,
  958. &core->i2c_adap);
  959. if (fe0->dvb.frontend != NULL) {
  960. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  961. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  962. goto frontend_detach;
  963. }
  964. break;
  965. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  966. /* The tin box says DEE1601, but it seems to be DTT7579
  967. * compatible, with a slightly different MT352 AGC gain. */
  968. fe0->dvb.frontend = dvb_attach(mt352_attach,
  969. &dvico_fusionhdtv_dual,
  970. &core->i2c_adap);
  971. if (fe0->dvb.frontend != NULL) {
  972. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  973. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  974. goto frontend_detach;
  975. break;
  976. }
  977. /* ZL10353 replaces MT352 on later cards */
  978. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  979. &dvico_fusionhdtv_plus_v1_1,
  980. &core->i2c_adap);
  981. if (fe0->dvb.frontend != NULL) {
  982. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  983. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  984. goto frontend_detach;
  985. }
  986. break;
  987. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  988. fe0->dvb.frontend = dvb_attach(mt352_attach,
  989. &dvico_fusionhdtv,
  990. &core->i2c_adap);
  991. if (fe0->dvb.frontend != NULL) {
  992. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  993. 0x61, NULL, DVB_PLL_LG_Z201))
  994. goto frontend_detach;
  995. }
  996. break;
  997. case CX88_BOARD_KWORLD_DVB_T:
  998. case CX88_BOARD_DNTV_LIVE_DVB_T:
  999. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  1000. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1001. &dntv_live_dvbt_config,
  1002. &core->i2c_adap);
  1003. if (fe0->dvb.frontend != NULL) {
  1004. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  1005. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  1006. goto frontend_detach;
  1007. }
  1008. break;
  1009. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  1010. #if IS_ENABLED(CONFIG_VIDEO_CX88_VP3054)
  1011. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  1012. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  1013. &dev->vp3054->adap);
  1014. if (fe0->dvb.frontend != NULL) {
  1015. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1016. &core->i2c_adap, 0x61,
  1017. TUNER_PHILIPS_FMD1216ME_MK3))
  1018. goto frontend_detach;
  1019. }
  1020. #else
  1021. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  1022. core->name);
  1023. #endif
  1024. break;
  1025. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  1026. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1027. &dvico_fusionhdtv_hybrid,
  1028. &core->i2c_adap);
  1029. if (fe0->dvb.frontend != NULL) {
  1030. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1031. &core->i2c_adap, 0x61,
  1032. TUNER_THOMSON_FE6600))
  1033. goto frontend_detach;
  1034. }
  1035. break;
  1036. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  1037. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1038. &dvico_fusionhdtv_xc3028,
  1039. &core->i2c_adap);
  1040. if (fe0->dvb.frontend == NULL)
  1041. fe0->dvb.frontend = dvb_attach(mt352_attach,
  1042. &dvico_fusionhdtv_mt352_xc3028,
  1043. &core->i2c_adap);
  1044. /*
  1045. * On this board, the demod provides the I2C bus pullup.
  1046. * We must not permit gate_ctrl to be performed, or
  1047. * the xc3028 cannot communicate on the bus.
  1048. */
  1049. if (fe0->dvb.frontend)
  1050. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1051. if (attach_xc3028(0x61, dev) < 0)
  1052. goto frontend_detach;
  1053. break;
  1054. case CX88_BOARD_PCHDTV_HD3000:
  1055. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  1056. &core->i2c_adap);
  1057. if (fe0->dvb.frontend != NULL) {
  1058. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1059. &core->i2c_adap, 0x61,
  1060. TUNER_THOMSON_DTT761X))
  1061. goto frontend_detach;
  1062. }
  1063. break;
  1064. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  1065. dev->ts_gen_cntrl = 0x08;
  1066. /* Do a hardware reset of chip before using it. */
  1067. cx_clear(MO_GP0_IO, 1);
  1068. mdelay(100);
  1069. cx_set(MO_GP0_IO, 1);
  1070. mdelay(200);
  1071. /* Select RF connector callback */
  1072. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  1073. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1074. &fusionhdtv_3_gold,
  1075. &core->i2c_adap);
  1076. if (fe0->dvb.frontend != NULL) {
  1077. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1078. &core->i2c_adap, 0x61,
  1079. TUNER_MICROTUNE_4042FI5))
  1080. goto frontend_detach;
  1081. }
  1082. break;
  1083. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  1084. dev->ts_gen_cntrl = 0x08;
  1085. /* Do a hardware reset of chip before using it. */
  1086. cx_clear(MO_GP0_IO, 1);
  1087. mdelay(100);
  1088. cx_set(MO_GP0_IO, 9);
  1089. mdelay(200);
  1090. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1091. &fusionhdtv_3_gold,
  1092. &core->i2c_adap);
  1093. if (fe0->dvb.frontend != NULL) {
  1094. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1095. &core->i2c_adap, 0x61,
  1096. TUNER_THOMSON_DTT761X))
  1097. goto frontend_detach;
  1098. }
  1099. break;
  1100. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  1101. dev->ts_gen_cntrl = 0x08;
  1102. /* Do a hardware reset of chip before using it. */
  1103. cx_clear(MO_GP0_IO, 1);
  1104. mdelay(100);
  1105. cx_set(MO_GP0_IO, 1);
  1106. mdelay(200);
  1107. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1108. &fusionhdtv_5_gold,
  1109. &core->i2c_adap);
  1110. if (fe0->dvb.frontend != NULL) {
  1111. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1112. &core->i2c_adap, 0x61,
  1113. TUNER_LG_TDVS_H06XF))
  1114. goto frontend_detach;
  1115. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1116. &core->i2c_adap, 0x43))
  1117. goto frontend_detach;
  1118. }
  1119. break;
  1120. case CX88_BOARD_PCHDTV_HD5500:
  1121. dev->ts_gen_cntrl = 0x08;
  1122. /* Do a hardware reset of chip before using it. */
  1123. cx_clear(MO_GP0_IO, 1);
  1124. mdelay(100);
  1125. cx_set(MO_GP0_IO, 1);
  1126. mdelay(200);
  1127. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1128. &pchdtv_hd5500,
  1129. &core->i2c_adap);
  1130. if (fe0->dvb.frontend != NULL) {
  1131. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1132. &core->i2c_adap, 0x61,
  1133. TUNER_LG_TDVS_H06XF))
  1134. goto frontend_detach;
  1135. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1136. &core->i2c_adap, 0x43))
  1137. goto frontend_detach;
  1138. }
  1139. break;
  1140. case CX88_BOARD_ATI_HDTVWONDER:
  1141. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1142. &ati_hdtvwonder,
  1143. &core->i2c_adap);
  1144. if (fe0->dvb.frontend != NULL) {
  1145. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1146. &core->i2c_adap, 0x61,
  1147. TUNER_PHILIPS_TUV1236D))
  1148. goto frontend_detach;
  1149. }
  1150. break;
  1151. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1152. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1153. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1154. &hauppauge_novas_config,
  1155. &core->i2c_adap);
  1156. if (fe0->dvb.frontend) {
  1157. bool override_tone;
  1158. if (core->model == 92001)
  1159. override_tone = true;
  1160. else
  1161. override_tone = false;
  1162. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1163. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00,
  1164. override_tone))
  1165. goto frontend_detach;
  1166. }
  1167. break;
  1168. case CX88_BOARD_KWORLD_DVBS_100:
  1169. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1170. &kworld_dvbs_100_config,
  1171. &core->i2c_adap);
  1172. if (fe0->dvb.frontend) {
  1173. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1174. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1175. }
  1176. break;
  1177. case CX88_BOARD_GENIATECH_DVBS:
  1178. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1179. &geniatech_dvbs_config,
  1180. &core->i2c_adap);
  1181. if (fe0->dvb.frontend) {
  1182. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1183. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1184. }
  1185. break;
  1186. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1187. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1188. &pinnacle_pctv_hd_800i_config,
  1189. &core->i2c_adap);
  1190. if (fe0->dvb.frontend != NULL) {
  1191. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1192. &core->i2c_adap,
  1193. &pinnacle_pctv_hd_800i_tuner_config))
  1194. goto frontend_detach;
  1195. }
  1196. break;
  1197. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1198. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1199. &dvico_hdtv5_pci_nano_config,
  1200. &core->i2c_adap);
  1201. if (fe0->dvb.frontend != NULL) {
  1202. struct dvb_frontend *fe;
  1203. struct xc2028_config cfg = {
  1204. .i2c_adap = &core->i2c_adap,
  1205. .i2c_addr = 0x61,
  1206. };
  1207. static struct xc2028_ctrl ctl = {
  1208. .fname = XC2028_DEFAULT_FIRMWARE,
  1209. .max_len = 64,
  1210. .scode_table = XC3028_FE_OREN538,
  1211. };
  1212. fe = dvb_attach(xc2028_attach,
  1213. fe0->dvb.frontend, &cfg);
  1214. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1215. fe->ops.tuner_ops.set_config(fe, &ctl);
  1216. }
  1217. break;
  1218. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1219. case CX88_BOARD_WINFAST_DTV1800H:
  1220. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1221. &cx88_pinnacle_hybrid_pctv,
  1222. &core->i2c_adap);
  1223. if (fe0->dvb.frontend) {
  1224. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1225. if (attach_xc3028(0x61, dev) < 0)
  1226. goto frontend_detach;
  1227. }
  1228. break;
  1229. case CX88_BOARD_WINFAST_DTV1800H_XC4000:
  1230. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1231. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1232. &cx88_pinnacle_hybrid_pctv,
  1233. &core->i2c_adap);
  1234. if (fe0->dvb.frontend) {
  1235. struct xc4000_config cfg = {
  1236. .i2c_address = 0x61,
  1237. .default_pm = 0,
  1238. .dvb_amplitude = 134,
  1239. .set_smoothedcvbs = 1,
  1240. .if_khz = 4560
  1241. };
  1242. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1243. if (attach_xc4000(dev, &cfg) < 0)
  1244. goto frontend_detach;
  1245. }
  1246. break;
  1247. case CX88_BOARD_GENIATECH_X8000_MT:
  1248. dev->ts_gen_cntrl = 0x00;
  1249. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1250. &cx88_geniatech_x8000_mt,
  1251. &core->i2c_adap);
  1252. if (attach_xc3028(0x61, dev) < 0)
  1253. goto frontend_detach;
  1254. break;
  1255. case CX88_BOARD_KWORLD_ATSC_120:
  1256. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1257. &kworld_atsc_120_config,
  1258. &core->i2c_adap);
  1259. if (attach_xc3028(0x61, dev) < 0)
  1260. goto frontend_detach;
  1261. break;
  1262. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1263. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1264. &dvico_fusionhdtv7_config,
  1265. &core->i2c_adap);
  1266. if (fe0->dvb.frontend != NULL) {
  1267. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1268. &core->i2c_adap,
  1269. &dvico_fusionhdtv7_tuner_config))
  1270. goto frontend_detach;
  1271. }
  1272. break;
  1273. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1274. /* MFE frontend 1 */
  1275. mfe_shared = 1;
  1276. dev->frontends.gate = 2;
  1277. /* DVB-S/S2 Init */
  1278. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1279. &hauppauge_hvr4000_config,
  1280. &dev->core->i2c_adap);
  1281. if (fe0->dvb.frontend) {
  1282. if (!dvb_attach(isl6421_attach,
  1283. fe0->dvb.frontend,
  1284. &dev->core->i2c_adap,
  1285. 0x08, ISL6421_DCL, 0x00, false))
  1286. goto frontend_detach;
  1287. }
  1288. /* MFE frontend 2 */
  1289. fe1 = vb2_dvb_get_frontend(&dev->frontends, 2);
  1290. if (!fe1)
  1291. goto frontend_detach;
  1292. /* DVB-T Init */
  1293. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1294. &hauppauge_hvr_config,
  1295. &dev->core->i2c_adap);
  1296. if (fe1->dvb.frontend) {
  1297. fe1->dvb.frontend->id = 1;
  1298. if (!dvb_attach(simple_tuner_attach,
  1299. fe1->dvb.frontend,
  1300. &dev->core->i2c_adap,
  1301. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1302. goto frontend_detach;
  1303. }
  1304. break;
  1305. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1306. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1307. &hauppauge_hvr4000_config,
  1308. &dev->core->i2c_adap);
  1309. if (fe0->dvb.frontend) {
  1310. if (!dvb_attach(isl6421_attach,
  1311. fe0->dvb.frontend,
  1312. &dev->core->i2c_adap,
  1313. 0x08, ISL6421_DCL, 0x00, false))
  1314. goto frontend_detach;
  1315. }
  1316. break;
  1317. case CX88_BOARD_PROF_6200:
  1318. case CX88_BOARD_TBS_8910:
  1319. case CX88_BOARD_TEVII_S420:
  1320. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1321. &tevii_tuner_sharp_config,
  1322. &core->i2c_adap);
  1323. if (fe0->dvb.frontend != NULL) {
  1324. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1325. &core->i2c_adap, DVB_PLL_OPERA1))
  1326. goto frontend_detach;
  1327. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1328. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1329. } else {
  1330. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1331. &tevii_tuner_earda_config,
  1332. &core->i2c_adap);
  1333. if (fe0->dvb.frontend != NULL) {
  1334. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1335. &core->i2c_adap))
  1336. goto frontend_detach;
  1337. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1338. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1339. }
  1340. }
  1341. break;
  1342. case CX88_BOARD_TEVII_S460:
  1343. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1344. &tevii_s460_config,
  1345. &core->i2c_adap);
  1346. if (fe0->dvb.frontend != NULL)
  1347. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1348. break;
  1349. case CX88_BOARD_TEVII_S464:
  1350. fe0->dvb.frontend = dvb_attach(ds3000_attach,
  1351. &tevii_ds3000_config,
  1352. &core->i2c_adap);
  1353. if (fe0->dvb.frontend != NULL) {
  1354. dvb_attach(ts2020_attach, fe0->dvb.frontend,
  1355. &tevii_ts2020_config, &core->i2c_adap);
  1356. fe0->dvb.frontend->ops.set_voltage =
  1357. tevii_dvbs_set_voltage;
  1358. }
  1359. break;
  1360. case CX88_BOARD_OMICOM_SS4_PCI:
  1361. case CX88_BOARD_TBS_8920:
  1362. case CX88_BOARD_PROF_7300:
  1363. case CX88_BOARD_SATTRADE_ST4200:
  1364. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1365. &hauppauge_hvr4000_config,
  1366. &core->i2c_adap);
  1367. if (fe0->dvb.frontend != NULL)
  1368. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1369. break;
  1370. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1371. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1372. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1373. &core->i2c_adap);
  1374. if (fe0->dvb.frontend) {
  1375. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1376. if (attach_xc3028(0x61, dev) < 0)
  1377. goto frontend_detach;
  1378. }
  1379. break;
  1380. case CX88_BOARD_PROF_7301:{
  1381. struct dvb_tuner_ops *tuner_ops = NULL;
  1382. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1383. &prof_7301_stv0900_config,
  1384. &core->i2c_adap, 0);
  1385. if (fe0->dvb.frontend != NULL) {
  1386. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1387. &prof_7301_stb6100_config,
  1388. &core->i2c_adap))
  1389. goto frontend_detach;
  1390. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1391. tuner_ops->set_frequency = stb6100_set_freq;
  1392. tuner_ops->get_frequency = stb6100_get_freq;
  1393. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1394. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1395. core->prev_set_voltage =
  1396. fe0->dvb.frontend->ops.set_voltage;
  1397. fe0->dvb.frontend->ops.set_voltage =
  1398. tevii_dvbs_set_voltage;
  1399. }
  1400. break;
  1401. }
  1402. case CX88_BOARD_SAMSUNG_SMT_7020:
  1403. dev->ts_gen_cntrl = 0x08;
  1404. cx_set(MO_GP0_IO, 0x0101);
  1405. cx_clear(MO_GP0_IO, 0x01);
  1406. mdelay(100);
  1407. cx_set(MO_GP0_IO, 0x01);
  1408. mdelay(200);
  1409. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1410. &samsung_stv0299_config,
  1411. &dev->core->i2c_adap);
  1412. if (fe0->dvb.frontend) {
  1413. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1414. samsung_smt_7020_tuner_set_params;
  1415. fe0->dvb.frontend->tuner_priv =
  1416. &dev->core->i2c_adap;
  1417. fe0->dvb.frontend->ops.set_voltage =
  1418. samsung_smt_7020_set_voltage;
  1419. fe0->dvb.frontend->ops.set_tone =
  1420. samsung_smt_7020_set_tone;
  1421. }
  1422. break;
  1423. case CX88_BOARD_TWINHAN_VP1027_DVBS:
  1424. dev->ts_gen_cntrl = 0x00;
  1425. fe0->dvb.frontend = dvb_attach(mb86a16_attach,
  1426. &twinhan_vp1027,
  1427. &core->i2c_adap);
  1428. if (fe0->dvb.frontend) {
  1429. core->prev_set_voltage =
  1430. fe0->dvb.frontend->ops.set_voltage;
  1431. fe0->dvb.frontend->ops.set_voltage =
  1432. vp1027_set_voltage;
  1433. }
  1434. break;
  1435. default:
  1436. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1437. core->name);
  1438. break;
  1439. }
  1440. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1441. printk(KERN_ERR
  1442. "%s/2: frontend initialization failed\n",
  1443. core->name);
  1444. goto frontend_detach;
  1445. }
  1446. /* define general-purpose callback pointer */
  1447. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1448. /* Ensure all frontends negotiate bus access */
  1449. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1450. if (fe1)
  1451. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1452. /* Put the analog decoder in standby to keep it quiet */
  1453. call_all(core, core, s_power, 0);
  1454. /* register everything */
  1455. res = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1456. &dev->pci->dev, adapter_nr, mfe_shared);
  1457. if (res)
  1458. goto frontend_detach;
  1459. return res;
  1460. frontend_detach:
  1461. core->gate_ctrl = NULL;
  1462. vb2_dvb_dealloc_frontends(&dev->frontends);
  1463. return res;
  1464. }
  1465. /* ----------------------------------------------------------- */
  1466. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1467. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1468. {
  1469. struct cx88_core *core = drv->core;
  1470. int err = 0;
  1471. dprintk( 1, "%s\n", __func__);
  1472. switch (core->boardnr) {
  1473. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1474. /* We arrive here with either the cx23416 or the cx22702
  1475. * on the bus. Take the bus from the cx23416 and enable the
  1476. * cx22702 demod
  1477. */
  1478. /* Toggle reset on cx22702 leaving i2c active */
  1479. cx_set(MO_GP0_IO, 0x00000080);
  1480. udelay(1000);
  1481. cx_clear(MO_GP0_IO, 0x00000080);
  1482. udelay(50);
  1483. cx_set(MO_GP0_IO, 0x00000080);
  1484. udelay(1000);
  1485. /* enable the cx22702 pins */
  1486. cx_clear(MO_GP0_IO, 0x00000004);
  1487. udelay(1000);
  1488. break;
  1489. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1490. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1491. /* Toggle reset on cx22702 leaving i2c active */
  1492. cx_set(MO_GP0_IO, 0x00000080);
  1493. udelay(1000);
  1494. cx_clear(MO_GP0_IO, 0x00000080);
  1495. udelay(50);
  1496. cx_set(MO_GP0_IO, 0x00000080);
  1497. udelay(1000);
  1498. switch (core->dvbdev->frontends.active_fe_id) {
  1499. case 1: /* DVB-S/S2 Enabled */
  1500. /* tri-state the cx22702 pins */
  1501. cx_set(MO_GP0_IO, 0x00000004);
  1502. /* Take the cx24116/cx24123 out of reset */
  1503. cx_write(MO_SRST_IO, 1);
  1504. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1505. break;
  1506. case 2: /* DVB-T Enabled */
  1507. /* Put the cx24116/cx24123 into reset */
  1508. cx_write(MO_SRST_IO, 0);
  1509. /* enable the cx22702 pins */
  1510. cx_clear(MO_GP0_IO, 0x00000004);
  1511. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1512. break;
  1513. }
  1514. udelay(1000);
  1515. break;
  1516. case CX88_BOARD_WINFAST_DTV2000H_PLUS:
  1517. /* set RF input to AIR for DVB-T (GPIO 16) */
  1518. cx_write(MO_GP2_IO, 0x0101);
  1519. break;
  1520. default:
  1521. err = -ENODEV;
  1522. }
  1523. return err;
  1524. }
  1525. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1526. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1527. {
  1528. struct cx88_core *core = drv->core;
  1529. int err = 0;
  1530. dprintk( 1, "%s\n", __func__);
  1531. switch (core->boardnr) {
  1532. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1533. /* Do Nothing, leave the cx22702 on the bus. */
  1534. break;
  1535. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1536. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1537. break;
  1538. default:
  1539. err = -ENODEV;
  1540. }
  1541. return err;
  1542. }
  1543. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1544. {
  1545. struct cx88_core *core = drv->core;
  1546. struct cx8802_dev *dev = drv->core->dvbdev;
  1547. int err;
  1548. struct vb2_dvb_frontend *fe;
  1549. int i;
  1550. dprintk( 1, "%s\n", __func__);
  1551. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1552. core->boardnr,
  1553. core->name,
  1554. core->pci_bus,
  1555. core->pci_slot);
  1556. err = -ENODEV;
  1557. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1558. goto fail_core;
  1559. /* If vp3054 isn't enabled, a stub will just return 0 */
  1560. err = vp3054_i2c_probe(dev);
  1561. if (0 != err)
  1562. goto fail_core;
  1563. /* dvb stuff */
  1564. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1565. dev->ts_gen_cntrl = 0x0c;
  1566. err = cx8802_alloc_frontends(dev);
  1567. if (err)
  1568. goto fail_core;
  1569. err = -ENODEV;
  1570. for (i = 1; i <= core->board.num_frontends; i++) {
  1571. struct vb2_queue *q;
  1572. fe = vb2_dvb_get_frontend(&core->dvbdev->frontends, i);
  1573. if (fe == NULL) {
  1574. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1575. __func__, i);
  1576. goto fail_probe;
  1577. }
  1578. q = &fe->dvb.dvbq;
  1579. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1580. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF | VB2_READ;
  1581. q->gfp_flags = GFP_DMA32;
  1582. q->min_buffers_needed = 2;
  1583. q->drv_priv = dev;
  1584. q->buf_struct_size = sizeof(struct cx88_buffer);
  1585. q->ops = &dvb_qops;
  1586. q->mem_ops = &vb2_dma_sg_memops;
  1587. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1588. q->lock = &core->lock;
  1589. err = vb2_queue_init(q);
  1590. if (err < 0)
  1591. goto fail_probe;
  1592. /* init struct vb2_dvb */
  1593. fe->dvb.name = dev->core->name;
  1594. }
  1595. err = dvb_register(dev);
  1596. if (err)
  1597. /* frontends/adapter de-allocated in dvb_register */
  1598. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1599. core->name, err);
  1600. return err;
  1601. fail_probe:
  1602. vb2_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1603. fail_core:
  1604. return err;
  1605. }
  1606. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1607. {
  1608. struct cx88_core *core = drv->core;
  1609. struct cx8802_dev *dev = drv->core->dvbdev;
  1610. dprintk( 1, "%s\n", __func__);
  1611. vb2_dvb_unregister_bus(&dev->frontends);
  1612. vp3054_i2c_remove(dev);
  1613. core->gate_ctrl = NULL;
  1614. return 0;
  1615. }
  1616. static struct cx8802_driver cx8802_dvb_driver = {
  1617. .type_id = CX88_MPEG_DVB,
  1618. .hw_access = CX8802_DRVCTL_SHARED,
  1619. .probe = cx8802_dvb_probe,
  1620. .remove = cx8802_dvb_remove,
  1621. .advise_acquire = cx8802_dvb_advise_acquire,
  1622. .advise_release = cx8802_dvb_advise_release,
  1623. };
  1624. static int __init dvb_init(void)
  1625. {
  1626. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %s loaded\n",
  1627. CX88_VERSION);
  1628. return cx8802_register_driver(&cx8802_dvb_driver);
  1629. }
  1630. static void __exit dvb_fini(void)
  1631. {
  1632. cx8802_unregister_driver(&cx8802_dvb_driver);
  1633. }
  1634. module_init(dvb_init);
  1635. module_exit(dvb_fini);