pt1.c 25 KB

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  1. /*
  2. * driver for Earthsoft PT1/PT2
  3. *
  4. * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
  5. *
  6. * based on pt1dvr - http://pt1dvr.sourceforge.jp/
  7. * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/slab.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/pci.h>
  28. #include <linux/kthread.h>
  29. #include <linux/freezer.h>
  30. #include <linux/ratelimit.h>
  31. #include "dvbdev.h"
  32. #include "dvb_demux.h"
  33. #include "dmxdev.h"
  34. #include "dvb_net.h"
  35. #include "dvb_frontend.h"
  36. #include "va1j5jf8007t.h"
  37. #include "va1j5jf8007s.h"
  38. #define DRIVER_NAME "earth-pt1"
  39. #define PT1_PAGE_SHIFT 12
  40. #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
  41. #define PT1_NR_UPACKETS 1024
  42. #define PT1_NR_BUFS 511
  43. struct pt1_buffer_page {
  44. __le32 upackets[PT1_NR_UPACKETS];
  45. };
  46. struct pt1_table_page {
  47. __le32 next_pfn;
  48. __le32 buf_pfns[PT1_NR_BUFS];
  49. };
  50. struct pt1_buffer {
  51. struct pt1_buffer_page *page;
  52. dma_addr_t addr;
  53. };
  54. struct pt1_table {
  55. struct pt1_table_page *page;
  56. dma_addr_t addr;
  57. struct pt1_buffer bufs[PT1_NR_BUFS];
  58. };
  59. #define PT1_NR_ADAPS 4
  60. struct pt1_adapter;
  61. struct pt1 {
  62. struct pci_dev *pdev;
  63. void __iomem *regs;
  64. struct i2c_adapter i2c_adap;
  65. int i2c_running;
  66. struct pt1_adapter *adaps[PT1_NR_ADAPS];
  67. struct pt1_table *tables;
  68. struct task_struct *kthread;
  69. int table_index;
  70. int buf_index;
  71. struct mutex lock;
  72. int power;
  73. int reset;
  74. };
  75. struct pt1_adapter {
  76. struct pt1 *pt1;
  77. int index;
  78. u8 *buf;
  79. int upacket_count;
  80. int packet_count;
  81. int st_count;
  82. struct dvb_adapter adap;
  83. struct dvb_demux demux;
  84. int users;
  85. struct dmxdev dmxdev;
  86. struct dvb_frontend *fe;
  87. int (*orig_set_voltage)(struct dvb_frontend *fe,
  88. enum fe_sec_voltage voltage);
  89. int (*orig_sleep)(struct dvb_frontend *fe);
  90. int (*orig_init)(struct dvb_frontend *fe);
  91. enum fe_sec_voltage voltage;
  92. int sleep;
  93. };
  94. static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
  95. {
  96. writel(data, pt1->regs + reg * 4);
  97. }
  98. static u32 pt1_read_reg(struct pt1 *pt1, int reg)
  99. {
  100. return readl(pt1->regs + reg * 4);
  101. }
  102. static int pt1_nr_tables = 8;
  103. module_param_named(nr_tables, pt1_nr_tables, int, 0);
  104. static void pt1_increment_table_count(struct pt1 *pt1)
  105. {
  106. pt1_write_reg(pt1, 0, 0x00000020);
  107. }
  108. static void pt1_init_table_count(struct pt1 *pt1)
  109. {
  110. pt1_write_reg(pt1, 0, 0x00000010);
  111. }
  112. static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
  113. {
  114. pt1_write_reg(pt1, 5, first_pfn);
  115. pt1_write_reg(pt1, 0, 0x0c000040);
  116. }
  117. static void pt1_unregister_tables(struct pt1 *pt1)
  118. {
  119. pt1_write_reg(pt1, 0, 0x08080000);
  120. }
  121. static int pt1_sync(struct pt1 *pt1)
  122. {
  123. int i;
  124. for (i = 0; i < 57; i++) {
  125. if (pt1_read_reg(pt1, 0) & 0x20000000)
  126. return 0;
  127. pt1_write_reg(pt1, 0, 0x00000008);
  128. }
  129. dev_err(&pt1->pdev->dev, "could not sync\n");
  130. return -EIO;
  131. }
  132. static u64 pt1_identify(struct pt1 *pt1)
  133. {
  134. int i;
  135. u64 id;
  136. id = 0;
  137. for (i = 0; i < 57; i++) {
  138. id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
  139. pt1_write_reg(pt1, 0, 0x00000008);
  140. }
  141. return id;
  142. }
  143. static int pt1_unlock(struct pt1 *pt1)
  144. {
  145. int i;
  146. pt1_write_reg(pt1, 0, 0x00000008);
  147. for (i = 0; i < 3; i++) {
  148. if (pt1_read_reg(pt1, 0) & 0x80000000)
  149. return 0;
  150. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  151. }
  152. dev_err(&pt1->pdev->dev, "could not unlock\n");
  153. return -EIO;
  154. }
  155. static int pt1_reset_pci(struct pt1 *pt1)
  156. {
  157. int i;
  158. pt1_write_reg(pt1, 0, 0x01010000);
  159. pt1_write_reg(pt1, 0, 0x01000000);
  160. for (i = 0; i < 10; i++) {
  161. if (pt1_read_reg(pt1, 0) & 0x00000001)
  162. return 0;
  163. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  164. }
  165. dev_err(&pt1->pdev->dev, "could not reset PCI\n");
  166. return -EIO;
  167. }
  168. static int pt1_reset_ram(struct pt1 *pt1)
  169. {
  170. int i;
  171. pt1_write_reg(pt1, 0, 0x02020000);
  172. pt1_write_reg(pt1, 0, 0x02000000);
  173. for (i = 0; i < 10; i++) {
  174. if (pt1_read_reg(pt1, 0) & 0x00000002)
  175. return 0;
  176. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  177. }
  178. dev_err(&pt1->pdev->dev, "could not reset RAM\n");
  179. return -EIO;
  180. }
  181. static int pt1_do_enable_ram(struct pt1 *pt1)
  182. {
  183. int i, j;
  184. u32 status;
  185. status = pt1_read_reg(pt1, 0) & 0x00000004;
  186. pt1_write_reg(pt1, 0, 0x00000002);
  187. for (i = 0; i < 10; i++) {
  188. for (j = 0; j < 1024; j++) {
  189. if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
  190. return 0;
  191. }
  192. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  193. }
  194. dev_err(&pt1->pdev->dev, "could not enable RAM\n");
  195. return -EIO;
  196. }
  197. static int pt1_enable_ram(struct pt1 *pt1)
  198. {
  199. int i, ret;
  200. int phase;
  201. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  202. phase = pt1->pdev->device == 0x211a ? 128 : 166;
  203. for (i = 0; i < phase; i++) {
  204. ret = pt1_do_enable_ram(pt1);
  205. if (ret < 0)
  206. return ret;
  207. }
  208. return 0;
  209. }
  210. static void pt1_disable_ram(struct pt1 *pt1)
  211. {
  212. pt1_write_reg(pt1, 0, 0x0b0b0000);
  213. }
  214. static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
  215. {
  216. pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
  217. }
  218. static void pt1_init_streams(struct pt1 *pt1)
  219. {
  220. int i;
  221. for (i = 0; i < PT1_NR_ADAPS; i++)
  222. pt1_set_stream(pt1, i, 0);
  223. }
  224. static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
  225. {
  226. u32 upacket;
  227. int i;
  228. int index;
  229. struct pt1_adapter *adap;
  230. int offset;
  231. u8 *buf;
  232. int sc;
  233. if (!page->upackets[PT1_NR_UPACKETS - 1])
  234. return 0;
  235. for (i = 0; i < PT1_NR_UPACKETS; i++) {
  236. upacket = le32_to_cpu(page->upackets[i]);
  237. index = (upacket >> 29) - 1;
  238. if (index < 0 || index >= PT1_NR_ADAPS)
  239. continue;
  240. adap = pt1->adaps[index];
  241. if (upacket >> 25 & 1)
  242. adap->upacket_count = 0;
  243. else if (!adap->upacket_count)
  244. continue;
  245. if (upacket >> 24 & 1)
  246. printk_ratelimited(KERN_INFO "earth-pt1: device "
  247. "buffer overflowing. table[%d] buf[%d]\n",
  248. pt1->table_index, pt1->buf_index);
  249. sc = upacket >> 26 & 0x7;
  250. if (adap->st_count != -1 && sc != ((adap->st_count + 1) & 0x7))
  251. printk_ratelimited(KERN_INFO "earth-pt1: data loss"
  252. " in streamID(adapter)[%d]\n", index);
  253. adap->st_count = sc;
  254. buf = adap->buf;
  255. offset = adap->packet_count * 188 + adap->upacket_count * 3;
  256. buf[offset] = upacket >> 16;
  257. buf[offset + 1] = upacket >> 8;
  258. if (adap->upacket_count != 62)
  259. buf[offset + 2] = upacket;
  260. if (++adap->upacket_count >= 63) {
  261. adap->upacket_count = 0;
  262. if (++adap->packet_count >= 21) {
  263. dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
  264. adap->packet_count = 0;
  265. }
  266. }
  267. }
  268. page->upackets[PT1_NR_UPACKETS - 1] = 0;
  269. return 1;
  270. }
  271. static int pt1_thread(void *data)
  272. {
  273. struct pt1 *pt1;
  274. struct pt1_buffer_page *page;
  275. pt1 = data;
  276. set_freezable();
  277. while (!kthread_should_stop()) {
  278. try_to_freeze();
  279. page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page;
  280. if (!pt1_filter(pt1, page)) {
  281. schedule_timeout_interruptible((HZ + 999) / 1000);
  282. continue;
  283. }
  284. if (++pt1->buf_index >= PT1_NR_BUFS) {
  285. pt1_increment_table_count(pt1);
  286. pt1->buf_index = 0;
  287. if (++pt1->table_index >= pt1_nr_tables)
  288. pt1->table_index = 0;
  289. }
  290. }
  291. return 0;
  292. }
  293. static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
  294. {
  295. dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
  296. }
  297. static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
  298. {
  299. void *page;
  300. dma_addr_t addr;
  301. page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
  302. GFP_KERNEL);
  303. if (page == NULL)
  304. return NULL;
  305. BUG_ON(addr & (PT1_PAGE_SIZE - 1));
  306. BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
  307. *addrp = addr;
  308. *pfnp = addr >> PT1_PAGE_SHIFT;
  309. return page;
  310. }
  311. static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
  312. {
  313. pt1_free_page(pt1, buf->page, buf->addr);
  314. }
  315. static int
  316. pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
  317. {
  318. struct pt1_buffer_page *page;
  319. dma_addr_t addr;
  320. page = pt1_alloc_page(pt1, &addr, pfnp);
  321. if (page == NULL)
  322. return -ENOMEM;
  323. page->upackets[PT1_NR_UPACKETS - 1] = 0;
  324. buf->page = page;
  325. buf->addr = addr;
  326. return 0;
  327. }
  328. static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
  329. {
  330. int i;
  331. for (i = 0; i < PT1_NR_BUFS; i++)
  332. pt1_cleanup_buffer(pt1, &table->bufs[i]);
  333. pt1_free_page(pt1, table->page, table->addr);
  334. }
  335. static int
  336. pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
  337. {
  338. struct pt1_table_page *page;
  339. dma_addr_t addr;
  340. int i, ret;
  341. u32 buf_pfn;
  342. page = pt1_alloc_page(pt1, &addr, pfnp);
  343. if (page == NULL)
  344. return -ENOMEM;
  345. for (i = 0; i < PT1_NR_BUFS; i++) {
  346. ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
  347. if (ret < 0)
  348. goto err;
  349. page->buf_pfns[i] = cpu_to_le32(buf_pfn);
  350. }
  351. pt1_increment_table_count(pt1);
  352. table->page = page;
  353. table->addr = addr;
  354. return 0;
  355. err:
  356. while (i--)
  357. pt1_cleanup_buffer(pt1, &table->bufs[i]);
  358. pt1_free_page(pt1, page, addr);
  359. return ret;
  360. }
  361. static void pt1_cleanup_tables(struct pt1 *pt1)
  362. {
  363. struct pt1_table *tables;
  364. int i;
  365. tables = pt1->tables;
  366. pt1_unregister_tables(pt1);
  367. for (i = 0; i < pt1_nr_tables; i++)
  368. pt1_cleanup_table(pt1, &tables[i]);
  369. vfree(tables);
  370. }
  371. static int pt1_init_tables(struct pt1 *pt1)
  372. {
  373. struct pt1_table *tables;
  374. int i, ret;
  375. u32 first_pfn, pfn;
  376. tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
  377. if (tables == NULL)
  378. return -ENOMEM;
  379. pt1_init_table_count(pt1);
  380. i = 0;
  381. if (pt1_nr_tables) {
  382. ret = pt1_init_table(pt1, &tables[0], &first_pfn);
  383. if (ret)
  384. goto err;
  385. i++;
  386. }
  387. while (i < pt1_nr_tables) {
  388. ret = pt1_init_table(pt1, &tables[i], &pfn);
  389. if (ret)
  390. goto err;
  391. tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
  392. i++;
  393. }
  394. tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
  395. pt1_register_tables(pt1, first_pfn);
  396. pt1->tables = tables;
  397. return 0;
  398. err:
  399. while (i--)
  400. pt1_cleanup_table(pt1, &tables[i]);
  401. vfree(tables);
  402. return ret;
  403. }
  404. static int pt1_start_polling(struct pt1 *pt1)
  405. {
  406. int ret = 0;
  407. mutex_lock(&pt1->lock);
  408. if (!pt1->kthread) {
  409. pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1");
  410. if (IS_ERR(pt1->kthread)) {
  411. ret = PTR_ERR(pt1->kthread);
  412. pt1->kthread = NULL;
  413. }
  414. }
  415. mutex_unlock(&pt1->lock);
  416. return ret;
  417. }
  418. static int pt1_start_feed(struct dvb_demux_feed *feed)
  419. {
  420. struct pt1_adapter *adap;
  421. adap = container_of(feed->demux, struct pt1_adapter, demux);
  422. if (!adap->users++) {
  423. int ret;
  424. ret = pt1_start_polling(adap->pt1);
  425. if (ret)
  426. return ret;
  427. pt1_set_stream(adap->pt1, adap->index, 1);
  428. }
  429. return 0;
  430. }
  431. static void pt1_stop_polling(struct pt1 *pt1)
  432. {
  433. int i, count;
  434. mutex_lock(&pt1->lock);
  435. for (i = 0, count = 0; i < PT1_NR_ADAPS; i++)
  436. count += pt1->adaps[i]->users;
  437. if (count == 0 && pt1->kthread) {
  438. kthread_stop(pt1->kthread);
  439. pt1->kthread = NULL;
  440. }
  441. mutex_unlock(&pt1->lock);
  442. }
  443. static int pt1_stop_feed(struct dvb_demux_feed *feed)
  444. {
  445. struct pt1_adapter *adap;
  446. adap = container_of(feed->demux, struct pt1_adapter, demux);
  447. if (!--adap->users) {
  448. pt1_set_stream(adap->pt1, adap->index, 0);
  449. pt1_stop_polling(adap->pt1);
  450. }
  451. return 0;
  452. }
  453. static void
  454. pt1_update_power(struct pt1 *pt1)
  455. {
  456. int bits;
  457. int i;
  458. struct pt1_adapter *adap;
  459. static const int sleep_bits[] = {
  460. 1 << 4,
  461. 1 << 6 | 1 << 7,
  462. 1 << 5,
  463. 1 << 6 | 1 << 8,
  464. };
  465. bits = pt1->power | !pt1->reset << 3;
  466. mutex_lock(&pt1->lock);
  467. for (i = 0; i < PT1_NR_ADAPS; i++) {
  468. adap = pt1->adaps[i];
  469. switch (adap->voltage) {
  470. case SEC_VOLTAGE_13: /* actually 11V */
  471. bits |= 1 << 1;
  472. break;
  473. case SEC_VOLTAGE_18: /* actually 15V */
  474. bits |= 1 << 1 | 1 << 2;
  475. break;
  476. default:
  477. break;
  478. }
  479. /* XXX: The bits should be changed depending on adap->sleep. */
  480. bits |= sleep_bits[i];
  481. }
  482. pt1_write_reg(pt1, 1, bits);
  483. mutex_unlock(&pt1->lock);
  484. }
  485. static int pt1_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
  486. {
  487. struct pt1_adapter *adap;
  488. adap = container_of(fe->dvb, struct pt1_adapter, adap);
  489. adap->voltage = voltage;
  490. pt1_update_power(adap->pt1);
  491. if (adap->orig_set_voltage)
  492. return adap->orig_set_voltage(fe, voltage);
  493. else
  494. return 0;
  495. }
  496. static int pt1_sleep(struct dvb_frontend *fe)
  497. {
  498. struct pt1_adapter *adap;
  499. adap = container_of(fe->dvb, struct pt1_adapter, adap);
  500. adap->sleep = 1;
  501. pt1_update_power(adap->pt1);
  502. if (adap->orig_sleep)
  503. return adap->orig_sleep(fe);
  504. else
  505. return 0;
  506. }
  507. static int pt1_wakeup(struct dvb_frontend *fe)
  508. {
  509. struct pt1_adapter *adap;
  510. adap = container_of(fe->dvb, struct pt1_adapter, adap);
  511. adap->sleep = 0;
  512. pt1_update_power(adap->pt1);
  513. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  514. if (adap->orig_init)
  515. return adap->orig_init(fe);
  516. else
  517. return 0;
  518. }
  519. static void pt1_free_adapter(struct pt1_adapter *adap)
  520. {
  521. adap->demux.dmx.close(&adap->demux.dmx);
  522. dvb_dmxdev_release(&adap->dmxdev);
  523. dvb_dmx_release(&adap->demux);
  524. dvb_unregister_adapter(&adap->adap);
  525. free_page((unsigned long)adap->buf);
  526. kfree(adap);
  527. }
  528. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  529. static struct pt1_adapter *
  530. pt1_alloc_adapter(struct pt1 *pt1)
  531. {
  532. struct pt1_adapter *adap;
  533. void *buf;
  534. struct dvb_adapter *dvb_adap;
  535. struct dvb_demux *demux;
  536. struct dmxdev *dmxdev;
  537. int ret;
  538. adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
  539. if (!adap) {
  540. ret = -ENOMEM;
  541. goto err;
  542. }
  543. adap->pt1 = pt1;
  544. adap->voltage = SEC_VOLTAGE_OFF;
  545. adap->sleep = 1;
  546. buf = (u8 *)__get_free_page(GFP_KERNEL);
  547. if (!buf) {
  548. ret = -ENOMEM;
  549. goto err_kfree;
  550. }
  551. adap->buf = buf;
  552. adap->upacket_count = 0;
  553. adap->packet_count = 0;
  554. adap->st_count = -1;
  555. dvb_adap = &adap->adap;
  556. dvb_adap->priv = adap;
  557. ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
  558. &pt1->pdev->dev, adapter_nr);
  559. if (ret < 0)
  560. goto err_free_page;
  561. demux = &adap->demux;
  562. demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
  563. demux->priv = adap;
  564. demux->feednum = 256;
  565. demux->filternum = 256;
  566. demux->start_feed = pt1_start_feed;
  567. demux->stop_feed = pt1_stop_feed;
  568. demux->write_to_decoder = NULL;
  569. ret = dvb_dmx_init(demux);
  570. if (ret < 0)
  571. goto err_unregister_adapter;
  572. dmxdev = &adap->dmxdev;
  573. dmxdev->filternum = 256;
  574. dmxdev->demux = &demux->dmx;
  575. dmxdev->capabilities = 0;
  576. ret = dvb_dmxdev_init(dmxdev, dvb_adap);
  577. if (ret < 0)
  578. goto err_dmx_release;
  579. return adap;
  580. err_dmx_release:
  581. dvb_dmx_release(demux);
  582. err_unregister_adapter:
  583. dvb_unregister_adapter(dvb_adap);
  584. err_free_page:
  585. free_page((unsigned long)buf);
  586. err_kfree:
  587. kfree(adap);
  588. err:
  589. return ERR_PTR(ret);
  590. }
  591. static void pt1_cleanup_adapters(struct pt1 *pt1)
  592. {
  593. int i;
  594. for (i = 0; i < PT1_NR_ADAPS; i++)
  595. pt1_free_adapter(pt1->adaps[i]);
  596. }
  597. static int pt1_init_adapters(struct pt1 *pt1)
  598. {
  599. int i;
  600. struct pt1_adapter *adap;
  601. int ret;
  602. for (i = 0; i < PT1_NR_ADAPS; i++) {
  603. adap = pt1_alloc_adapter(pt1);
  604. if (IS_ERR(adap)) {
  605. ret = PTR_ERR(adap);
  606. goto err;
  607. }
  608. adap->index = i;
  609. pt1->adaps[i] = adap;
  610. }
  611. return 0;
  612. err:
  613. while (i--)
  614. pt1_free_adapter(pt1->adaps[i]);
  615. return ret;
  616. }
  617. static void pt1_cleanup_frontend(struct pt1_adapter *adap)
  618. {
  619. dvb_unregister_frontend(adap->fe);
  620. }
  621. static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe)
  622. {
  623. int ret;
  624. adap->orig_set_voltage = fe->ops.set_voltage;
  625. adap->orig_sleep = fe->ops.sleep;
  626. adap->orig_init = fe->ops.init;
  627. fe->ops.set_voltage = pt1_set_voltage;
  628. fe->ops.sleep = pt1_sleep;
  629. fe->ops.init = pt1_wakeup;
  630. ret = dvb_register_frontend(&adap->adap, fe);
  631. if (ret < 0)
  632. return ret;
  633. adap->fe = fe;
  634. return 0;
  635. }
  636. static void pt1_cleanup_frontends(struct pt1 *pt1)
  637. {
  638. int i;
  639. for (i = 0; i < PT1_NR_ADAPS; i++)
  640. pt1_cleanup_frontend(pt1->adaps[i]);
  641. }
  642. struct pt1_config {
  643. struct va1j5jf8007s_config va1j5jf8007s_config;
  644. struct va1j5jf8007t_config va1j5jf8007t_config;
  645. };
  646. static const struct pt1_config pt1_configs[2] = {
  647. {
  648. {
  649. .demod_address = 0x1b,
  650. .frequency = VA1J5JF8007S_20MHZ,
  651. },
  652. {
  653. .demod_address = 0x1a,
  654. .frequency = VA1J5JF8007T_20MHZ,
  655. },
  656. }, {
  657. {
  658. .demod_address = 0x19,
  659. .frequency = VA1J5JF8007S_20MHZ,
  660. },
  661. {
  662. .demod_address = 0x18,
  663. .frequency = VA1J5JF8007T_20MHZ,
  664. },
  665. },
  666. };
  667. static const struct pt1_config pt2_configs[2] = {
  668. {
  669. {
  670. .demod_address = 0x1b,
  671. .frequency = VA1J5JF8007S_25MHZ,
  672. },
  673. {
  674. .demod_address = 0x1a,
  675. .frequency = VA1J5JF8007T_25MHZ,
  676. },
  677. }, {
  678. {
  679. .demod_address = 0x19,
  680. .frequency = VA1J5JF8007S_25MHZ,
  681. },
  682. {
  683. .demod_address = 0x18,
  684. .frequency = VA1J5JF8007T_25MHZ,
  685. },
  686. },
  687. };
  688. static int pt1_init_frontends(struct pt1 *pt1)
  689. {
  690. int i, j;
  691. struct i2c_adapter *i2c_adap;
  692. const struct pt1_config *configs, *config;
  693. struct dvb_frontend *fe[4];
  694. int ret;
  695. i = 0;
  696. j = 0;
  697. i2c_adap = &pt1->i2c_adap;
  698. configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs;
  699. do {
  700. config = &configs[i / 2];
  701. fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
  702. i2c_adap);
  703. if (!fe[i]) {
  704. ret = -ENODEV; /* This does not sound nice... */
  705. goto err;
  706. }
  707. i++;
  708. fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
  709. i2c_adap);
  710. if (!fe[i]) {
  711. ret = -ENODEV;
  712. goto err;
  713. }
  714. i++;
  715. ret = va1j5jf8007s_prepare(fe[i - 2]);
  716. if (ret < 0)
  717. goto err;
  718. ret = va1j5jf8007t_prepare(fe[i - 1]);
  719. if (ret < 0)
  720. goto err;
  721. } while (i < 4);
  722. do {
  723. ret = pt1_init_frontend(pt1->adaps[j], fe[j]);
  724. if (ret < 0)
  725. goto err;
  726. } while (++j < 4);
  727. return 0;
  728. err:
  729. while (i-- > j)
  730. fe[i]->ops.release(fe[i]);
  731. while (j--)
  732. dvb_unregister_frontend(fe[j]);
  733. return ret;
  734. }
  735. static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
  736. int clock, int data, int next_addr)
  737. {
  738. pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
  739. !clock << 11 | !data << 10 | next_addr);
  740. }
  741. static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
  742. {
  743. pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
  744. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
  745. pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
  746. *addrp = addr + 3;
  747. }
  748. static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
  749. {
  750. pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
  751. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
  752. pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
  753. pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
  754. *addrp = addr + 4;
  755. }
  756. static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
  757. {
  758. int i;
  759. for (i = 0; i < 8; i++)
  760. pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
  761. pt1_i2c_write_bit(pt1, addr, &addr, 1);
  762. *addrp = addr;
  763. }
  764. static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
  765. {
  766. int i;
  767. for (i = 0; i < 8; i++)
  768. pt1_i2c_read_bit(pt1, addr, &addr);
  769. pt1_i2c_write_bit(pt1, addr, &addr, last);
  770. *addrp = addr;
  771. }
  772. static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
  773. {
  774. pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
  775. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  776. pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
  777. *addrp = addr + 3;
  778. }
  779. static void
  780. pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
  781. {
  782. int i;
  783. pt1_i2c_prepare(pt1, addr, &addr);
  784. pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
  785. for (i = 0; i < msg->len; i++)
  786. pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
  787. *addrp = addr;
  788. }
  789. static void
  790. pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
  791. {
  792. int i;
  793. pt1_i2c_prepare(pt1, addr, &addr);
  794. pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
  795. for (i = 0; i < msg->len; i++)
  796. pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
  797. *addrp = addr;
  798. }
  799. static int pt1_i2c_end(struct pt1 *pt1, int addr)
  800. {
  801. pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
  802. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  803. pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
  804. pt1_write_reg(pt1, 0, 0x00000004);
  805. do {
  806. if (signal_pending(current))
  807. return -EINTR;
  808. schedule_timeout_interruptible((HZ + 999) / 1000);
  809. } while (pt1_read_reg(pt1, 0) & 0x00000080);
  810. return 0;
  811. }
  812. static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
  813. {
  814. int addr;
  815. addr = 0;
  816. pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
  817. addr = addr + 1;
  818. if (!pt1->i2c_running) {
  819. pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
  820. pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
  821. addr = addr + 2;
  822. pt1->i2c_running = 1;
  823. }
  824. *addrp = addr;
  825. }
  826. static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
  827. {
  828. struct pt1 *pt1;
  829. int i;
  830. struct i2c_msg *msg, *next_msg;
  831. int addr, ret;
  832. u16 len;
  833. u32 word;
  834. pt1 = i2c_get_adapdata(adap);
  835. for (i = 0; i < num; i++) {
  836. msg = &msgs[i];
  837. if (msg->flags & I2C_M_RD)
  838. return -ENOTSUPP;
  839. if (i + 1 < num)
  840. next_msg = &msgs[i + 1];
  841. else
  842. next_msg = NULL;
  843. if (next_msg && next_msg->flags & I2C_M_RD) {
  844. i++;
  845. len = next_msg->len;
  846. if (len > 4)
  847. return -ENOTSUPP;
  848. pt1_i2c_begin(pt1, &addr);
  849. pt1_i2c_write_msg(pt1, addr, &addr, msg);
  850. pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
  851. ret = pt1_i2c_end(pt1, addr);
  852. if (ret < 0)
  853. return ret;
  854. word = pt1_read_reg(pt1, 2);
  855. while (len--) {
  856. next_msg->buf[len] = word;
  857. word >>= 8;
  858. }
  859. } else {
  860. pt1_i2c_begin(pt1, &addr);
  861. pt1_i2c_write_msg(pt1, addr, &addr, msg);
  862. ret = pt1_i2c_end(pt1, addr);
  863. if (ret < 0)
  864. return ret;
  865. }
  866. }
  867. return num;
  868. }
  869. static u32 pt1_i2c_func(struct i2c_adapter *adap)
  870. {
  871. return I2C_FUNC_I2C;
  872. }
  873. static const struct i2c_algorithm pt1_i2c_algo = {
  874. .master_xfer = pt1_i2c_xfer,
  875. .functionality = pt1_i2c_func,
  876. };
  877. static void pt1_i2c_wait(struct pt1 *pt1)
  878. {
  879. int i;
  880. for (i = 0; i < 128; i++)
  881. pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
  882. }
  883. static void pt1_i2c_init(struct pt1 *pt1)
  884. {
  885. int i;
  886. for (i = 0; i < 1024; i++)
  887. pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
  888. }
  889. static void pt1_remove(struct pci_dev *pdev)
  890. {
  891. struct pt1 *pt1;
  892. void __iomem *regs;
  893. pt1 = pci_get_drvdata(pdev);
  894. regs = pt1->regs;
  895. if (pt1->kthread)
  896. kthread_stop(pt1->kthread);
  897. pt1_cleanup_tables(pt1);
  898. pt1_cleanup_frontends(pt1);
  899. pt1_disable_ram(pt1);
  900. pt1->power = 0;
  901. pt1->reset = 1;
  902. pt1_update_power(pt1);
  903. pt1_cleanup_adapters(pt1);
  904. i2c_del_adapter(&pt1->i2c_adap);
  905. kfree(pt1);
  906. pci_iounmap(pdev, regs);
  907. pci_release_regions(pdev);
  908. pci_disable_device(pdev);
  909. }
  910. static int pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  911. {
  912. int ret;
  913. void __iomem *regs;
  914. struct pt1 *pt1;
  915. struct i2c_adapter *i2c_adap;
  916. ret = pci_enable_device(pdev);
  917. if (ret < 0)
  918. goto err;
  919. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  920. if (ret < 0)
  921. goto err_pci_disable_device;
  922. pci_set_master(pdev);
  923. ret = pci_request_regions(pdev, DRIVER_NAME);
  924. if (ret < 0)
  925. goto err_pci_disable_device;
  926. regs = pci_iomap(pdev, 0, 0);
  927. if (!regs) {
  928. ret = -EIO;
  929. goto err_pci_release_regions;
  930. }
  931. pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
  932. if (!pt1) {
  933. ret = -ENOMEM;
  934. goto err_pci_iounmap;
  935. }
  936. mutex_init(&pt1->lock);
  937. pt1->pdev = pdev;
  938. pt1->regs = regs;
  939. pci_set_drvdata(pdev, pt1);
  940. ret = pt1_init_adapters(pt1);
  941. if (ret < 0)
  942. goto err_kfree;
  943. mutex_init(&pt1->lock);
  944. pt1->power = 0;
  945. pt1->reset = 1;
  946. pt1_update_power(pt1);
  947. i2c_adap = &pt1->i2c_adap;
  948. i2c_adap->algo = &pt1_i2c_algo;
  949. i2c_adap->algo_data = NULL;
  950. i2c_adap->dev.parent = &pdev->dev;
  951. strcpy(i2c_adap->name, DRIVER_NAME);
  952. i2c_set_adapdata(i2c_adap, pt1);
  953. ret = i2c_add_adapter(i2c_adap);
  954. if (ret < 0)
  955. goto err_pt1_cleanup_adapters;
  956. pt1_i2c_init(pt1);
  957. pt1_i2c_wait(pt1);
  958. ret = pt1_sync(pt1);
  959. if (ret < 0)
  960. goto err_i2c_del_adapter;
  961. pt1_identify(pt1);
  962. ret = pt1_unlock(pt1);
  963. if (ret < 0)
  964. goto err_i2c_del_adapter;
  965. ret = pt1_reset_pci(pt1);
  966. if (ret < 0)
  967. goto err_i2c_del_adapter;
  968. ret = pt1_reset_ram(pt1);
  969. if (ret < 0)
  970. goto err_i2c_del_adapter;
  971. ret = pt1_enable_ram(pt1);
  972. if (ret < 0)
  973. goto err_i2c_del_adapter;
  974. pt1_init_streams(pt1);
  975. pt1->power = 1;
  976. pt1_update_power(pt1);
  977. schedule_timeout_uninterruptible((HZ + 49) / 50);
  978. pt1->reset = 0;
  979. pt1_update_power(pt1);
  980. schedule_timeout_uninterruptible((HZ + 999) / 1000);
  981. ret = pt1_init_frontends(pt1);
  982. if (ret < 0)
  983. goto err_pt1_disable_ram;
  984. ret = pt1_init_tables(pt1);
  985. if (ret < 0)
  986. goto err_pt1_cleanup_frontends;
  987. return 0;
  988. err_pt1_cleanup_frontends:
  989. pt1_cleanup_frontends(pt1);
  990. err_pt1_disable_ram:
  991. pt1_disable_ram(pt1);
  992. pt1->power = 0;
  993. pt1->reset = 1;
  994. pt1_update_power(pt1);
  995. err_i2c_del_adapter:
  996. i2c_del_adapter(i2c_adap);
  997. err_pt1_cleanup_adapters:
  998. pt1_cleanup_adapters(pt1);
  999. err_kfree:
  1000. kfree(pt1);
  1001. err_pci_iounmap:
  1002. pci_iounmap(pdev, regs);
  1003. err_pci_release_regions:
  1004. pci_release_regions(pdev);
  1005. err_pci_disable_device:
  1006. pci_disable_device(pdev);
  1007. err:
  1008. return ret;
  1009. }
  1010. static struct pci_device_id pt1_id_table[] = {
  1011. { PCI_DEVICE(0x10ee, 0x211a) },
  1012. { PCI_DEVICE(0x10ee, 0x222a) },
  1013. { },
  1014. };
  1015. MODULE_DEVICE_TABLE(pci, pt1_id_table);
  1016. static struct pci_driver pt1_driver = {
  1017. .name = DRIVER_NAME,
  1018. .probe = pt1_probe,
  1019. .remove = pt1_remove,
  1020. .id_table = pt1_id_table,
  1021. };
  1022. module_pci_driver(pt1_driver);
  1023. MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
  1024. MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver");
  1025. MODULE_LICENSE("GPL");