ppi.c 8.8 KB

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  1. /*
  2. * ppi.c Analog Devices Parallel Peripheral Interface driver
  3. *
  4. * Copyright (c) 2011 Analog Devices Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18. */
  19. #include <linux/module.h>
  20. #include <linux/slab.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/bfin_ppi.h>
  23. #include <asm/blackfin.h>
  24. #include <asm/cacheflush.h>
  25. #include <asm/dma.h>
  26. #include <asm/portmux.h>
  27. #include <media/blackfin/ppi.h>
  28. static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
  29. static void ppi_detach_irq(struct ppi_if *ppi);
  30. static int ppi_start(struct ppi_if *ppi);
  31. static int ppi_stop(struct ppi_if *ppi);
  32. static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
  33. static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
  34. static const struct ppi_ops ppi_ops = {
  35. .attach_irq = ppi_attach_irq,
  36. .detach_irq = ppi_detach_irq,
  37. .start = ppi_start,
  38. .stop = ppi_stop,
  39. .set_params = ppi_set_params,
  40. .update_addr = ppi_update_addr,
  41. };
  42. static irqreturn_t ppi_irq_err(int irq, void *dev_id)
  43. {
  44. struct ppi_if *ppi = dev_id;
  45. const struct ppi_info *info = ppi->info;
  46. switch (info->type) {
  47. case PPI_TYPE_PPI:
  48. {
  49. struct bfin_ppi_regs *reg = info->base;
  50. unsigned short status;
  51. /* register on bf561 is cleared when read
  52. * others are W1C
  53. */
  54. status = bfin_read16(&reg->status);
  55. if (status & 0x3000)
  56. ppi->err = true;
  57. bfin_write16(&reg->status, 0xff00);
  58. break;
  59. }
  60. case PPI_TYPE_EPPI:
  61. {
  62. struct bfin_eppi_regs *reg = info->base;
  63. unsigned short status;
  64. status = bfin_read16(&reg->status);
  65. if (status & 0x2)
  66. ppi->err = true;
  67. bfin_write16(&reg->status, 0xffff);
  68. break;
  69. }
  70. case PPI_TYPE_EPPI3:
  71. {
  72. struct bfin_eppi3_regs *reg = info->base;
  73. unsigned long stat;
  74. stat = bfin_read32(&reg->stat);
  75. if (stat & 0x2)
  76. ppi->err = true;
  77. bfin_write32(&reg->stat, 0xc0ff);
  78. break;
  79. }
  80. default:
  81. break;
  82. }
  83. return IRQ_HANDLED;
  84. }
  85. static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
  86. {
  87. const struct ppi_info *info = ppi->info;
  88. int ret;
  89. ret = request_dma(info->dma_ch, "PPI_DMA");
  90. if (ret) {
  91. pr_err("Unable to allocate DMA channel for PPI\n");
  92. return ret;
  93. }
  94. set_dma_callback(info->dma_ch, handler, ppi);
  95. if (ppi->err_int) {
  96. ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
  97. if (ret) {
  98. pr_err("Unable to allocate IRQ for PPI\n");
  99. free_dma(info->dma_ch);
  100. }
  101. }
  102. return ret;
  103. }
  104. static void ppi_detach_irq(struct ppi_if *ppi)
  105. {
  106. const struct ppi_info *info = ppi->info;
  107. if (ppi->err_int)
  108. free_irq(info->irq_err, ppi);
  109. free_dma(info->dma_ch);
  110. }
  111. static int ppi_start(struct ppi_if *ppi)
  112. {
  113. const struct ppi_info *info = ppi->info;
  114. /* enable DMA */
  115. enable_dma(info->dma_ch);
  116. /* enable PPI */
  117. ppi->ppi_control |= PORT_EN;
  118. switch (info->type) {
  119. case PPI_TYPE_PPI:
  120. {
  121. struct bfin_ppi_regs *reg = info->base;
  122. bfin_write16(&reg->control, ppi->ppi_control);
  123. break;
  124. }
  125. case PPI_TYPE_EPPI:
  126. {
  127. struct bfin_eppi_regs *reg = info->base;
  128. bfin_write32(&reg->control, ppi->ppi_control);
  129. break;
  130. }
  131. case PPI_TYPE_EPPI3:
  132. {
  133. struct bfin_eppi3_regs *reg = info->base;
  134. bfin_write32(&reg->ctl, ppi->ppi_control);
  135. break;
  136. }
  137. default:
  138. return -EINVAL;
  139. }
  140. SSYNC();
  141. return 0;
  142. }
  143. static int ppi_stop(struct ppi_if *ppi)
  144. {
  145. const struct ppi_info *info = ppi->info;
  146. /* disable PPI */
  147. ppi->ppi_control &= ~PORT_EN;
  148. switch (info->type) {
  149. case PPI_TYPE_PPI:
  150. {
  151. struct bfin_ppi_regs *reg = info->base;
  152. bfin_write16(&reg->control, ppi->ppi_control);
  153. break;
  154. }
  155. case PPI_TYPE_EPPI:
  156. {
  157. struct bfin_eppi_regs *reg = info->base;
  158. bfin_write32(&reg->control, ppi->ppi_control);
  159. break;
  160. }
  161. case PPI_TYPE_EPPI3:
  162. {
  163. struct bfin_eppi3_regs *reg = info->base;
  164. bfin_write32(&reg->ctl, ppi->ppi_control);
  165. break;
  166. }
  167. default:
  168. return -EINVAL;
  169. }
  170. /* disable DMA */
  171. clear_dma_irqstat(info->dma_ch);
  172. disable_dma(info->dma_ch);
  173. SSYNC();
  174. return 0;
  175. }
  176. static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
  177. {
  178. const struct ppi_info *info = ppi->info;
  179. int dma32 = 0;
  180. int dma_config, bytes_per_line;
  181. int hcount, hdelay, samples_per_line;
  182. #ifdef CONFIG_PINCTRL
  183. static const char * const pin_state[] = {"8bit", "16bit", "24bit"};
  184. struct pinctrl *pctrl;
  185. struct pinctrl_state *pstate;
  186. if (params->dlen > 24 || params->dlen <= 0)
  187. return -EINVAL;
  188. pctrl = devm_pinctrl_get(ppi->dev);
  189. if (IS_ERR(pctrl))
  190. return PTR_ERR(pctrl);
  191. pstate = pinctrl_lookup_state(pctrl,
  192. pin_state[(params->dlen + 7) / 8 - 1]);
  193. if (pinctrl_select_state(pctrl, pstate))
  194. return -EINVAL;
  195. #endif
  196. bytes_per_line = params->width * params->bpp / 8;
  197. /* convert parameters unit from pixels to samples */
  198. hcount = params->width * params->bpp / params->dlen;
  199. hdelay = params->hdelay * params->bpp / params->dlen;
  200. samples_per_line = params->line * params->bpp / params->dlen;
  201. if (params->int_mask == 0xFFFFFFFF)
  202. ppi->err_int = false;
  203. else
  204. ppi->err_int = true;
  205. dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y);
  206. ppi->ppi_control = params->ppi_control & ~PORT_EN;
  207. if (!(ppi->ppi_control & PORT_DIR))
  208. dma_config |= WNR;
  209. switch (info->type) {
  210. case PPI_TYPE_PPI:
  211. {
  212. struct bfin_ppi_regs *reg = info->base;
  213. if (params->ppi_control & DMA32)
  214. dma32 = 1;
  215. bfin_write16(&reg->control, ppi->ppi_control);
  216. bfin_write16(&reg->count, samples_per_line - 1);
  217. bfin_write16(&reg->frame, params->frame);
  218. break;
  219. }
  220. case PPI_TYPE_EPPI:
  221. {
  222. struct bfin_eppi_regs *reg = info->base;
  223. if ((params->ppi_control & PACK_EN)
  224. || (params->ppi_control & 0x38000) > DLEN_16)
  225. dma32 = 1;
  226. bfin_write32(&reg->control, ppi->ppi_control);
  227. bfin_write16(&reg->line, samples_per_line);
  228. bfin_write16(&reg->frame, params->frame);
  229. bfin_write16(&reg->hdelay, hdelay);
  230. bfin_write16(&reg->vdelay, params->vdelay);
  231. bfin_write16(&reg->hcount, hcount);
  232. bfin_write16(&reg->vcount, params->height);
  233. break;
  234. }
  235. case PPI_TYPE_EPPI3:
  236. {
  237. struct bfin_eppi3_regs *reg = info->base;
  238. if ((params->ppi_control & PACK_EN)
  239. || (params->ppi_control & 0x70000) > DLEN_16)
  240. dma32 = 1;
  241. bfin_write32(&reg->ctl, ppi->ppi_control);
  242. bfin_write32(&reg->line, samples_per_line);
  243. bfin_write32(&reg->frame, params->frame);
  244. bfin_write32(&reg->hdly, hdelay);
  245. bfin_write32(&reg->vdly, params->vdelay);
  246. bfin_write32(&reg->hcnt, hcount);
  247. bfin_write32(&reg->vcnt, params->height);
  248. if (params->int_mask)
  249. bfin_write32(&reg->imsk, params->int_mask & 0xFF);
  250. if (ppi->ppi_control & PORT_DIR) {
  251. u32 hsync_width, vsync_width, vsync_period;
  252. hsync_width = params->hsync
  253. * params->bpp / params->dlen;
  254. vsync_width = params->vsync * samples_per_line;
  255. vsync_period = samples_per_line * params->frame;
  256. bfin_write32(&reg->fs1_wlhb, hsync_width);
  257. bfin_write32(&reg->fs1_paspl, samples_per_line);
  258. bfin_write32(&reg->fs2_wlvb, vsync_width);
  259. bfin_write32(&reg->fs2_palpf, vsync_period);
  260. }
  261. break;
  262. }
  263. default:
  264. return -EINVAL;
  265. }
  266. if (dma32) {
  267. dma_config |= WDSIZE_32 | PSIZE_32;
  268. set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
  269. set_dma_x_modify(info->dma_ch, 4);
  270. set_dma_y_modify(info->dma_ch, 4);
  271. } else {
  272. dma_config |= WDSIZE_16 | PSIZE_16;
  273. set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
  274. set_dma_x_modify(info->dma_ch, 2);
  275. set_dma_y_modify(info->dma_ch, 2);
  276. }
  277. set_dma_y_count(info->dma_ch, params->height);
  278. set_dma_config(info->dma_ch, dma_config);
  279. SSYNC();
  280. return 0;
  281. }
  282. static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
  283. {
  284. set_dma_start_addr(ppi->info->dma_ch, addr);
  285. }
  286. struct ppi_if *ppi_create_instance(struct platform_device *pdev,
  287. const struct ppi_info *info)
  288. {
  289. struct ppi_if *ppi;
  290. if (!info || !info->pin_req)
  291. return NULL;
  292. #ifndef CONFIG_PINCTRL
  293. if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
  294. dev_err(&pdev->dev, "request peripheral failed\n");
  295. return NULL;
  296. }
  297. #endif
  298. ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
  299. if (!ppi) {
  300. peripheral_free_list(info->pin_req);
  301. dev_err(&pdev->dev, "unable to allocate memory for ppi handle\n");
  302. return NULL;
  303. }
  304. ppi->ops = &ppi_ops;
  305. ppi->info = info;
  306. ppi->dev = &pdev->dev;
  307. pr_info("ppi probe success\n");
  308. return ppi;
  309. }
  310. EXPORT_SYMBOL(ppi_create_instance);
  311. void ppi_delete_instance(struct ppi_if *ppi)
  312. {
  313. peripheral_free_list(ppi->info->pin_req);
  314. kfree(ppi);
  315. }
  316. EXPORT_SYMBOL(ppi_delete_instance);
  317. MODULE_DESCRIPTION("Analog Devices PPI driver");
  318. MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
  319. MODULE_LICENSE("GPL v2");