vpbe_venc.c 18 KB

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  1. /*
  2. * Copyright (C) 2010 Texas Instruments Inc
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License as published by
  6. * the Free Software Foundation version 2.
  7. *
  8. * This program is distributed in the hope that it will be useful,
  9. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. * GNU General Public License for more details.
  12. *
  13. * You should have received a copy of the GNU General Public License
  14. * along with this program; if not, write to the Free Software
  15. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/init.h>
  20. #include <linux/ctype.h>
  21. #include <linux/delay.h>
  22. #include <linux/device.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <mach/mux.h>
  29. #include <linux/platform_data/i2c-davinci.h>
  30. #include <linux/io.h>
  31. #include <media/davinci/vpbe_types.h>
  32. #include <media/davinci/vpbe_venc.h>
  33. #include <media/davinci/vpss.h>
  34. #include <media/v4l2-device.h>
  35. #include "vpbe_venc_regs.h"
  36. #define MODULE_NAME "davinci-vpbe-venc"
  37. static struct platform_device_id vpbe_venc_devtype[] = {
  38. {
  39. .name = DM644X_VPBE_VENC_SUBDEV_NAME,
  40. .driver_data = VPBE_VERSION_1,
  41. }, {
  42. .name = DM365_VPBE_VENC_SUBDEV_NAME,
  43. .driver_data = VPBE_VERSION_2,
  44. }, {
  45. .name = DM355_VPBE_VENC_SUBDEV_NAME,
  46. .driver_data = VPBE_VERSION_3,
  47. },
  48. {
  49. /* sentinel */
  50. }
  51. };
  52. MODULE_DEVICE_TABLE(platform, vpbe_venc_devtype);
  53. static int debug = 2;
  54. module_param(debug, int, 0644);
  55. MODULE_PARM_DESC(debug, "Debug level 0-2");
  56. struct venc_state {
  57. struct v4l2_subdev sd;
  58. struct venc_callback *callback;
  59. struct venc_platform_data *pdata;
  60. struct device *pdev;
  61. u32 output;
  62. v4l2_std_id std;
  63. spinlock_t lock;
  64. void __iomem *venc_base;
  65. void __iomem *vdaccfg_reg;
  66. enum vpbe_version venc_type;
  67. };
  68. static inline struct venc_state *to_state(struct v4l2_subdev *sd)
  69. {
  70. return container_of(sd, struct venc_state, sd);
  71. }
  72. static inline u32 venc_read(struct v4l2_subdev *sd, u32 offset)
  73. {
  74. struct venc_state *venc = to_state(sd);
  75. return readl(venc->venc_base + offset);
  76. }
  77. static inline u32 venc_write(struct v4l2_subdev *sd, u32 offset, u32 val)
  78. {
  79. struct venc_state *venc = to_state(sd);
  80. writel(val, (venc->venc_base + offset));
  81. return val;
  82. }
  83. static inline u32 venc_modify(struct v4l2_subdev *sd, u32 offset,
  84. u32 val, u32 mask)
  85. {
  86. u32 new_val = (venc_read(sd, offset) & ~mask) | (val & mask);
  87. venc_write(sd, offset, new_val);
  88. return new_val;
  89. }
  90. static inline u32 vdaccfg_write(struct v4l2_subdev *sd, u32 val)
  91. {
  92. struct venc_state *venc = to_state(sd);
  93. writel(val, venc->vdaccfg_reg);
  94. val = readl(venc->vdaccfg_reg);
  95. return val;
  96. }
  97. #define VDAC_COMPONENT 0x543
  98. #define VDAC_S_VIDEO 0x210
  99. /* This function sets the dac of the VPBE for various outputs
  100. */
  101. static int venc_set_dac(struct v4l2_subdev *sd, u32 out_index)
  102. {
  103. switch (out_index) {
  104. case 0:
  105. v4l2_dbg(debug, 1, sd, "Setting output to Composite\n");
  106. venc_write(sd, VENC_DACSEL, 0);
  107. break;
  108. case 1:
  109. v4l2_dbg(debug, 1, sd, "Setting output to Component\n");
  110. venc_write(sd, VENC_DACSEL, VDAC_COMPONENT);
  111. break;
  112. case 2:
  113. v4l2_dbg(debug, 1, sd, "Setting output to S-video\n");
  114. venc_write(sd, VENC_DACSEL, VDAC_S_VIDEO);
  115. break;
  116. default:
  117. return -EINVAL;
  118. }
  119. return 0;
  120. }
  121. static void venc_enabledigitaloutput(struct v4l2_subdev *sd, int benable)
  122. {
  123. struct venc_state *venc = to_state(sd);
  124. v4l2_dbg(debug, 2, sd, "venc_enabledigitaloutput\n");
  125. if (benable) {
  126. venc_write(sd, VENC_VMOD, 0);
  127. venc_write(sd, VENC_CVBS, 0);
  128. venc_write(sd, VENC_LCDOUT, 0);
  129. venc_write(sd, VENC_HSPLS, 0);
  130. venc_write(sd, VENC_HSTART, 0);
  131. venc_write(sd, VENC_HVALID, 0);
  132. venc_write(sd, VENC_HINT, 0);
  133. venc_write(sd, VENC_VSPLS, 0);
  134. venc_write(sd, VENC_VSTART, 0);
  135. venc_write(sd, VENC_VVALID, 0);
  136. venc_write(sd, VENC_VINT, 0);
  137. venc_write(sd, VENC_YCCCTL, 0);
  138. venc_write(sd, VENC_DACSEL, 0);
  139. } else {
  140. venc_write(sd, VENC_VMOD, 0);
  141. /* disable VCLK output pin enable */
  142. venc_write(sd, VENC_VIDCTL, 0x141);
  143. /* Disable output sync pins */
  144. venc_write(sd, VENC_SYNCCTL, 0);
  145. /* Disable DCLOCK */
  146. venc_write(sd, VENC_DCLKCTL, 0);
  147. venc_write(sd, VENC_DRGBX1, 0x0000057C);
  148. /* Disable LCD output control (accepting default polarity) */
  149. venc_write(sd, VENC_LCDOUT, 0);
  150. if (venc->venc_type != VPBE_VERSION_3)
  151. venc_write(sd, VENC_CMPNT, 0x100);
  152. venc_write(sd, VENC_HSPLS, 0);
  153. venc_write(sd, VENC_HINT, 0);
  154. venc_write(sd, VENC_HSTART, 0);
  155. venc_write(sd, VENC_HVALID, 0);
  156. venc_write(sd, VENC_VSPLS, 0);
  157. venc_write(sd, VENC_VINT, 0);
  158. venc_write(sd, VENC_VSTART, 0);
  159. venc_write(sd, VENC_VVALID, 0);
  160. venc_write(sd, VENC_HSDLY, 0);
  161. venc_write(sd, VENC_VSDLY, 0);
  162. venc_write(sd, VENC_YCCCTL, 0);
  163. venc_write(sd, VENC_VSTARTA, 0);
  164. /* Set OSD clock and OSD Sync Adavance registers */
  165. venc_write(sd, VENC_OSDCLK0, 1);
  166. venc_write(sd, VENC_OSDCLK1, 2);
  167. }
  168. }
  169. static void
  170. venc_enable_vpss_clock(int venc_type,
  171. enum vpbe_enc_timings_type type,
  172. unsigned int pclock)
  173. {
  174. if (venc_type == VPBE_VERSION_1)
  175. return;
  176. if (venc_type == VPBE_VERSION_2 && (type == VPBE_ENC_STD || (type ==
  177. VPBE_ENC_DV_TIMINGS && pclock <= 27000000))) {
  178. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  179. vpss_enable_clock(VPSS_VPBE_CLOCK, 1);
  180. return;
  181. }
  182. if (venc_type == VPBE_VERSION_3 && type == VPBE_ENC_STD)
  183. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 0);
  184. }
  185. #define VDAC_CONFIG_SD_V3 0x0E21A6B6
  186. #define VDAC_CONFIG_SD_V2 0x081141CF
  187. /*
  188. * setting NTSC mode
  189. */
  190. static int venc_set_ntsc(struct v4l2_subdev *sd)
  191. {
  192. u32 val;
  193. struct venc_state *venc = to_state(sd);
  194. struct venc_platform_data *pdata = venc->pdata;
  195. v4l2_dbg(debug, 2, sd, "venc_set_ntsc\n");
  196. /* Setup clock at VPSS & VENC for SD */
  197. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  198. if (pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_525_60) < 0)
  199. return -EINVAL;
  200. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_525_60);
  201. venc_enabledigitaloutput(sd, 0);
  202. if (venc->venc_type == VPBE_VERSION_3) {
  203. venc_write(sd, VENC_CLKCTL, 0x01);
  204. venc_write(sd, VENC_VIDCTL, 0);
  205. val = vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  206. } else if (venc->venc_type == VPBE_VERSION_2) {
  207. venc_write(sd, VENC_CLKCTL, 0x01);
  208. venc_write(sd, VENC_VIDCTL, 0);
  209. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  210. } else {
  211. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  212. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  213. /* Set REC656 Mode */
  214. venc_write(sd, VENC_YCCCTL, 0x1);
  215. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAFRQ);
  216. venc_modify(sd, VENC_VDPRO, 0, VENC_VDPRO_DAUPS);
  217. }
  218. venc_write(sd, VENC_VMOD, 0);
  219. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  220. VENC_VMOD_VIE);
  221. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  222. venc_modify(sd, VENC_VMOD, (0 << VENC_VMOD_TVTYP_SHIFT),
  223. VENC_VMOD_TVTYP);
  224. venc_write(sd, VENC_DACTST, 0x0);
  225. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  226. return 0;
  227. }
  228. /*
  229. * setting PAL mode
  230. */
  231. static int venc_set_pal(struct v4l2_subdev *sd)
  232. {
  233. struct venc_state *venc = to_state(sd);
  234. v4l2_dbg(debug, 2, sd, "venc_set_pal\n");
  235. /* Setup clock at VPSS & VENC for SD */
  236. vpss_enable_clock(VPSS_VENC_CLOCK_SEL, 1);
  237. if (venc->pdata->setup_clock(VPBE_ENC_STD, V4L2_STD_625_50) < 0)
  238. return -EINVAL;
  239. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_STD, V4L2_STD_625_50);
  240. venc_enabledigitaloutput(sd, 0);
  241. if (venc->venc_type == VPBE_VERSION_3) {
  242. venc_write(sd, VENC_CLKCTL, 0x1);
  243. venc_write(sd, VENC_VIDCTL, 0);
  244. vdaccfg_write(sd, VDAC_CONFIG_SD_V3);
  245. } else if (venc->venc_type == VPBE_VERSION_2) {
  246. venc_write(sd, VENC_CLKCTL, 0x1);
  247. venc_write(sd, VENC_VIDCTL, 0);
  248. vdaccfg_write(sd, VDAC_CONFIG_SD_V2);
  249. } else {
  250. /* to set VENC CLK DIV to 1 - final clock is 54 MHz */
  251. venc_modify(sd, VENC_VIDCTL, 0, 1 << 1);
  252. /* Set REC656 Mode */
  253. venc_write(sd, VENC_YCCCTL, 0x1);
  254. }
  255. venc_modify(sd, VENC_SYNCCTL, 1 << VENC_SYNCCTL_OVD_SHIFT,
  256. VENC_SYNCCTL_OVD);
  257. venc_write(sd, VENC_VMOD, 0);
  258. venc_modify(sd, VENC_VMOD,
  259. (1 << VENC_VMOD_VIE_SHIFT),
  260. VENC_VMOD_VIE);
  261. venc_modify(sd, VENC_VMOD,
  262. (0 << VENC_VMOD_VMD), VENC_VMOD_VMD);
  263. venc_modify(sd, VENC_VMOD,
  264. (1 << VENC_VMOD_TVTYP_SHIFT),
  265. VENC_VMOD_TVTYP);
  266. venc_write(sd, VENC_DACTST, 0x0);
  267. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  268. return 0;
  269. }
  270. #define VDAC_CONFIG_HD_V2 0x081141EF
  271. /*
  272. * venc_set_480p59_94
  273. *
  274. * This function configures the video encoder to EDTV(525p) component setting.
  275. */
  276. static int venc_set_480p59_94(struct v4l2_subdev *sd)
  277. {
  278. struct venc_state *venc = to_state(sd);
  279. struct venc_platform_data *pdata = venc->pdata;
  280. v4l2_dbg(debug, 2, sd, "venc_set_480p59_94\n");
  281. if (venc->venc_type != VPBE_VERSION_1 &&
  282. venc->venc_type != VPBE_VERSION_2)
  283. return -EINVAL;
  284. /* Setup clock at VPSS & VENC for SD */
  285. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
  286. return -EINVAL;
  287. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
  288. venc_enabledigitaloutput(sd, 0);
  289. if (venc->venc_type == VPBE_VERSION_2)
  290. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  291. venc_write(sd, VENC_OSDCLK0, 0);
  292. venc_write(sd, VENC_OSDCLK1, 1);
  293. if (venc->venc_type == VPBE_VERSION_1) {
  294. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  295. VENC_VDPRO_DAFRQ);
  296. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  297. VENC_VDPRO_DAUPS);
  298. }
  299. venc_write(sd, VENC_VMOD, 0);
  300. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  301. VENC_VMOD_VIE);
  302. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  303. venc_modify(sd, VENC_VMOD, (HDTV_525P << VENC_VMOD_TVTYP_SHIFT),
  304. VENC_VMOD_TVTYP);
  305. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  306. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  307. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  308. return 0;
  309. }
  310. /*
  311. * venc_set_625p
  312. *
  313. * This function configures the video encoder to HDTV(625p) component setting
  314. */
  315. static int venc_set_576p50(struct v4l2_subdev *sd)
  316. {
  317. struct venc_state *venc = to_state(sd);
  318. struct venc_platform_data *pdata = venc->pdata;
  319. v4l2_dbg(debug, 2, sd, "venc_set_576p50\n");
  320. if (venc->venc_type != VPBE_VERSION_1 &&
  321. venc->venc_type != VPBE_VERSION_2)
  322. return -EINVAL;
  323. /* Setup clock at VPSS & VENC for SD */
  324. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 27000000) < 0)
  325. return -EINVAL;
  326. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 27000000);
  327. venc_enabledigitaloutput(sd, 0);
  328. if (venc->venc_type == VPBE_VERSION_2)
  329. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  330. venc_write(sd, VENC_OSDCLK0, 0);
  331. venc_write(sd, VENC_OSDCLK1, 1);
  332. if (venc->venc_type == VPBE_VERSION_1) {
  333. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAFRQ,
  334. VENC_VDPRO_DAFRQ);
  335. venc_modify(sd, VENC_VDPRO, VENC_VDPRO_DAUPS,
  336. VENC_VDPRO_DAUPS);
  337. }
  338. venc_write(sd, VENC_VMOD, 0);
  339. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  340. VENC_VMOD_VIE);
  341. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  342. venc_modify(sd, VENC_VMOD, (HDTV_625P << VENC_VMOD_TVTYP_SHIFT),
  343. VENC_VMOD_TVTYP);
  344. venc_modify(sd, VENC_VMOD, VENC_VMOD_VDMD_YCBCR8 <<
  345. VENC_VMOD_VDMD_SHIFT, VENC_VMOD_VDMD);
  346. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  347. return 0;
  348. }
  349. /*
  350. * venc_set_720p60_internal - Setup 720p60 in venc for dm365 only
  351. */
  352. static int venc_set_720p60_internal(struct v4l2_subdev *sd)
  353. {
  354. struct venc_state *venc = to_state(sd);
  355. struct venc_platform_data *pdata = venc->pdata;
  356. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
  357. return -EINVAL;
  358. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
  359. venc_enabledigitaloutput(sd, 0);
  360. venc_write(sd, VENC_OSDCLK0, 0);
  361. venc_write(sd, VENC_OSDCLK1, 1);
  362. venc_write(sd, VENC_VMOD, 0);
  363. /* DM365 component HD mode */
  364. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  365. VENC_VMOD_VIE);
  366. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  367. venc_modify(sd, VENC_VMOD, (HDTV_720P << VENC_VMOD_TVTYP_SHIFT),
  368. VENC_VMOD_TVTYP);
  369. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  370. venc_write(sd, VENC_XHINTVL, 0);
  371. return 0;
  372. }
  373. /*
  374. * venc_set_1080i30_internal - Setup 1080i30 in venc for dm365 only
  375. */
  376. static int venc_set_1080i30_internal(struct v4l2_subdev *sd)
  377. {
  378. struct venc_state *venc = to_state(sd);
  379. struct venc_platform_data *pdata = venc->pdata;
  380. if (pdata->setup_clock(VPBE_ENC_DV_TIMINGS, 74250000) < 0)
  381. return -EINVAL;
  382. venc_enable_vpss_clock(venc->venc_type, VPBE_ENC_DV_TIMINGS, 74250000);
  383. venc_enabledigitaloutput(sd, 0);
  384. venc_write(sd, VENC_OSDCLK0, 0);
  385. venc_write(sd, VENC_OSDCLK1, 1);
  386. venc_write(sd, VENC_VMOD, 0);
  387. /* DM365 component HD mode */
  388. venc_modify(sd, VENC_VMOD, (1 << VENC_VMOD_VIE_SHIFT),
  389. VENC_VMOD_VIE);
  390. venc_modify(sd, VENC_VMOD, VENC_VMOD_HDMD, VENC_VMOD_HDMD);
  391. venc_modify(sd, VENC_VMOD, (HDTV_1080I << VENC_VMOD_TVTYP_SHIFT),
  392. VENC_VMOD_TVTYP);
  393. venc_modify(sd, VENC_VMOD, VENC_VMOD_VENC, VENC_VMOD_VENC);
  394. venc_write(sd, VENC_XHINTVL, 0);
  395. return 0;
  396. }
  397. static int venc_s_std_output(struct v4l2_subdev *sd, v4l2_std_id norm)
  398. {
  399. v4l2_dbg(debug, 1, sd, "venc_s_std_output\n");
  400. if (norm & V4L2_STD_525_60)
  401. return venc_set_ntsc(sd);
  402. else if (norm & V4L2_STD_625_50)
  403. return venc_set_pal(sd);
  404. return -EINVAL;
  405. }
  406. static int venc_s_dv_timings(struct v4l2_subdev *sd,
  407. struct v4l2_dv_timings *dv_timings)
  408. {
  409. struct venc_state *venc = to_state(sd);
  410. u32 height = dv_timings->bt.height;
  411. int ret;
  412. v4l2_dbg(debug, 1, sd, "venc_s_dv_timings\n");
  413. if (height == 576)
  414. return venc_set_576p50(sd);
  415. else if (height == 480)
  416. return venc_set_480p59_94(sd);
  417. else if ((height == 720) &&
  418. (venc->venc_type == VPBE_VERSION_2)) {
  419. /* TBD setup internal 720p mode here */
  420. ret = venc_set_720p60_internal(sd);
  421. /* for DM365 VPBE, there is DAC inside */
  422. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  423. return ret;
  424. } else if ((height == 1080) &&
  425. (venc->venc_type == VPBE_VERSION_2)) {
  426. /* TBD setup internal 1080i mode here */
  427. ret = venc_set_1080i30_internal(sd);
  428. /* for DM365 VPBE, there is DAC inside */
  429. vdaccfg_write(sd, VDAC_CONFIG_HD_V2);
  430. return ret;
  431. }
  432. return -EINVAL;
  433. }
  434. static int venc_s_routing(struct v4l2_subdev *sd, u32 input, u32 output,
  435. u32 config)
  436. {
  437. struct venc_state *venc = to_state(sd);
  438. int ret;
  439. v4l2_dbg(debug, 1, sd, "venc_s_routing\n");
  440. ret = venc_set_dac(sd, output);
  441. if (!ret)
  442. venc->output = output;
  443. return ret;
  444. }
  445. static long venc_ioctl(struct v4l2_subdev *sd,
  446. unsigned int cmd,
  447. void *arg)
  448. {
  449. u32 val;
  450. switch (cmd) {
  451. case VENC_GET_FLD:
  452. val = venc_read(sd, VENC_VSTAT);
  453. *((int *)arg) = ((val & VENC_VSTAT_FIDST) ==
  454. VENC_VSTAT_FIDST);
  455. break;
  456. default:
  457. v4l2_err(sd, "Wrong IOCTL cmd\n");
  458. break;
  459. }
  460. return 0;
  461. }
  462. static const struct v4l2_subdev_core_ops venc_core_ops = {
  463. .ioctl = venc_ioctl,
  464. };
  465. static const struct v4l2_subdev_video_ops venc_video_ops = {
  466. .s_routing = venc_s_routing,
  467. .s_std_output = venc_s_std_output,
  468. .s_dv_timings = venc_s_dv_timings,
  469. };
  470. static const struct v4l2_subdev_ops venc_ops = {
  471. .core = &venc_core_ops,
  472. .video = &venc_video_ops,
  473. };
  474. static int venc_initialize(struct v4l2_subdev *sd)
  475. {
  476. struct venc_state *venc = to_state(sd);
  477. int ret;
  478. /* Set default to output to composite and std to NTSC */
  479. venc->output = 0;
  480. venc->std = V4L2_STD_525_60;
  481. ret = venc_s_routing(sd, 0, venc->output, 0);
  482. if (ret < 0) {
  483. v4l2_err(sd, "Error setting output during init\n");
  484. return -EINVAL;
  485. }
  486. ret = venc_s_std_output(sd, venc->std);
  487. if (ret < 0) {
  488. v4l2_err(sd, "Error setting std during init\n");
  489. return -EINVAL;
  490. }
  491. return ret;
  492. }
  493. static int venc_device_get(struct device *dev, void *data)
  494. {
  495. struct platform_device *pdev = to_platform_device(dev);
  496. struct venc_state **venc = data;
  497. if (strstr(pdev->name, "vpbe-venc") != NULL)
  498. *venc = platform_get_drvdata(pdev);
  499. return 0;
  500. }
  501. struct v4l2_subdev *venc_sub_dev_init(struct v4l2_device *v4l2_dev,
  502. const char *venc_name)
  503. {
  504. struct venc_state *venc;
  505. int err;
  506. err = bus_for_each_dev(&platform_bus_type, NULL, &venc,
  507. venc_device_get);
  508. if (venc == NULL)
  509. return NULL;
  510. v4l2_subdev_init(&venc->sd, &venc_ops);
  511. strcpy(venc->sd.name, venc_name);
  512. if (v4l2_device_register_subdev(v4l2_dev, &venc->sd) < 0) {
  513. v4l2_err(v4l2_dev,
  514. "vpbe unable to register venc sub device\n");
  515. return NULL;
  516. }
  517. if (venc_initialize(&venc->sd)) {
  518. v4l2_err(v4l2_dev,
  519. "vpbe venc initialization failed\n");
  520. return NULL;
  521. }
  522. return &venc->sd;
  523. }
  524. EXPORT_SYMBOL(venc_sub_dev_init);
  525. static int venc_probe(struct platform_device *pdev)
  526. {
  527. const struct platform_device_id *pdev_id;
  528. struct venc_state *venc;
  529. struct resource *res;
  530. if (!pdev->dev.platform_data) {
  531. dev_err(&pdev->dev, "No platform data for VENC sub device");
  532. return -EINVAL;
  533. }
  534. pdev_id = platform_get_device_id(pdev);
  535. if (!pdev_id)
  536. return -EINVAL;
  537. venc = devm_kzalloc(&pdev->dev, sizeof(struct venc_state), GFP_KERNEL);
  538. if (venc == NULL)
  539. return -ENOMEM;
  540. venc->venc_type = pdev_id->driver_data;
  541. venc->pdev = &pdev->dev;
  542. venc->pdata = pdev->dev.platform_data;
  543. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  544. venc->venc_base = devm_ioremap_resource(&pdev->dev, res);
  545. if (IS_ERR(venc->venc_base))
  546. return PTR_ERR(venc->venc_base);
  547. if (venc->venc_type != VPBE_VERSION_1) {
  548. res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  549. venc->vdaccfg_reg = devm_ioremap_resource(&pdev->dev, res);
  550. if (IS_ERR(venc->vdaccfg_reg))
  551. return PTR_ERR(venc->vdaccfg_reg);
  552. }
  553. spin_lock_init(&venc->lock);
  554. platform_set_drvdata(pdev, venc);
  555. dev_notice(venc->pdev, "VENC sub device probe success\n");
  556. return 0;
  557. }
  558. static int venc_remove(struct platform_device *pdev)
  559. {
  560. return 0;
  561. }
  562. static struct platform_driver venc_driver = {
  563. .probe = venc_probe,
  564. .remove = venc_remove,
  565. .driver = {
  566. .name = MODULE_NAME,
  567. },
  568. .id_table = vpbe_venc_devtype
  569. };
  570. module_platform_driver(venc_driver);
  571. MODULE_LICENSE("GPL");
  572. MODULE_DESCRIPTION("VPBE VENC Driver");
  573. MODULE_AUTHOR("Texas Instruments");