fimc-capture.c 50 KB

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  1. /*
  2. * Samsung S5P/EXYNOS4 SoC series camera interface (camera capture) driver
  3. *
  4. * Copyright (C) 2010 - 2012 Samsung Electronics Co., Ltd.
  5. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/types.h>
  14. #include <linux/errno.h>
  15. #include <linux/bug.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/list.h>
  20. #include <linux/slab.h>
  21. #include <linux/videodev2.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/v4l2-mem2mem.h>
  25. #include <media/videobuf2-v4l2.h>
  26. #include <media/videobuf2-dma-contig.h>
  27. #include "common.h"
  28. #include "fimc-core.h"
  29. #include "fimc-reg.h"
  30. #include "media-dev.h"
  31. static int fimc_capture_hw_init(struct fimc_dev *fimc)
  32. {
  33. struct fimc_source_info *si = &fimc->vid_cap.source_config;
  34. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  35. int ret;
  36. unsigned long flags;
  37. if (ctx == NULL || ctx->s_frame.fmt == NULL)
  38. return -EINVAL;
  39. if (si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) {
  40. ret = fimc_hw_camblk_cfg_writeback(fimc);
  41. if (ret < 0)
  42. return ret;
  43. }
  44. spin_lock_irqsave(&fimc->slock, flags);
  45. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  46. fimc_set_yuv_order(ctx);
  47. fimc_hw_set_camera_polarity(fimc, si);
  48. fimc_hw_set_camera_type(fimc, si);
  49. fimc_hw_set_camera_source(fimc, si);
  50. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  51. ret = fimc_set_scaler_info(ctx);
  52. if (!ret) {
  53. fimc_hw_set_input_path(ctx);
  54. fimc_hw_set_prescaler(ctx);
  55. fimc_hw_set_mainscaler(ctx);
  56. fimc_hw_set_target_format(ctx);
  57. fimc_hw_set_rotation(ctx);
  58. fimc_hw_set_effect(ctx);
  59. fimc_hw_set_output_path(ctx);
  60. fimc_hw_set_out_dma(ctx);
  61. if (fimc->drv_data->alpha_color)
  62. fimc_hw_set_rgb_alpha(ctx);
  63. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  64. }
  65. spin_unlock_irqrestore(&fimc->slock, flags);
  66. return ret;
  67. }
  68. /*
  69. * Reinitialize the driver so it is ready to start the streaming again.
  70. * Set fimc->state to indicate stream off and the hardware shut down state.
  71. * If not suspending (@suspend is false), return any buffers to videobuf2.
  72. * Otherwise put any owned buffers onto the pending buffers queue, so they
  73. * can be re-spun when the device is being resumed. Also perform FIMC
  74. * software reset and disable streaming on the whole pipeline if required.
  75. */
  76. static int fimc_capture_state_cleanup(struct fimc_dev *fimc, bool suspend)
  77. {
  78. struct fimc_vid_cap *cap = &fimc->vid_cap;
  79. struct fimc_vid_buffer *buf;
  80. unsigned long flags;
  81. bool streaming;
  82. spin_lock_irqsave(&fimc->slock, flags);
  83. streaming = fimc->state & (1 << ST_CAPT_ISP_STREAM);
  84. fimc->state &= ~(1 << ST_CAPT_RUN | 1 << ST_CAPT_SHUT |
  85. 1 << ST_CAPT_STREAM | 1 << ST_CAPT_ISP_STREAM);
  86. if (suspend)
  87. fimc->state |= (1 << ST_CAPT_SUSPENDED);
  88. else
  89. fimc->state &= ~(1 << ST_CAPT_PEND | 1 << ST_CAPT_SUSPENDED);
  90. /* Release unused buffers */
  91. while (!suspend && !list_empty(&cap->pending_buf_q)) {
  92. buf = fimc_pending_queue_pop(cap);
  93. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  94. }
  95. /* If suspending put unused buffers onto pending queue */
  96. while (!list_empty(&cap->active_buf_q)) {
  97. buf = fimc_active_queue_pop(cap);
  98. if (suspend)
  99. fimc_pending_queue_add(cap, buf);
  100. else
  101. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  102. }
  103. fimc_hw_reset(fimc);
  104. cap->buf_index = 0;
  105. spin_unlock_irqrestore(&fimc->slock, flags);
  106. if (streaming)
  107. return fimc_pipeline_call(&cap->ve, set_stream, 0);
  108. else
  109. return 0;
  110. }
  111. static int fimc_stop_capture(struct fimc_dev *fimc, bool suspend)
  112. {
  113. unsigned long flags;
  114. if (!fimc_capture_active(fimc))
  115. return 0;
  116. spin_lock_irqsave(&fimc->slock, flags);
  117. set_bit(ST_CAPT_SHUT, &fimc->state);
  118. fimc_deactivate_capture(fimc);
  119. spin_unlock_irqrestore(&fimc->slock, flags);
  120. wait_event_timeout(fimc->irq_queue,
  121. !test_bit(ST_CAPT_SHUT, &fimc->state),
  122. (2*HZ/10)); /* 200 ms */
  123. return fimc_capture_state_cleanup(fimc, suspend);
  124. }
  125. /**
  126. * fimc_capture_config_update - apply the camera interface configuration
  127. *
  128. * To be called from within the interrupt handler with fimc.slock
  129. * spinlock held. It updates the camera pixel crop, rotation and
  130. * image flip in H/W.
  131. */
  132. static int fimc_capture_config_update(struct fimc_ctx *ctx)
  133. {
  134. struct fimc_dev *fimc = ctx->fimc_dev;
  135. int ret;
  136. fimc_hw_set_camera_offset(fimc, &ctx->s_frame);
  137. ret = fimc_set_scaler_info(ctx);
  138. if (ret)
  139. return ret;
  140. fimc_hw_set_prescaler(ctx);
  141. fimc_hw_set_mainscaler(ctx);
  142. fimc_hw_set_target_format(ctx);
  143. fimc_hw_set_rotation(ctx);
  144. fimc_hw_set_effect(ctx);
  145. fimc_prepare_dma_offset(ctx, &ctx->d_frame);
  146. fimc_hw_set_out_dma(ctx);
  147. if (fimc->drv_data->alpha_color)
  148. fimc_hw_set_rgb_alpha(ctx);
  149. clear_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  150. return ret;
  151. }
  152. void fimc_capture_irq_handler(struct fimc_dev *fimc, int deq_buf)
  153. {
  154. struct fimc_vid_cap *cap = &fimc->vid_cap;
  155. struct fimc_pipeline *p = to_fimc_pipeline(cap->ve.pipe);
  156. struct v4l2_subdev *csis = p->subdevs[IDX_CSIS];
  157. struct fimc_frame *f = &cap->ctx->d_frame;
  158. struct fimc_vid_buffer *v_buf;
  159. if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
  160. wake_up(&fimc->irq_queue);
  161. goto done;
  162. }
  163. if (!list_empty(&cap->active_buf_q) &&
  164. test_bit(ST_CAPT_RUN, &fimc->state) && deq_buf) {
  165. v_buf = fimc_active_queue_pop(cap);
  166. v4l2_get_timestamp(&v_buf->vb.timestamp);
  167. v_buf->vb.sequence = cap->frame_count++;
  168. vb2_buffer_done(&v_buf->vb.vb2_buf, VB2_BUF_STATE_DONE);
  169. }
  170. if (!list_empty(&cap->pending_buf_q)) {
  171. v_buf = fimc_pending_queue_pop(cap);
  172. fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
  173. v_buf->index = cap->buf_index;
  174. /* Move the buffer to the capture active queue */
  175. fimc_active_queue_add(cap, v_buf);
  176. dbg("next frame: %d, done frame: %d",
  177. fimc_hw_get_frame_index(fimc), v_buf->index);
  178. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  179. cap->buf_index = 0;
  180. }
  181. /*
  182. * Set up a buffer at MIPI-CSIS if current image format
  183. * requires the frame embedded data capture.
  184. */
  185. if (f->fmt->mdataplanes && !list_empty(&cap->active_buf_q)) {
  186. unsigned int plane = ffs(f->fmt->mdataplanes) - 1;
  187. unsigned int size = f->payload[plane];
  188. s32 index = fimc_hw_get_frame_index(fimc);
  189. void *vaddr;
  190. list_for_each_entry(v_buf, &cap->active_buf_q, list) {
  191. if (v_buf->index != index)
  192. continue;
  193. vaddr = vb2_plane_vaddr(&v_buf->vb.vb2_buf, plane);
  194. v4l2_subdev_call(csis, video, s_rx_buffer,
  195. vaddr, &size);
  196. break;
  197. }
  198. }
  199. if (cap->active_buf_cnt == 0) {
  200. if (deq_buf)
  201. clear_bit(ST_CAPT_RUN, &fimc->state);
  202. if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
  203. cap->buf_index = 0;
  204. } else {
  205. set_bit(ST_CAPT_RUN, &fimc->state);
  206. }
  207. if (test_bit(ST_CAPT_APPLY_CFG, &fimc->state))
  208. fimc_capture_config_update(cap->ctx);
  209. done:
  210. if (cap->active_buf_cnt == 1) {
  211. fimc_deactivate_capture(fimc);
  212. clear_bit(ST_CAPT_STREAM, &fimc->state);
  213. }
  214. dbg("frame: %d, active_buf_cnt: %d",
  215. fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
  216. }
  217. static int start_streaming(struct vb2_queue *q, unsigned int count)
  218. {
  219. struct fimc_ctx *ctx = q->drv_priv;
  220. struct fimc_dev *fimc = ctx->fimc_dev;
  221. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  222. int min_bufs;
  223. int ret;
  224. vid_cap->frame_count = 0;
  225. ret = fimc_capture_hw_init(fimc);
  226. if (ret) {
  227. fimc_capture_state_cleanup(fimc, false);
  228. return ret;
  229. }
  230. set_bit(ST_CAPT_PEND, &fimc->state);
  231. min_bufs = fimc->vid_cap.reqbufs_count > 1 ? 2 : 1;
  232. if (vid_cap->active_buf_cnt >= min_bufs &&
  233. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  234. fimc_activate_capture(ctx);
  235. if (!test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  236. return fimc_pipeline_call(&vid_cap->ve, set_stream, 1);
  237. }
  238. return 0;
  239. }
  240. static void stop_streaming(struct vb2_queue *q)
  241. {
  242. struct fimc_ctx *ctx = q->drv_priv;
  243. struct fimc_dev *fimc = ctx->fimc_dev;
  244. if (!fimc_capture_active(fimc))
  245. return;
  246. fimc_stop_capture(fimc, false);
  247. }
  248. int fimc_capture_suspend(struct fimc_dev *fimc)
  249. {
  250. bool suspend = fimc_capture_busy(fimc);
  251. int ret = fimc_stop_capture(fimc, suspend);
  252. if (ret)
  253. return ret;
  254. return fimc_pipeline_call(&fimc->vid_cap.ve, close);
  255. }
  256. static void buffer_queue(struct vb2_buffer *vb);
  257. int fimc_capture_resume(struct fimc_dev *fimc)
  258. {
  259. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  260. struct exynos_video_entity *ve = &vid_cap->ve;
  261. struct fimc_vid_buffer *buf;
  262. int i;
  263. if (!test_and_clear_bit(ST_CAPT_SUSPENDED, &fimc->state))
  264. return 0;
  265. INIT_LIST_HEAD(&fimc->vid_cap.active_buf_q);
  266. vid_cap->buf_index = 0;
  267. fimc_pipeline_call(ve, open, &ve->vdev.entity, false);
  268. fimc_capture_hw_init(fimc);
  269. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  270. for (i = 0; i < vid_cap->reqbufs_count; i++) {
  271. if (list_empty(&vid_cap->pending_buf_q))
  272. break;
  273. buf = fimc_pending_queue_pop(vid_cap);
  274. buffer_queue(&buf->vb.vb2_buf);
  275. }
  276. return 0;
  277. }
  278. static int queue_setup(struct vb2_queue *vq, const void *parg,
  279. unsigned int *num_buffers, unsigned int *num_planes,
  280. unsigned int sizes[], void *allocators[])
  281. {
  282. const struct v4l2_format *pfmt = parg;
  283. const struct v4l2_pix_format_mplane *pixm = NULL;
  284. struct fimc_ctx *ctx = vq->drv_priv;
  285. struct fimc_frame *frame = &ctx->d_frame;
  286. struct fimc_fmt *fmt = frame->fmt;
  287. unsigned long wh;
  288. int i;
  289. if (pfmt) {
  290. pixm = &pfmt->fmt.pix_mp;
  291. fmt = fimc_find_format(&pixm->pixelformat, NULL,
  292. FMT_FLAGS_CAM | FMT_FLAGS_M2M, -1);
  293. wh = pixm->width * pixm->height;
  294. } else {
  295. wh = frame->f_width * frame->f_height;
  296. }
  297. if (fmt == NULL)
  298. return -EINVAL;
  299. *num_planes = fmt->memplanes;
  300. for (i = 0; i < fmt->memplanes; i++) {
  301. unsigned int size = (wh * fmt->depth[i]) / 8;
  302. if (pixm)
  303. sizes[i] = max(size, pixm->plane_fmt[i].sizeimage);
  304. else if (fimc_fmt_is_user_defined(fmt->color))
  305. sizes[i] = frame->payload[i];
  306. else
  307. sizes[i] = max_t(u32, size, frame->payload[i]);
  308. allocators[i] = ctx->fimc_dev->alloc_ctx;
  309. }
  310. return 0;
  311. }
  312. static int buffer_prepare(struct vb2_buffer *vb)
  313. {
  314. struct vb2_queue *vq = vb->vb2_queue;
  315. struct fimc_ctx *ctx = vq->drv_priv;
  316. int i;
  317. if (ctx->d_frame.fmt == NULL)
  318. return -EINVAL;
  319. for (i = 0; i < ctx->d_frame.fmt->memplanes; i++) {
  320. unsigned long size = ctx->d_frame.payload[i];
  321. if (vb2_plane_size(vb, i) < size) {
  322. v4l2_err(&ctx->fimc_dev->vid_cap.ve.vdev,
  323. "User buffer too small (%ld < %ld)\n",
  324. vb2_plane_size(vb, i), size);
  325. return -EINVAL;
  326. }
  327. vb2_set_plane_payload(vb, i, size);
  328. }
  329. return 0;
  330. }
  331. static void buffer_queue(struct vb2_buffer *vb)
  332. {
  333. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  334. struct fimc_vid_buffer *buf
  335. = container_of(vbuf, struct fimc_vid_buffer, vb);
  336. struct fimc_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  337. struct fimc_dev *fimc = ctx->fimc_dev;
  338. struct fimc_vid_cap *vid_cap = &fimc->vid_cap;
  339. struct exynos_video_entity *ve = &vid_cap->ve;
  340. unsigned long flags;
  341. int min_bufs;
  342. spin_lock_irqsave(&fimc->slock, flags);
  343. fimc_prepare_addr(ctx, &buf->vb.vb2_buf, &ctx->d_frame, &buf->paddr);
  344. if (!test_bit(ST_CAPT_SUSPENDED, &fimc->state) &&
  345. !test_bit(ST_CAPT_STREAM, &fimc->state) &&
  346. vid_cap->active_buf_cnt < FIMC_MAX_OUT_BUFS) {
  347. /* Setup the buffer directly for processing. */
  348. int buf_id = (vid_cap->reqbufs_count == 1) ? -1 :
  349. vid_cap->buf_index;
  350. fimc_hw_set_output_addr(fimc, &buf->paddr, buf_id);
  351. buf->index = vid_cap->buf_index;
  352. fimc_active_queue_add(vid_cap, buf);
  353. if (++vid_cap->buf_index >= FIMC_MAX_OUT_BUFS)
  354. vid_cap->buf_index = 0;
  355. } else {
  356. fimc_pending_queue_add(vid_cap, buf);
  357. }
  358. min_bufs = vid_cap->reqbufs_count > 1 ? 2 : 1;
  359. if (vb2_is_streaming(&vid_cap->vbq) &&
  360. vid_cap->active_buf_cnt >= min_bufs &&
  361. !test_and_set_bit(ST_CAPT_STREAM, &fimc->state)) {
  362. int ret;
  363. fimc_activate_capture(ctx);
  364. spin_unlock_irqrestore(&fimc->slock, flags);
  365. if (test_and_set_bit(ST_CAPT_ISP_STREAM, &fimc->state))
  366. return;
  367. ret = fimc_pipeline_call(ve, set_stream, 1);
  368. if (ret < 0)
  369. v4l2_err(&ve->vdev, "stream on failed: %d\n", ret);
  370. return;
  371. }
  372. spin_unlock_irqrestore(&fimc->slock, flags);
  373. }
  374. static struct vb2_ops fimc_capture_qops = {
  375. .queue_setup = queue_setup,
  376. .buf_prepare = buffer_prepare,
  377. .buf_queue = buffer_queue,
  378. .wait_prepare = vb2_ops_wait_prepare,
  379. .wait_finish = vb2_ops_wait_finish,
  380. .start_streaming = start_streaming,
  381. .stop_streaming = stop_streaming,
  382. };
  383. static int fimc_capture_set_default_format(struct fimc_dev *fimc);
  384. static int fimc_capture_open(struct file *file)
  385. {
  386. struct fimc_dev *fimc = video_drvdata(file);
  387. struct fimc_vid_cap *vc = &fimc->vid_cap;
  388. struct exynos_video_entity *ve = &vc->ve;
  389. int ret = -EBUSY;
  390. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  391. mutex_lock(&fimc->lock);
  392. if (fimc_m2m_active(fimc))
  393. goto unlock;
  394. set_bit(ST_CAPT_BUSY, &fimc->state);
  395. ret = pm_runtime_get_sync(&fimc->pdev->dev);
  396. if (ret < 0)
  397. goto unlock;
  398. ret = v4l2_fh_open(file);
  399. if (ret) {
  400. pm_runtime_put_sync(&fimc->pdev->dev);
  401. goto unlock;
  402. }
  403. if (v4l2_fh_is_singular_file(file)) {
  404. fimc_md_graph_lock(ve);
  405. ret = fimc_pipeline_call(ve, open, &ve->vdev.entity, true);
  406. if (ret == 0 && vc->user_subdev_api && vc->inh_sensor_ctrls) {
  407. /*
  408. * Recreate controls of the the video node to drop
  409. * any controls inherited from the sensor subdev.
  410. */
  411. fimc_ctrls_delete(vc->ctx);
  412. ret = fimc_ctrls_create(vc->ctx);
  413. if (ret == 0)
  414. vc->inh_sensor_ctrls = false;
  415. }
  416. if (ret == 0)
  417. ve->vdev.entity.use_count++;
  418. fimc_md_graph_unlock(ve);
  419. if (ret == 0)
  420. ret = fimc_capture_set_default_format(fimc);
  421. if (ret < 0) {
  422. clear_bit(ST_CAPT_BUSY, &fimc->state);
  423. pm_runtime_put_sync(&fimc->pdev->dev);
  424. v4l2_fh_release(file);
  425. }
  426. }
  427. unlock:
  428. mutex_unlock(&fimc->lock);
  429. return ret;
  430. }
  431. static int fimc_capture_release(struct file *file)
  432. {
  433. struct fimc_dev *fimc = video_drvdata(file);
  434. struct fimc_vid_cap *vc = &fimc->vid_cap;
  435. bool close = v4l2_fh_is_singular_file(file);
  436. int ret;
  437. dbg("pid: %d, state: 0x%lx", task_pid_nr(current), fimc->state);
  438. mutex_lock(&fimc->lock);
  439. if (close && vc->streaming) {
  440. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  441. vc->streaming = false;
  442. }
  443. ret = _vb2_fop_release(file, NULL);
  444. if (close) {
  445. clear_bit(ST_CAPT_BUSY, &fimc->state);
  446. fimc_pipeline_call(&vc->ve, close);
  447. clear_bit(ST_CAPT_SUSPENDED, &fimc->state);
  448. fimc_md_graph_lock(&vc->ve);
  449. vc->ve.vdev.entity.use_count--;
  450. fimc_md_graph_unlock(&vc->ve);
  451. }
  452. pm_runtime_put_sync(&fimc->pdev->dev);
  453. mutex_unlock(&fimc->lock);
  454. return ret;
  455. }
  456. static const struct v4l2_file_operations fimc_capture_fops = {
  457. .owner = THIS_MODULE,
  458. .open = fimc_capture_open,
  459. .release = fimc_capture_release,
  460. .poll = vb2_fop_poll,
  461. .unlocked_ioctl = video_ioctl2,
  462. .mmap = vb2_fop_mmap,
  463. };
  464. /*
  465. * Format and crop negotiation helpers
  466. */
  467. static struct fimc_fmt *fimc_capture_try_format(struct fimc_ctx *ctx,
  468. u32 *width, u32 *height,
  469. u32 *code, u32 *fourcc, int pad)
  470. {
  471. bool rotation = ctx->rotation == 90 || ctx->rotation == 270;
  472. struct fimc_dev *fimc = ctx->fimc_dev;
  473. const struct fimc_variant *var = fimc->variant;
  474. const struct fimc_pix_limit *pl = var->pix_limit;
  475. struct fimc_frame *dst = &ctx->d_frame;
  476. u32 depth, min_w, max_w, min_h, align_h = 3;
  477. u32 mask = FMT_FLAGS_CAM;
  478. struct fimc_fmt *ffmt;
  479. /* Conversion from/to JPEG or User Defined format is not supported */
  480. if (code && ctx->s_frame.fmt && pad == FIMC_SD_PAD_SOURCE &&
  481. fimc_fmt_is_user_defined(ctx->s_frame.fmt->color))
  482. *code = ctx->s_frame.fmt->mbus_code;
  483. if (fourcc && *fourcc != V4L2_PIX_FMT_JPEG && pad == FIMC_SD_PAD_SOURCE)
  484. mask |= FMT_FLAGS_M2M;
  485. if (pad == FIMC_SD_PAD_SINK_FIFO)
  486. mask = FMT_FLAGS_WRITEBACK;
  487. ffmt = fimc_find_format(fourcc, code, mask, 0);
  488. if (WARN_ON(!ffmt))
  489. return NULL;
  490. if (code)
  491. *code = ffmt->mbus_code;
  492. if (fourcc)
  493. *fourcc = ffmt->fourcc;
  494. if (pad != FIMC_SD_PAD_SOURCE) {
  495. max_w = fimc_fmt_is_user_defined(ffmt->color) ?
  496. pl->scaler_dis_w : pl->scaler_en_w;
  497. /* Apply the camera input interface pixel constraints */
  498. v4l_bound_align_image(width, max_t(u32, *width, 32), max_w, 4,
  499. height, max_t(u32, *height, 32),
  500. FIMC_CAMIF_MAX_HEIGHT,
  501. fimc_fmt_is_user_defined(ffmt->color) ?
  502. 3 : 1,
  503. 0);
  504. return ffmt;
  505. }
  506. /* Can't scale or crop in transparent (JPEG) transfer mode */
  507. if (fimc_fmt_is_user_defined(ffmt->color)) {
  508. *width = ctx->s_frame.f_width;
  509. *height = ctx->s_frame.f_height;
  510. return ffmt;
  511. }
  512. /* Apply the scaler and the output DMA constraints */
  513. max_w = rotation ? pl->out_rot_en_w : pl->out_rot_dis_w;
  514. if (ctx->state & FIMC_COMPOSE) {
  515. min_w = dst->offs_h + dst->width;
  516. min_h = dst->offs_v + dst->height;
  517. } else {
  518. min_w = var->min_out_pixsize;
  519. min_h = var->min_out_pixsize;
  520. }
  521. if (var->min_vsize_align == 1 && !rotation)
  522. align_h = fimc_fmt_is_rgb(ffmt->color) ? 0 : 1;
  523. depth = fimc_get_format_depth(ffmt);
  524. v4l_bound_align_image(width, min_w, max_w,
  525. ffs(var->min_out_pixsize) - 1,
  526. height, min_h, FIMC_CAMIF_MAX_HEIGHT,
  527. align_h,
  528. 64/(ALIGN(depth, 8)));
  529. dbg("pad%d: code: 0x%x, %dx%d. dst fmt: %dx%d",
  530. pad, code ? *code : 0, *width, *height,
  531. dst->f_width, dst->f_height);
  532. return ffmt;
  533. }
  534. static void fimc_capture_try_selection(struct fimc_ctx *ctx,
  535. struct v4l2_rect *r,
  536. int target)
  537. {
  538. bool rotate = ctx->rotation == 90 || ctx->rotation == 270;
  539. struct fimc_dev *fimc = ctx->fimc_dev;
  540. const struct fimc_variant *var = fimc->variant;
  541. const struct fimc_pix_limit *pl = var->pix_limit;
  542. struct fimc_frame *sink = &ctx->s_frame;
  543. u32 max_w, max_h, min_w = 0, min_h = 0, min_sz;
  544. u32 align_sz = 0, align_h = 4;
  545. u32 max_sc_h, max_sc_v;
  546. /* In JPEG transparent transfer mode cropping is not supported */
  547. if (fimc_fmt_is_user_defined(ctx->d_frame.fmt->color)) {
  548. r->width = sink->f_width;
  549. r->height = sink->f_height;
  550. r->left = r->top = 0;
  551. return;
  552. }
  553. if (target == V4L2_SEL_TGT_COMPOSE) {
  554. if (ctx->rotation != 90 && ctx->rotation != 270)
  555. align_h = 1;
  556. max_sc_h = min(SCALER_MAX_HRATIO, 1 << (ffs(sink->width) - 3));
  557. max_sc_v = min(SCALER_MAX_VRATIO, 1 << (ffs(sink->height) - 1));
  558. min_sz = var->min_out_pixsize;
  559. } else {
  560. u32 depth = fimc_get_format_depth(sink->fmt);
  561. align_sz = 64/ALIGN(depth, 8);
  562. min_sz = var->min_inp_pixsize;
  563. min_w = min_h = min_sz;
  564. max_sc_h = max_sc_v = 1;
  565. }
  566. /*
  567. * For the compose rectangle the following constraints must be met:
  568. * - it must fit in the sink pad format rectangle (f_width/f_height);
  569. * - maximum downscaling ratio is 64;
  570. * - maximum crop size depends if the rotator is used or not;
  571. * - the sink pad format width/height must be 4 multiple of the
  572. * prescaler ratios determined by sink pad size and source pad crop,
  573. * the prescaler ratio is returned by fimc_get_scaler_factor().
  574. */
  575. max_w = min_t(u32,
  576. rotate ? pl->out_rot_en_w : pl->out_rot_dis_w,
  577. rotate ? sink->f_height : sink->f_width);
  578. max_h = min_t(u32, FIMC_CAMIF_MAX_HEIGHT, sink->f_height);
  579. if (target == V4L2_SEL_TGT_COMPOSE) {
  580. min_w = min_t(u32, max_w, sink->f_width / max_sc_h);
  581. min_h = min_t(u32, max_h, sink->f_height / max_sc_v);
  582. if (rotate) {
  583. swap(max_sc_h, max_sc_v);
  584. swap(min_w, min_h);
  585. }
  586. }
  587. v4l_bound_align_image(&r->width, min_w, max_w, ffs(min_sz) - 1,
  588. &r->height, min_h, max_h, align_h,
  589. align_sz);
  590. /* Adjust left/top if crop/compose rectangle is out of bounds */
  591. r->left = clamp_t(u32, r->left, 0, sink->f_width - r->width);
  592. r->top = clamp_t(u32, r->top, 0, sink->f_height - r->height);
  593. r->left = round_down(r->left, var->hor_offs_align);
  594. dbg("target %#x: (%d,%d)/%dx%d, sink fmt: %dx%d",
  595. target, r->left, r->top, r->width, r->height,
  596. sink->f_width, sink->f_height);
  597. }
  598. /*
  599. * The video node ioctl operations
  600. */
  601. static int fimc_cap_querycap(struct file *file, void *priv,
  602. struct v4l2_capability *cap)
  603. {
  604. struct fimc_dev *fimc = video_drvdata(file);
  605. __fimc_vidioc_querycap(&fimc->pdev->dev, cap, V4L2_CAP_STREAMING |
  606. V4L2_CAP_VIDEO_CAPTURE_MPLANE);
  607. return 0;
  608. }
  609. static int fimc_cap_enum_fmt_mplane(struct file *file, void *priv,
  610. struct v4l2_fmtdesc *f)
  611. {
  612. struct fimc_fmt *fmt;
  613. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM | FMT_FLAGS_M2M,
  614. f->index);
  615. if (!fmt)
  616. return -EINVAL;
  617. strncpy(f->description, fmt->name, sizeof(f->description) - 1);
  618. f->pixelformat = fmt->fourcc;
  619. if (fmt->fourcc == MEDIA_BUS_FMT_JPEG_1X8)
  620. f->flags |= V4L2_FMT_FLAG_COMPRESSED;
  621. return 0;
  622. }
  623. static struct media_entity *fimc_pipeline_get_head(struct media_entity *me)
  624. {
  625. struct media_pad *pad = &me->pads[0];
  626. while (!(pad->flags & MEDIA_PAD_FL_SOURCE)) {
  627. pad = media_entity_remote_pad(pad);
  628. if (!pad)
  629. break;
  630. me = pad->entity;
  631. pad = &me->pads[0];
  632. }
  633. return me;
  634. }
  635. /**
  636. * fimc_pipeline_try_format - negotiate and/or set formats at pipeline
  637. * elements
  638. * @ctx: FIMC capture context
  639. * @tfmt: media bus format to try/set on subdevs
  640. * @fmt_id: fimc pixel format id corresponding to returned @tfmt (output)
  641. * @set: true to set format on subdevs, false to try only
  642. */
  643. static int fimc_pipeline_try_format(struct fimc_ctx *ctx,
  644. struct v4l2_mbus_framefmt *tfmt,
  645. struct fimc_fmt **fmt_id,
  646. bool set)
  647. {
  648. struct fimc_dev *fimc = ctx->fimc_dev;
  649. struct fimc_pipeline *p = to_fimc_pipeline(fimc->vid_cap.ve.pipe);
  650. struct v4l2_subdev *sd = p->subdevs[IDX_SENSOR];
  651. struct v4l2_subdev_format sfmt;
  652. struct v4l2_mbus_framefmt *mf = &sfmt.format;
  653. struct media_entity *me;
  654. struct fimc_fmt *ffmt;
  655. struct media_pad *pad;
  656. int ret, i = 1;
  657. u32 fcc;
  658. if (WARN_ON(!sd || !tfmt))
  659. return -EINVAL;
  660. memset(&sfmt, 0, sizeof(sfmt));
  661. sfmt.format = *tfmt;
  662. sfmt.which = set ? V4L2_SUBDEV_FORMAT_ACTIVE : V4L2_SUBDEV_FORMAT_TRY;
  663. me = fimc_pipeline_get_head(&sd->entity);
  664. while (1) {
  665. ffmt = fimc_find_format(NULL, mf->code != 0 ? &mf->code : NULL,
  666. FMT_FLAGS_CAM, i++);
  667. if (ffmt == NULL) {
  668. /*
  669. * Notify user-space if common pixel code for
  670. * host and sensor does not exist.
  671. */
  672. return -EINVAL;
  673. }
  674. mf->code = tfmt->code = ffmt->mbus_code;
  675. /* set format on all pipeline subdevs */
  676. while (me != &fimc->vid_cap.subdev.entity) {
  677. sd = media_entity_to_v4l2_subdev(me);
  678. sfmt.pad = 0;
  679. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &sfmt);
  680. if (ret)
  681. return ret;
  682. if (me->pads[0].flags & MEDIA_PAD_FL_SINK) {
  683. sfmt.pad = me->num_pads - 1;
  684. mf->code = tfmt->code;
  685. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL,
  686. &sfmt);
  687. if (ret)
  688. return ret;
  689. }
  690. pad = media_entity_remote_pad(&me->pads[sfmt.pad]);
  691. if (!pad)
  692. return -EINVAL;
  693. me = pad->entity;
  694. }
  695. if (mf->code != tfmt->code)
  696. continue;
  697. fcc = ffmt->fourcc;
  698. tfmt->width = mf->width;
  699. tfmt->height = mf->height;
  700. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  701. NULL, &fcc, FIMC_SD_PAD_SINK_CAM);
  702. ffmt = fimc_capture_try_format(ctx, &tfmt->width, &tfmt->height,
  703. NULL, &fcc, FIMC_SD_PAD_SOURCE);
  704. if (ffmt && ffmt->mbus_code)
  705. mf->code = ffmt->mbus_code;
  706. if (mf->width != tfmt->width || mf->height != tfmt->height)
  707. continue;
  708. tfmt->code = mf->code;
  709. break;
  710. }
  711. if (fmt_id && ffmt)
  712. *fmt_id = ffmt;
  713. *tfmt = *mf;
  714. return 0;
  715. }
  716. /**
  717. * fimc_get_sensor_frame_desc - query the sensor for media bus frame parameters
  718. * @sensor: pointer to the sensor subdev
  719. * @plane_fmt: provides plane sizes corresponding to the frame layout entries
  720. * @try: true to set the frame parameters, false to query only
  721. *
  722. * This function is used by this driver only for compressed/blob data formats.
  723. */
  724. static int fimc_get_sensor_frame_desc(struct v4l2_subdev *sensor,
  725. struct v4l2_plane_pix_format *plane_fmt,
  726. unsigned int num_planes, bool try)
  727. {
  728. struct v4l2_mbus_frame_desc fd;
  729. int i, ret;
  730. int pad;
  731. for (i = 0; i < num_planes; i++)
  732. fd.entry[i].length = plane_fmt[i].sizeimage;
  733. pad = sensor->entity.num_pads - 1;
  734. if (try)
  735. ret = v4l2_subdev_call(sensor, pad, set_frame_desc, pad, &fd);
  736. else
  737. ret = v4l2_subdev_call(sensor, pad, get_frame_desc, pad, &fd);
  738. if (ret < 0)
  739. return ret;
  740. if (num_planes != fd.num_entries)
  741. return -EINVAL;
  742. for (i = 0; i < num_planes; i++)
  743. plane_fmt[i].sizeimage = fd.entry[i].length;
  744. if (fd.entry[0].length > FIMC_MAX_JPEG_BUF_SIZE) {
  745. v4l2_err(sensor->v4l2_dev, "Unsupported buffer size: %u\n",
  746. fd.entry[0].length);
  747. return -EINVAL;
  748. }
  749. return 0;
  750. }
  751. static int fimc_cap_g_fmt_mplane(struct file *file, void *fh,
  752. struct v4l2_format *f)
  753. {
  754. struct fimc_dev *fimc = video_drvdata(file);
  755. __fimc_get_format(&fimc->vid_cap.ctx->d_frame, f);
  756. return 0;
  757. }
  758. /*
  759. * Try or set format on the fimc.X.capture video node and additionally
  760. * on the whole pipeline if @try is false.
  761. * Locking: the caller must _not_ hold the graph mutex.
  762. */
  763. static int __video_try_or_set_format(struct fimc_dev *fimc,
  764. struct v4l2_format *f, bool try,
  765. struct fimc_fmt **inp_fmt,
  766. struct fimc_fmt **out_fmt)
  767. {
  768. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  769. struct fimc_vid_cap *vc = &fimc->vid_cap;
  770. struct exynos_video_entity *ve = &vc->ve;
  771. struct fimc_ctx *ctx = vc->ctx;
  772. unsigned int width = 0, height = 0;
  773. int ret = 0;
  774. /* Pre-configure format at the camera input interface, for JPEG only */
  775. if (fimc_jpeg_fourcc(pix->pixelformat)) {
  776. fimc_capture_try_format(ctx, &pix->width, &pix->height,
  777. NULL, &pix->pixelformat,
  778. FIMC_SD_PAD_SINK_CAM);
  779. if (try) {
  780. width = pix->width;
  781. height = pix->height;
  782. } else {
  783. ctx->s_frame.f_width = pix->width;
  784. ctx->s_frame.f_height = pix->height;
  785. }
  786. }
  787. /* Try the format at the scaler and the DMA output */
  788. *out_fmt = fimc_capture_try_format(ctx, &pix->width, &pix->height,
  789. NULL, &pix->pixelformat,
  790. FIMC_SD_PAD_SOURCE);
  791. if (*out_fmt == NULL)
  792. return -EINVAL;
  793. /* Restore image width/height for JPEG (no resizing supported). */
  794. if (try && fimc_jpeg_fourcc(pix->pixelformat)) {
  795. pix->width = width;
  796. pix->height = height;
  797. }
  798. /* Try to match format at the host and the sensor */
  799. if (!vc->user_subdev_api) {
  800. struct v4l2_mbus_framefmt mbus_fmt;
  801. struct v4l2_mbus_framefmt *mf;
  802. mf = try ? &mbus_fmt : &fimc->vid_cap.ci_fmt;
  803. mf->code = (*out_fmt)->mbus_code;
  804. mf->width = pix->width;
  805. mf->height = pix->height;
  806. fimc_md_graph_lock(ve);
  807. ret = fimc_pipeline_try_format(ctx, mf, inp_fmt, try);
  808. fimc_md_graph_unlock(ve);
  809. if (ret < 0)
  810. return ret;
  811. pix->width = mf->width;
  812. pix->height = mf->height;
  813. }
  814. fimc_adjust_mplane_format(*out_fmt, pix->width, pix->height, pix);
  815. if ((*out_fmt)->flags & FMT_FLAGS_COMPRESSED) {
  816. struct v4l2_subdev *sensor;
  817. fimc_md_graph_lock(ve);
  818. sensor = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  819. if (sensor)
  820. fimc_get_sensor_frame_desc(sensor, pix->plane_fmt,
  821. (*out_fmt)->memplanes, try);
  822. else
  823. ret = -EPIPE;
  824. fimc_md_graph_unlock(ve);
  825. }
  826. return ret;
  827. }
  828. static int fimc_cap_try_fmt_mplane(struct file *file, void *fh,
  829. struct v4l2_format *f)
  830. {
  831. struct fimc_dev *fimc = video_drvdata(file);
  832. struct fimc_fmt *out_fmt = NULL, *inp_fmt = NULL;
  833. return __video_try_or_set_format(fimc, f, true, &inp_fmt, &out_fmt);
  834. }
  835. static void fimc_capture_mark_jpeg_xfer(struct fimc_ctx *ctx,
  836. enum fimc_color_fmt color)
  837. {
  838. bool jpeg = fimc_fmt_is_user_defined(color);
  839. ctx->scaler.enabled = !jpeg;
  840. fimc_ctrls_activate(ctx, !jpeg);
  841. if (jpeg)
  842. set_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  843. else
  844. clear_bit(ST_CAPT_JPEG, &ctx->fimc_dev->state);
  845. }
  846. static int __fimc_capture_set_format(struct fimc_dev *fimc,
  847. struct v4l2_format *f)
  848. {
  849. struct fimc_vid_cap *vc = &fimc->vid_cap;
  850. struct fimc_ctx *ctx = vc->ctx;
  851. struct v4l2_pix_format_mplane *pix = &f->fmt.pix_mp;
  852. struct fimc_frame *ff = &ctx->d_frame;
  853. struct fimc_fmt *inp_fmt = NULL;
  854. int ret, i;
  855. if (vb2_is_busy(&fimc->vid_cap.vbq))
  856. return -EBUSY;
  857. ret = __video_try_or_set_format(fimc, f, false, &inp_fmt, &ff->fmt);
  858. if (ret < 0)
  859. return ret;
  860. /* Update RGB Alpha control state and value range */
  861. fimc_alpha_ctrl_update(ctx);
  862. for (i = 0; i < ff->fmt->memplanes; i++) {
  863. ff->bytesperline[i] = pix->plane_fmt[i].bytesperline;
  864. ff->payload[i] = pix->plane_fmt[i].sizeimage;
  865. }
  866. set_frame_bounds(ff, pix->width, pix->height);
  867. /* Reset the composition rectangle if not yet configured */
  868. if (!(ctx->state & FIMC_COMPOSE))
  869. set_frame_crop(ff, 0, 0, pix->width, pix->height);
  870. fimc_capture_mark_jpeg_xfer(ctx, ff->fmt->color);
  871. /* Reset cropping and set format at the camera interface input */
  872. if (!vc->user_subdev_api) {
  873. ctx->s_frame.fmt = inp_fmt;
  874. set_frame_bounds(&ctx->s_frame, pix->width, pix->height);
  875. set_frame_crop(&ctx->s_frame, 0, 0, pix->width, pix->height);
  876. }
  877. return ret;
  878. }
  879. static int fimc_cap_s_fmt_mplane(struct file *file, void *priv,
  880. struct v4l2_format *f)
  881. {
  882. struct fimc_dev *fimc = video_drvdata(file);
  883. return __fimc_capture_set_format(fimc, f);
  884. }
  885. static int fimc_cap_enum_input(struct file *file, void *priv,
  886. struct v4l2_input *i)
  887. {
  888. struct fimc_dev *fimc = video_drvdata(file);
  889. struct exynos_video_entity *ve = &fimc->vid_cap.ve;
  890. struct v4l2_subdev *sd;
  891. if (i->index != 0)
  892. return -EINVAL;
  893. i->type = V4L2_INPUT_TYPE_CAMERA;
  894. fimc_md_graph_lock(ve);
  895. sd = __fimc_md_get_subdev(ve->pipe, IDX_SENSOR);
  896. fimc_md_graph_unlock(ve);
  897. if (sd)
  898. strlcpy(i->name, sd->name, sizeof(i->name));
  899. return 0;
  900. }
  901. static int fimc_cap_s_input(struct file *file, void *priv, unsigned int i)
  902. {
  903. return i == 0 ? i : -EINVAL;
  904. }
  905. static int fimc_cap_g_input(struct file *file, void *priv, unsigned int *i)
  906. {
  907. *i = 0;
  908. return 0;
  909. }
  910. /**
  911. * fimc_pipeline_validate - check for formats inconsistencies
  912. * between source and sink pad of each link
  913. *
  914. * Return 0 if all formats match or -EPIPE otherwise.
  915. */
  916. static int fimc_pipeline_validate(struct fimc_dev *fimc)
  917. {
  918. struct v4l2_subdev_format sink_fmt, src_fmt;
  919. struct fimc_vid_cap *vc = &fimc->vid_cap;
  920. struct v4l2_subdev *sd = &vc->subdev;
  921. struct fimc_pipeline *p = to_fimc_pipeline(vc->ve.pipe);
  922. struct media_pad *sink_pad, *src_pad;
  923. int i, ret;
  924. while (1) {
  925. /*
  926. * Find current entity sink pad and any remote sink pad linked
  927. * to it. We stop if there is no sink pad in current entity or
  928. * it is not linked to any other remote entity.
  929. */
  930. src_pad = NULL;
  931. for (i = 0; i < sd->entity.num_pads; i++) {
  932. struct media_pad *p = &sd->entity.pads[i];
  933. if (p->flags & MEDIA_PAD_FL_SINK) {
  934. sink_pad = p;
  935. src_pad = media_entity_remote_pad(sink_pad);
  936. if (src_pad)
  937. break;
  938. }
  939. }
  940. if (src_pad == NULL ||
  941. media_entity_type(src_pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  942. break;
  943. /* Don't call FIMC subdev operation to avoid nested locking */
  944. if (sd == &vc->subdev) {
  945. struct fimc_frame *ff = &vc->ctx->s_frame;
  946. sink_fmt.format.width = ff->f_width;
  947. sink_fmt.format.height = ff->f_height;
  948. sink_fmt.format.code = ff->fmt ? ff->fmt->mbus_code : 0;
  949. } else {
  950. sink_fmt.pad = sink_pad->index;
  951. sink_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  952. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &sink_fmt);
  953. if (ret < 0 && ret != -ENOIOCTLCMD)
  954. return -EPIPE;
  955. }
  956. /* Retrieve format at the source pad */
  957. sd = media_entity_to_v4l2_subdev(src_pad->entity);
  958. src_fmt.pad = src_pad->index;
  959. src_fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  960. ret = v4l2_subdev_call(sd, pad, get_fmt, NULL, &src_fmt);
  961. if (ret < 0 && ret != -ENOIOCTLCMD)
  962. return -EPIPE;
  963. if (src_fmt.format.width != sink_fmt.format.width ||
  964. src_fmt.format.height != sink_fmt.format.height ||
  965. src_fmt.format.code != sink_fmt.format.code)
  966. return -EPIPE;
  967. if (sd == p->subdevs[IDX_SENSOR] &&
  968. fimc_user_defined_mbus_fmt(src_fmt.format.code)) {
  969. struct v4l2_plane_pix_format plane_fmt[FIMC_MAX_PLANES];
  970. struct fimc_frame *frame = &vc->ctx->d_frame;
  971. unsigned int i;
  972. ret = fimc_get_sensor_frame_desc(sd, plane_fmt,
  973. frame->fmt->memplanes,
  974. false);
  975. if (ret < 0)
  976. return -EPIPE;
  977. for (i = 0; i < frame->fmt->memplanes; i++)
  978. if (frame->payload[i] < plane_fmt[i].sizeimage)
  979. return -EPIPE;
  980. }
  981. }
  982. return 0;
  983. }
  984. static int fimc_cap_streamon(struct file *file, void *priv,
  985. enum v4l2_buf_type type)
  986. {
  987. struct fimc_dev *fimc = video_drvdata(file);
  988. struct fimc_vid_cap *vc = &fimc->vid_cap;
  989. struct media_entity *entity = &vc->ve.vdev.entity;
  990. struct fimc_source_info *si = NULL;
  991. struct v4l2_subdev *sd;
  992. int ret;
  993. if (fimc_capture_active(fimc))
  994. return -EBUSY;
  995. ret = media_entity_pipeline_start(entity, &vc->ve.pipe->mp);
  996. if (ret < 0)
  997. return ret;
  998. sd = __fimc_md_get_subdev(vc->ve.pipe, IDX_SENSOR);
  999. if (sd)
  1000. si = v4l2_get_subdev_hostdata(sd);
  1001. if (si == NULL) {
  1002. ret = -EPIPE;
  1003. goto err_p_stop;
  1004. }
  1005. /*
  1006. * Save configuration data related to currently attached image
  1007. * sensor or other data source, e.g. FIMC-IS.
  1008. */
  1009. vc->source_config = *si;
  1010. if (vc->input == GRP_ID_FIMC_IS)
  1011. vc->source_config.fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
  1012. if (vc->user_subdev_api) {
  1013. ret = fimc_pipeline_validate(fimc);
  1014. if (ret < 0)
  1015. goto err_p_stop;
  1016. }
  1017. ret = vb2_ioctl_streamon(file, priv, type);
  1018. if (!ret) {
  1019. vc->streaming = true;
  1020. return ret;
  1021. }
  1022. err_p_stop:
  1023. media_entity_pipeline_stop(entity);
  1024. return ret;
  1025. }
  1026. static int fimc_cap_streamoff(struct file *file, void *priv,
  1027. enum v4l2_buf_type type)
  1028. {
  1029. struct fimc_dev *fimc = video_drvdata(file);
  1030. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1031. int ret;
  1032. ret = vb2_ioctl_streamoff(file, priv, type);
  1033. if (ret < 0)
  1034. return ret;
  1035. media_entity_pipeline_stop(&vc->ve.vdev.entity);
  1036. vc->streaming = false;
  1037. return 0;
  1038. }
  1039. static int fimc_cap_reqbufs(struct file *file, void *priv,
  1040. struct v4l2_requestbuffers *reqbufs)
  1041. {
  1042. struct fimc_dev *fimc = video_drvdata(file);
  1043. int ret;
  1044. ret = vb2_ioctl_reqbufs(file, priv, reqbufs);
  1045. if (!ret)
  1046. fimc->vid_cap.reqbufs_count = reqbufs->count;
  1047. return ret;
  1048. }
  1049. static int fimc_cap_g_selection(struct file *file, void *fh,
  1050. struct v4l2_selection *s)
  1051. {
  1052. struct fimc_dev *fimc = video_drvdata(file);
  1053. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1054. struct fimc_frame *f = &ctx->s_frame;
  1055. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1056. return -EINVAL;
  1057. switch (s->target) {
  1058. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  1059. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1060. f = &ctx->d_frame;
  1061. case V4L2_SEL_TGT_CROP_BOUNDS:
  1062. case V4L2_SEL_TGT_CROP_DEFAULT:
  1063. s->r.left = 0;
  1064. s->r.top = 0;
  1065. s->r.width = f->o_width;
  1066. s->r.height = f->o_height;
  1067. return 0;
  1068. case V4L2_SEL_TGT_COMPOSE:
  1069. f = &ctx->d_frame;
  1070. case V4L2_SEL_TGT_CROP:
  1071. s->r.left = f->offs_h;
  1072. s->r.top = f->offs_v;
  1073. s->r.width = f->width;
  1074. s->r.height = f->height;
  1075. return 0;
  1076. }
  1077. return -EINVAL;
  1078. }
  1079. /* Return 1 if rectangle a is enclosed in rectangle b, or 0 otherwise. */
  1080. static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
  1081. {
  1082. if (a->left < b->left || a->top < b->top)
  1083. return 0;
  1084. if (a->left + a->width > b->left + b->width)
  1085. return 0;
  1086. if (a->top + a->height > b->top + b->height)
  1087. return 0;
  1088. return 1;
  1089. }
  1090. static int fimc_cap_s_selection(struct file *file, void *fh,
  1091. struct v4l2_selection *s)
  1092. {
  1093. struct fimc_dev *fimc = video_drvdata(file);
  1094. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1095. struct v4l2_rect rect = s->r;
  1096. struct fimc_frame *f;
  1097. unsigned long flags;
  1098. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  1099. return -EINVAL;
  1100. if (s->target == V4L2_SEL_TGT_COMPOSE)
  1101. f = &ctx->d_frame;
  1102. else if (s->target == V4L2_SEL_TGT_CROP)
  1103. f = &ctx->s_frame;
  1104. else
  1105. return -EINVAL;
  1106. fimc_capture_try_selection(ctx, &rect, s->target);
  1107. if (s->flags & V4L2_SEL_FLAG_LE &&
  1108. !enclosed_rectangle(&rect, &s->r))
  1109. return -ERANGE;
  1110. if (s->flags & V4L2_SEL_FLAG_GE &&
  1111. !enclosed_rectangle(&s->r, &rect))
  1112. return -ERANGE;
  1113. s->r = rect;
  1114. spin_lock_irqsave(&fimc->slock, flags);
  1115. set_frame_crop(f, s->r.left, s->r.top, s->r.width,
  1116. s->r.height);
  1117. spin_unlock_irqrestore(&fimc->slock, flags);
  1118. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1119. return 0;
  1120. }
  1121. static const struct v4l2_ioctl_ops fimc_capture_ioctl_ops = {
  1122. .vidioc_querycap = fimc_cap_querycap,
  1123. .vidioc_enum_fmt_vid_cap_mplane = fimc_cap_enum_fmt_mplane,
  1124. .vidioc_try_fmt_vid_cap_mplane = fimc_cap_try_fmt_mplane,
  1125. .vidioc_s_fmt_vid_cap_mplane = fimc_cap_s_fmt_mplane,
  1126. .vidioc_g_fmt_vid_cap_mplane = fimc_cap_g_fmt_mplane,
  1127. .vidioc_reqbufs = fimc_cap_reqbufs,
  1128. .vidioc_querybuf = vb2_ioctl_querybuf,
  1129. .vidioc_qbuf = vb2_ioctl_qbuf,
  1130. .vidioc_dqbuf = vb2_ioctl_dqbuf,
  1131. .vidioc_expbuf = vb2_ioctl_expbuf,
  1132. .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
  1133. .vidioc_create_bufs = vb2_ioctl_create_bufs,
  1134. .vidioc_streamon = fimc_cap_streamon,
  1135. .vidioc_streamoff = fimc_cap_streamoff,
  1136. .vidioc_g_selection = fimc_cap_g_selection,
  1137. .vidioc_s_selection = fimc_cap_s_selection,
  1138. .vidioc_enum_input = fimc_cap_enum_input,
  1139. .vidioc_s_input = fimc_cap_s_input,
  1140. .vidioc_g_input = fimc_cap_g_input,
  1141. };
  1142. /* Capture subdev media entity operations */
  1143. static int fimc_link_setup(struct media_entity *entity,
  1144. const struct media_pad *local,
  1145. const struct media_pad *remote, u32 flags)
  1146. {
  1147. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1148. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1149. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1150. struct v4l2_subdev *sensor;
  1151. if (media_entity_type(remote->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  1152. return -EINVAL;
  1153. if (WARN_ON(fimc == NULL))
  1154. return 0;
  1155. dbg("%s --> %s, flags: 0x%x. input: 0x%x",
  1156. local->entity->name, remote->entity->name, flags,
  1157. fimc->vid_cap.input);
  1158. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1159. fimc->vid_cap.input = 0;
  1160. return 0;
  1161. }
  1162. if (vc->input != 0)
  1163. return -EBUSY;
  1164. vc->input = sd->grp_id;
  1165. if (vc->user_subdev_api || vc->inh_sensor_ctrls)
  1166. return 0;
  1167. /* Inherit V4L2 controls from the image sensor subdev. */
  1168. sensor = fimc_find_remote_sensor(&vc->subdev.entity);
  1169. if (sensor == NULL)
  1170. return 0;
  1171. return v4l2_ctrl_add_handler(&vc->ctx->ctrls.handler,
  1172. sensor->ctrl_handler, NULL);
  1173. }
  1174. static const struct media_entity_operations fimc_sd_media_ops = {
  1175. .link_setup = fimc_link_setup,
  1176. };
  1177. /**
  1178. * fimc_sensor_notify - v4l2_device notification from a sensor subdev
  1179. * @sd: pointer to a subdev generating the notification
  1180. * @notification: the notification type, must be S5P_FIMC_TX_END_NOTIFY
  1181. * @arg: pointer to an u32 type integer that stores the frame payload value
  1182. *
  1183. * The End Of Frame notification sent by sensor subdev in its still capture
  1184. * mode. If there is only a single VSYNC generated by the sensor at the
  1185. * beginning of a frame transmission, FIMC does not issue the LastIrq
  1186. * (end of frame) interrupt. And this notification is used to complete the
  1187. * frame capture and returning a buffer to user-space. Subdev drivers should
  1188. * call this notification from their last 'End of frame capture' interrupt.
  1189. */
  1190. void fimc_sensor_notify(struct v4l2_subdev *sd, unsigned int notification,
  1191. void *arg)
  1192. {
  1193. struct fimc_source_info *si;
  1194. struct fimc_vid_buffer *buf;
  1195. struct fimc_md *fmd;
  1196. struct fimc_dev *fimc;
  1197. unsigned long flags;
  1198. if (sd == NULL)
  1199. return;
  1200. si = v4l2_get_subdev_hostdata(sd);
  1201. fmd = entity_to_fimc_mdev(&sd->entity);
  1202. spin_lock_irqsave(&fmd->slock, flags);
  1203. fimc = si ? source_to_sensor_info(si)->host : NULL;
  1204. if (fimc && arg && notification == S5P_FIMC_TX_END_NOTIFY &&
  1205. test_bit(ST_CAPT_PEND, &fimc->state)) {
  1206. unsigned long irq_flags;
  1207. spin_lock_irqsave(&fimc->slock, irq_flags);
  1208. if (!list_empty(&fimc->vid_cap.active_buf_q)) {
  1209. buf = list_entry(fimc->vid_cap.active_buf_q.next,
  1210. struct fimc_vid_buffer, list);
  1211. vb2_set_plane_payload(&buf->vb.vb2_buf, 0,
  1212. *((u32 *)arg));
  1213. }
  1214. fimc_capture_irq_handler(fimc, 1);
  1215. fimc_deactivate_capture(fimc);
  1216. spin_unlock_irqrestore(&fimc->slock, irq_flags);
  1217. }
  1218. spin_unlock_irqrestore(&fmd->slock, flags);
  1219. }
  1220. static int fimc_subdev_enum_mbus_code(struct v4l2_subdev *sd,
  1221. struct v4l2_subdev_pad_config *cfg,
  1222. struct v4l2_subdev_mbus_code_enum *code)
  1223. {
  1224. struct fimc_fmt *fmt;
  1225. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, code->index);
  1226. if (!fmt)
  1227. return -EINVAL;
  1228. code->code = fmt->mbus_code;
  1229. return 0;
  1230. }
  1231. static int fimc_subdev_get_fmt(struct v4l2_subdev *sd,
  1232. struct v4l2_subdev_pad_config *cfg,
  1233. struct v4l2_subdev_format *fmt)
  1234. {
  1235. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1236. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1237. struct fimc_frame *ff = &ctx->s_frame;
  1238. struct v4l2_mbus_framefmt *mf;
  1239. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1240. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1241. fmt->format = *mf;
  1242. return 0;
  1243. }
  1244. mf = &fmt->format;
  1245. mutex_lock(&fimc->lock);
  1246. switch (fmt->pad) {
  1247. case FIMC_SD_PAD_SOURCE:
  1248. if (!WARN_ON(ff->fmt == NULL))
  1249. mf->code = ff->fmt->mbus_code;
  1250. /* Sink pads crop rectangle size */
  1251. mf->width = ff->width;
  1252. mf->height = ff->height;
  1253. break;
  1254. case FIMC_SD_PAD_SINK_FIFO:
  1255. *mf = fimc->vid_cap.wb_fmt;
  1256. break;
  1257. case FIMC_SD_PAD_SINK_CAM:
  1258. default:
  1259. *mf = fimc->vid_cap.ci_fmt;
  1260. break;
  1261. }
  1262. mutex_unlock(&fimc->lock);
  1263. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1264. return 0;
  1265. }
  1266. static int fimc_subdev_set_fmt(struct v4l2_subdev *sd,
  1267. struct v4l2_subdev_pad_config *cfg,
  1268. struct v4l2_subdev_format *fmt)
  1269. {
  1270. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1271. struct v4l2_mbus_framefmt *mf = &fmt->format;
  1272. struct fimc_vid_cap *vc = &fimc->vid_cap;
  1273. struct fimc_ctx *ctx = vc->ctx;
  1274. struct fimc_frame *ff;
  1275. struct fimc_fmt *ffmt;
  1276. dbg("pad%d: code: 0x%x, %dx%d",
  1277. fmt->pad, mf->code, mf->width, mf->height);
  1278. if (fmt->pad == FIMC_SD_PAD_SOURCE && vb2_is_busy(&vc->vbq))
  1279. return -EBUSY;
  1280. mutex_lock(&fimc->lock);
  1281. ffmt = fimc_capture_try_format(ctx, &mf->width, &mf->height,
  1282. &mf->code, NULL, fmt->pad);
  1283. mutex_unlock(&fimc->lock);
  1284. mf->colorspace = V4L2_COLORSPACE_JPEG;
  1285. if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
  1286. mf = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
  1287. *mf = fmt->format;
  1288. return 0;
  1289. }
  1290. /* There must be a bug in the driver if this happens */
  1291. if (WARN_ON(ffmt == NULL))
  1292. return -EINVAL;
  1293. /* Update RGB Alpha control state and value range */
  1294. fimc_alpha_ctrl_update(ctx);
  1295. fimc_capture_mark_jpeg_xfer(ctx, ffmt->color);
  1296. if (fmt->pad == FIMC_SD_PAD_SOURCE) {
  1297. ff = &ctx->d_frame;
  1298. /* Sink pads crop rectangle size */
  1299. mf->width = ctx->s_frame.width;
  1300. mf->height = ctx->s_frame.height;
  1301. } else {
  1302. ff = &ctx->s_frame;
  1303. }
  1304. mutex_lock(&fimc->lock);
  1305. set_frame_bounds(ff, mf->width, mf->height);
  1306. if (fmt->pad == FIMC_SD_PAD_SINK_FIFO)
  1307. vc->wb_fmt = *mf;
  1308. else if (fmt->pad == FIMC_SD_PAD_SINK_CAM)
  1309. vc->ci_fmt = *mf;
  1310. ff->fmt = ffmt;
  1311. /* Reset the crop rectangle if required. */
  1312. if (!(fmt->pad == FIMC_SD_PAD_SOURCE && (ctx->state & FIMC_COMPOSE)))
  1313. set_frame_crop(ff, 0, 0, mf->width, mf->height);
  1314. if (fmt->pad != FIMC_SD_PAD_SOURCE)
  1315. ctx->state &= ~FIMC_COMPOSE;
  1316. mutex_unlock(&fimc->lock);
  1317. return 0;
  1318. }
  1319. static int fimc_subdev_get_selection(struct v4l2_subdev *sd,
  1320. struct v4l2_subdev_pad_config *cfg,
  1321. struct v4l2_subdev_selection *sel)
  1322. {
  1323. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1324. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1325. struct fimc_frame *f = &ctx->s_frame;
  1326. struct v4l2_rect *r = &sel->r;
  1327. struct v4l2_rect *try_sel;
  1328. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1329. return -EINVAL;
  1330. mutex_lock(&fimc->lock);
  1331. switch (sel->target) {
  1332. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  1333. f = &ctx->d_frame;
  1334. case V4L2_SEL_TGT_CROP_BOUNDS:
  1335. r->width = f->o_width;
  1336. r->height = f->o_height;
  1337. r->left = 0;
  1338. r->top = 0;
  1339. mutex_unlock(&fimc->lock);
  1340. return 0;
  1341. case V4L2_SEL_TGT_CROP:
  1342. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1343. break;
  1344. case V4L2_SEL_TGT_COMPOSE:
  1345. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1346. f = &ctx->d_frame;
  1347. break;
  1348. default:
  1349. mutex_unlock(&fimc->lock);
  1350. return -EINVAL;
  1351. }
  1352. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1353. sel->r = *try_sel;
  1354. } else {
  1355. r->left = f->offs_h;
  1356. r->top = f->offs_v;
  1357. r->width = f->width;
  1358. r->height = f->height;
  1359. }
  1360. dbg("target %#x: l:%d, t:%d, %dx%d, f_w: %d, f_h: %d",
  1361. sel->pad, r->left, r->top, r->width, r->height,
  1362. f->f_width, f->f_height);
  1363. mutex_unlock(&fimc->lock);
  1364. return 0;
  1365. }
  1366. static int fimc_subdev_set_selection(struct v4l2_subdev *sd,
  1367. struct v4l2_subdev_pad_config *cfg,
  1368. struct v4l2_subdev_selection *sel)
  1369. {
  1370. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1371. struct fimc_ctx *ctx = fimc->vid_cap.ctx;
  1372. struct fimc_frame *f = &ctx->s_frame;
  1373. struct v4l2_rect *r = &sel->r;
  1374. struct v4l2_rect *try_sel;
  1375. unsigned long flags;
  1376. if (sel->pad == FIMC_SD_PAD_SOURCE)
  1377. return -EINVAL;
  1378. mutex_lock(&fimc->lock);
  1379. fimc_capture_try_selection(ctx, r, V4L2_SEL_TGT_CROP);
  1380. switch (sel->target) {
  1381. case V4L2_SEL_TGT_CROP:
  1382. try_sel = v4l2_subdev_get_try_crop(sd, cfg, sel->pad);
  1383. break;
  1384. case V4L2_SEL_TGT_COMPOSE:
  1385. try_sel = v4l2_subdev_get_try_compose(sd, cfg, sel->pad);
  1386. f = &ctx->d_frame;
  1387. break;
  1388. default:
  1389. mutex_unlock(&fimc->lock);
  1390. return -EINVAL;
  1391. }
  1392. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1393. *try_sel = sel->r;
  1394. } else {
  1395. spin_lock_irqsave(&fimc->slock, flags);
  1396. set_frame_crop(f, r->left, r->top, r->width, r->height);
  1397. set_bit(ST_CAPT_APPLY_CFG, &fimc->state);
  1398. if (sel->target == V4L2_SEL_TGT_COMPOSE)
  1399. ctx->state |= FIMC_COMPOSE;
  1400. spin_unlock_irqrestore(&fimc->slock, flags);
  1401. }
  1402. dbg("target %#x: (%d,%d)/%dx%d", sel->target, r->left, r->top,
  1403. r->width, r->height);
  1404. mutex_unlock(&fimc->lock);
  1405. return 0;
  1406. }
  1407. static struct v4l2_subdev_pad_ops fimc_subdev_pad_ops = {
  1408. .enum_mbus_code = fimc_subdev_enum_mbus_code,
  1409. .get_selection = fimc_subdev_get_selection,
  1410. .set_selection = fimc_subdev_set_selection,
  1411. .get_fmt = fimc_subdev_get_fmt,
  1412. .set_fmt = fimc_subdev_set_fmt,
  1413. };
  1414. static struct v4l2_subdev_ops fimc_subdev_ops = {
  1415. .pad = &fimc_subdev_pad_ops,
  1416. };
  1417. /* Set default format at the sensor and host interface */
  1418. static int fimc_capture_set_default_format(struct fimc_dev *fimc)
  1419. {
  1420. struct v4l2_format fmt = {
  1421. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  1422. .fmt.pix_mp = {
  1423. .width = FIMC_DEFAULT_WIDTH,
  1424. .height = FIMC_DEFAULT_HEIGHT,
  1425. .pixelformat = V4L2_PIX_FMT_YUYV,
  1426. .field = V4L2_FIELD_NONE,
  1427. .colorspace = V4L2_COLORSPACE_JPEG,
  1428. },
  1429. };
  1430. return __fimc_capture_set_format(fimc, &fmt);
  1431. }
  1432. /* fimc->lock must be already initialized */
  1433. static int fimc_register_capture_device(struct fimc_dev *fimc,
  1434. struct v4l2_device *v4l2_dev)
  1435. {
  1436. struct video_device *vfd = &fimc->vid_cap.ve.vdev;
  1437. struct vb2_queue *q = &fimc->vid_cap.vbq;
  1438. struct fimc_ctx *ctx;
  1439. struct fimc_vid_cap *vid_cap;
  1440. struct fimc_fmt *fmt;
  1441. int ret = -ENOMEM;
  1442. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  1443. if (!ctx)
  1444. return -ENOMEM;
  1445. ctx->fimc_dev = fimc;
  1446. ctx->in_path = FIMC_IO_CAMERA;
  1447. ctx->out_path = FIMC_IO_DMA;
  1448. ctx->state = FIMC_CTX_CAP;
  1449. ctx->s_frame.fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1450. ctx->d_frame.fmt = ctx->s_frame.fmt;
  1451. memset(vfd, 0, sizeof(*vfd));
  1452. snprintf(vfd->name, sizeof(vfd->name), "fimc.%d.capture", fimc->id);
  1453. vfd->fops = &fimc_capture_fops;
  1454. vfd->ioctl_ops = &fimc_capture_ioctl_ops;
  1455. vfd->v4l2_dev = v4l2_dev;
  1456. vfd->minor = -1;
  1457. vfd->release = video_device_release_empty;
  1458. vfd->queue = q;
  1459. vfd->lock = &fimc->lock;
  1460. video_set_drvdata(vfd, fimc);
  1461. vid_cap = &fimc->vid_cap;
  1462. vid_cap->active_buf_cnt = 0;
  1463. vid_cap->reqbufs_count = 0;
  1464. vid_cap->ctx = ctx;
  1465. INIT_LIST_HEAD(&vid_cap->pending_buf_q);
  1466. INIT_LIST_HEAD(&vid_cap->active_buf_q);
  1467. memset(q, 0, sizeof(*q));
  1468. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1469. q->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  1470. q->drv_priv = ctx;
  1471. q->ops = &fimc_capture_qops;
  1472. q->mem_ops = &vb2_dma_contig_memops;
  1473. q->buf_struct_size = sizeof(struct fimc_vid_buffer);
  1474. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  1475. q->lock = &fimc->lock;
  1476. ret = vb2_queue_init(q);
  1477. if (ret)
  1478. goto err_free_ctx;
  1479. /* Default format configuration */
  1480. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_CAM, 0);
  1481. vid_cap->ci_fmt.width = FIMC_DEFAULT_WIDTH;
  1482. vid_cap->ci_fmt.height = FIMC_DEFAULT_HEIGHT;
  1483. vid_cap->ci_fmt.code = fmt->mbus_code;
  1484. ctx->s_frame.width = FIMC_DEFAULT_WIDTH;
  1485. ctx->s_frame.height = FIMC_DEFAULT_HEIGHT;
  1486. ctx->s_frame.fmt = fmt;
  1487. fmt = fimc_find_format(NULL, NULL, FMT_FLAGS_WRITEBACK, 0);
  1488. vid_cap->wb_fmt = vid_cap->ci_fmt;
  1489. vid_cap->wb_fmt.code = fmt->mbus_code;
  1490. vid_cap->vd_pad.flags = MEDIA_PAD_FL_SINK;
  1491. ret = media_entity_init(&vfd->entity, 1, &vid_cap->vd_pad, 0);
  1492. if (ret)
  1493. goto err_free_ctx;
  1494. ret = fimc_ctrls_create(ctx);
  1495. if (ret)
  1496. goto err_me_cleanup;
  1497. ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
  1498. if (ret)
  1499. goto err_ctrl_free;
  1500. v4l2_info(v4l2_dev, "Registered %s as /dev/%s\n",
  1501. vfd->name, video_device_node_name(vfd));
  1502. vfd->ctrl_handler = &ctx->ctrls.handler;
  1503. return 0;
  1504. err_ctrl_free:
  1505. fimc_ctrls_delete(ctx);
  1506. err_me_cleanup:
  1507. media_entity_cleanup(&vfd->entity);
  1508. err_free_ctx:
  1509. kfree(ctx);
  1510. return ret;
  1511. }
  1512. static int fimc_capture_subdev_registered(struct v4l2_subdev *sd)
  1513. {
  1514. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1515. int ret;
  1516. if (fimc == NULL)
  1517. return -ENXIO;
  1518. ret = fimc_register_m2m_device(fimc, sd->v4l2_dev);
  1519. if (ret)
  1520. return ret;
  1521. fimc->vid_cap.ve.pipe = v4l2_get_subdev_hostdata(sd);
  1522. ret = fimc_register_capture_device(fimc, sd->v4l2_dev);
  1523. if (ret) {
  1524. fimc_unregister_m2m_device(fimc);
  1525. fimc->vid_cap.ve.pipe = NULL;
  1526. }
  1527. return ret;
  1528. }
  1529. static void fimc_capture_subdev_unregistered(struct v4l2_subdev *sd)
  1530. {
  1531. struct fimc_dev *fimc = v4l2_get_subdevdata(sd);
  1532. struct video_device *vdev;
  1533. if (fimc == NULL)
  1534. return;
  1535. mutex_lock(&fimc->lock);
  1536. fimc_unregister_m2m_device(fimc);
  1537. vdev = &fimc->vid_cap.ve.vdev;
  1538. if (video_is_registered(vdev)) {
  1539. video_unregister_device(vdev);
  1540. media_entity_cleanup(&vdev->entity);
  1541. fimc_ctrls_delete(fimc->vid_cap.ctx);
  1542. fimc->vid_cap.ve.pipe = NULL;
  1543. }
  1544. kfree(fimc->vid_cap.ctx);
  1545. fimc->vid_cap.ctx = NULL;
  1546. mutex_unlock(&fimc->lock);
  1547. }
  1548. static const struct v4l2_subdev_internal_ops fimc_capture_sd_internal_ops = {
  1549. .registered = fimc_capture_subdev_registered,
  1550. .unregistered = fimc_capture_subdev_unregistered,
  1551. };
  1552. int fimc_initialize_capture_subdev(struct fimc_dev *fimc)
  1553. {
  1554. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1555. int ret;
  1556. v4l2_subdev_init(sd, &fimc_subdev_ops);
  1557. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1558. snprintf(sd->name, sizeof(sd->name), "FIMC.%d", fimc->id);
  1559. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_CAM].flags = MEDIA_PAD_FL_SINK;
  1560. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SINK_FIFO].flags = MEDIA_PAD_FL_SINK;
  1561. fimc->vid_cap.sd_pads[FIMC_SD_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1562. ret = media_entity_init(&sd->entity, FIMC_SD_PADS_NUM,
  1563. fimc->vid_cap.sd_pads, 0);
  1564. if (ret)
  1565. return ret;
  1566. sd->entity.ops = &fimc_sd_media_ops;
  1567. sd->internal_ops = &fimc_capture_sd_internal_ops;
  1568. v4l2_set_subdevdata(sd, fimc);
  1569. return 0;
  1570. }
  1571. void fimc_unregister_capture_subdev(struct fimc_dev *fimc)
  1572. {
  1573. struct v4l2_subdev *sd = &fimc->vid_cap.subdev;
  1574. v4l2_device_unregister_subdev(sd);
  1575. media_entity_cleanup(&sd->entity);
  1576. v4l2_set_subdevdata(sd, NULL);
  1577. }