fimc-is-command.h 2.9 KB

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  1. /*
  2. * Samsung Exynos4x12 FIMC-IS (Imaging Subsystem) driver
  3. *
  4. * FIMC-IS command set definitions
  5. *
  6. * Copyright (C) 2013 Samsung Electronics Co., Ltd.
  7. *
  8. * Authors: Younghwan Joo <yhwan.joo@samsung.com>
  9. * Sylwester Nawrocki <s.nawrocki@samsung.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #ifndef FIMC_IS_CMD_H_
  16. #define FIMC_IS_CMD_H_
  17. #define FIMC_IS_COMMAND_VER 110 /* FIMC-IS command set version 1.10 */
  18. /* Enumeration of commands beetween the FIMC-IS and the host processor. */
  19. /* HOST to FIMC-IS */
  20. #define HIC_PREVIEW_STILL 0x0001
  21. #define HIC_PREVIEW_VIDEO 0x0002
  22. #define HIC_CAPTURE_STILL 0x0003
  23. #define HIC_CAPTURE_VIDEO 0x0004
  24. #define HIC_STREAM_ON 0x0005
  25. #define HIC_STREAM_OFF 0x0006
  26. #define HIC_SET_PARAMETER 0x0007
  27. #define HIC_GET_PARAMETER 0x0008
  28. #define HIC_SET_TUNE 0x0009
  29. #define HIC_GET_STATUS 0x000b
  30. /* Sensor part */
  31. #define HIC_OPEN_SENSOR 0x000c
  32. #define HIC_CLOSE_SENSOR 0x000d
  33. #define HIC_SIMMIAN_INIT 0x000e
  34. #define HIC_SIMMIAN_WRITE 0x000f
  35. #define HIC_SIMMIAN_READ 0x0010
  36. #define HIC_POWER_DOWN 0x0011
  37. #define HIC_GET_SET_FILE_ADDR 0x0012
  38. #define HIC_LOAD_SET_FILE 0x0013
  39. #define HIC_MSG_CONFIG 0x0014
  40. #define HIC_MSG_TEST 0x0015
  41. /* FIMC-IS to HOST */
  42. #define IHC_GET_SENSOR_NUM 0x1000
  43. #define IHC_SET_SHOT_MARK 0x1001
  44. /* parameter1: frame number */
  45. /* parameter2: confidence level (smile 0~100) */
  46. /* parameter3: confidence level (blink 0~100) */
  47. #define IHC_SET_FACE_MARK 0x1002
  48. /* parameter1: coordinate count */
  49. /* parameter2: coordinate buffer address */
  50. #define IHC_FRAME_DONE 0x1003
  51. /* parameter1: frame start number */
  52. /* parameter2: frame count */
  53. #define IHC_AA_DONE 0x1004
  54. #define IHC_NOT_READY 0x1005
  55. #define IH_REPLY_DONE 0x2000
  56. #define IH_REPLY_NOT_DONE 0x2001
  57. enum fimc_is_scenario {
  58. IS_SC_PREVIEW_STILL,
  59. IS_SC_PREVIEW_VIDEO,
  60. IS_SC_CAPTURE_STILL,
  61. IS_SC_CAPTURE_VIDEO,
  62. IS_SC_MAX
  63. };
  64. enum fimc_is_sub_scenario {
  65. IS_SC_SUB_DEFAULT,
  66. IS_SC_SUB_PS_VTCALL,
  67. IS_SC_SUB_CS_VTCALL,
  68. IS_SC_SUB_PV_VTCALL,
  69. IS_SC_SUB_CV_VTCALL,
  70. };
  71. struct is_common_regs {
  72. u32 hicmd;
  73. u32 hic_sensorid;
  74. u32 hic_param[4];
  75. u32 reserved1[4];
  76. u32 ihcmd;
  77. u32 ihc_sensorid;
  78. u32 ihc_param[4];
  79. u32 reserved2[4];
  80. u32 isp_sensor_id;
  81. u32 isp_param[2];
  82. u32 reserved3[1];
  83. u32 scc_sensor_id;
  84. u32 scc_param[2];
  85. u32 reserved4[1];
  86. u32 dnr_sensor_id;
  87. u32 dnr_param[2];
  88. u32 reserved5[1];
  89. u32 scp_sensor_id;
  90. u32 scp_param[2];
  91. u32 reserved6[29];
  92. } __packed;
  93. struct is_mcuctl_reg {
  94. u32 mcuctl;
  95. u32 bboar;
  96. u32 intgr0;
  97. u32 intcr0;
  98. u32 intmr0;
  99. u32 intsr0;
  100. u32 intmsr0;
  101. u32 intgr1;
  102. u32 intcr1;
  103. u32 intmr1;
  104. u32 intsr1;
  105. u32 intmsr1;
  106. u32 intcr2;
  107. u32 intmr2;
  108. u32 intsr2;
  109. u32 intmsr2;
  110. u32 gpoctrl;
  111. u32 cpoenctlr;
  112. u32 gpictlr;
  113. u32 reserved[0xd];
  114. struct is_common_regs common;
  115. } __packed;
  116. #endif /* FIMC_IS_CMD_H_ */