ispresizer.c 54 KB

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  1. /*
  2. * ispresizer.c
  3. *
  4. * TI OMAP3 ISP - Resizer module
  5. *
  6. * Copyright (C) 2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/device.h>
  17. #include <linux/mm.h>
  18. #include <linux/module.h>
  19. #include "isp.h"
  20. #include "ispreg.h"
  21. #include "ispresizer.h"
  22. /*
  23. * Resizer Constants
  24. */
  25. #define MIN_RESIZE_VALUE 64
  26. #define MID_RESIZE_VALUE 512
  27. #define MAX_RESIZE_VALUE 1024
  28. #define MIN_IN_WIDTH 32
  29. #define MIN_IN_HEIGHT 32
  30. #define MAX_IN_WIDTH_MEMORY_MODE 4095
  31. #define MAX_IN_WIDTH_ONTHEFLY_MODE_ES1 1280
  32. #define MAX_IN_WIDTH_ONTHEFLY_MODE_ES2 4095
  33. #define MAX_IN_HEIGHT 4095
  34. #define MIN_OUT_WIDTH 16
  35. #define MIN_OUT_HEIGHT 2
  36. #define MAX_OUT_HEIGHT 4095
  37. /*
  38. * Resizer Use Constraints
  39. * "TRM ES3.1, table 12-46"
  40. */
  41. #define MAX_4TAP_OUT_WIDTH_ES1 1280
  42. #define MAX_7TAP_OUT_WIDTH_ES1 640
  43. #define MAX_4TAP_OUT_WIDTH_ES2 3312
  44. #define MAX_7TAP_OUT_WIDTH_ES2 1650
  45. #define MAX_4TAP_OUT_WIDTH_3630 4096
  46. #define MAX_7TAP_OUT_WIDTH_3630 2048
  47. /*
  48. * Constants for ratio calculation
  49. */
  50. #define RESIZE_DIVISOR 256
  51. #define DEFAULT_PHASE 1
  52. /*
  53. * Default (and only) configuration of filter coefficients.
  54. * 7-tap mode is for scale factors 0.25x to 0.5x.
  55. * 4-tap mode is for scale factors 0.5x to 4.0x.
  56. * There shouldn't be any reason to recalculate these, EVER.
  57. */
  58. static const struct isprsz_coef filter_coefs = {
  59. /* For 8-phase 4-tap horizontal filter: */
  60. {
  61. 0x0000, 0x0100, 0x0000, 0x0000,
  62. 0x03FA, 0x00F6, 0x0010, 0x0000,
  63. 0x03F9, 0x00DB, 0x002C, 0x0000,
  64. 0x03FB, 0x00B3, 0x0053, 0x03FF,
  65. 0x03FD, 0x0082, 0x0084, 0x03FD,
  66. 0x03FF, 0x0053, 0x00B3, 0x03FB,
  67. 0x0000, 0x002C, 0x00DB, 0x03F9,
  68. 0x0000, 0x0010, 0x00F6, 0x03FA
  69. },
  70. /* For 8-phase 4-tap vertical filter: */
  71. {
  72. 0x0000, 0x0100, 0x0000, 0x0000,
  73. 0x03FA, 0x00F6, 0x0010, 0x0000,
  74. 0x03F9, 0x00DB, 0x002C, 0x0000,
  75. 0x03FB, 0x00B3, 0x0053, 0x03FF,
  76. 0x03FD, 0x0082, 0x0084, 0x03FD,
  77. 0x03FF, 0x0053, 0x00B3, 0x03FB,
  78. 0x0000, 0x002C, 0x00DB, 0x03F9,
  79. 0x0000, 0x0010, 0x00F6, 0x03FA
  80. },
  81. /* For 4-phase 7-tap horizontal filter: */
  82. #define DUMMY 0
  83. {
  84. 0x0004, 0x0023, 0x005A, 0x0058, 0x0023, 0x0004, 0x0000, DUMMY,
  85. 0x0002, 0x0018, 0x004d, 0x0060, 0x0031, 0x0008, 0x0000, DUMMY,
  86. 0x0001, 0x000f, 0x003f, 0x0062, 0x003f, 0x000f, 0x0001, DUMMY,
  87. 0x0000, 0x0008, 0x0031, 0x0060, 0x004d, 0x0018, 0x0002, DUMMY
  88. },
  89. /* For 4-phase 7-tap vertical filter: */
  90. {
  91. 0x0004, 0x0023, 0x005A, 0x0058, 0x0023, 0x0004, 0x0000, DUMMY,
  92. 0x0002, 0x0018, 0x004d, 0x0060, 0x0031, 0x0008, 0x0000, DUMMY,
  93. 0x0001, 0x000f, 0x003f, 0x0062, 0x003f, 0x000f, 0x0001, DUMMY,
  94. 0x0000, 0x0008, 0x0031, 0x0060, 0x004d, 0x0018, 0x0002, DUMMY
  95. }
  96. /*
  97. * The dummy padding is required in 7-tap mode because of how the
  98. * registers are arranged physically.
  99. */
  100. #undef DUMMY
  101. };
  102. /*
  103. * __resizer_get_format - helper function for getting resizer format
  104. * @res : pointer to resizer private structure
  105. * @pad : pad number
  106. * @cfg: V4L2 subdev pad configuration
  107. * @which : wanted subdev format
  108. * return zero
  109. */
  110. static struct v4l2_mbus_framefmt *
  111. __resizer_get_format(struct isp_res_device *res, struct v4l2_subdev_pad_config *cfg,
  112. unsigned int pad, enum v4l2_subdev_format_whence which)
  113. {
  114. if (which == V4L2_SUBDEV_FORMAT_TRY)
  115. return v4l2_subdev_get_try_format(&res->subdev, cfg, pad);
  116. else
  117. return &res->formats[pad];
  118. }
  119. /*
  120. * __resizer_get_crop - helper function for getting resizer crop rectangle
  121. * @res : pointer to resizer private structure
  122. * @cfg: V4L2 subdev pad configuration
  123. * @which : wanted subdev crop rectangle
  124. */
  125. static struct v4l2_rect *
  126. __resizer_get_crop(struct isp_res_device *res, struct v4l2_subdev_pad_config *cfg,
  127. enum v4l2_subdev_format_whence which)
  128. {
  129. if (which == V4L2_SUBDEV_FORMAT_TRY)
  130. return v4l2_subdev_get_try_crop(&res->subdev, cfg, RESZ_PAD_SINK);
  131. else
  132. return &res->crop.request;
  133. }
  134. /*
  135. * resizer_set_filters - Set resizer filters
  136. * @res: Device context.
  137. * @h_coeff: horizontal coefficient
  138. * @v_coeff: vertical coefficient
  139. * Return none
  140. */
  141. static void resizer_set_filters(struct isp_res_device *res, const u16 *h_coeff,
  142. const u16 *v_coeff)
  143. {
  144. struct isp_device *isp = to_isp_device(res);
  145. u32 startaddr_h, startaddr_v, tmp_h, tmp_v;
  146. int i;
  147. startaddr_h = ISPRSZ_HFILT10;
  148. startaddr_v = ISPRSZ_VFILT10;
  149. for (i = 0; i < COEFF_CNT; i += 2) {
  150. tmp_h = h_coeff[i] |
  151. (h_coeff[i + 1] << ISPRSZ_HFILT_COEF1_SHIFT);
  152. tmp_v = v_coeff[i] |
  153. (v_coeff[i + 1] << ISPRSZ_VFILT_COEF1_SHIFT);
  154. isp_reg_writel(isp, tmp_h, OMAP3_ISP_IOMEM_RESZ, startaddr_h);
  155. isp_reg_writel(isp, tmp_v, OMAP3_ISP_IOMEM_RESZ, startaddr_v);
  156. startaddr_h += 4;
  157. startaddr_v += 4;
  158. }
  159. }
  160. /*
  161. * resizer_set_bilinear - Chrominance horizontal algorithm select
  162. * @res: Device context.
  163. * @type: Filtering interpolation type.
  164. *
  165. * Filtering that is same as luminance processing is
  166. * intended only for downsampling, and bilinear interpolation
  167. * is intended only for upsampling.
  168. */
  169. static void resizer_set_bilinear(struct isp_res_device *res,
  170. enum resizer_chroma_algo type)
  171. {
  172. struct isp_device *isp = to_isp_device(res);
  173. if (type == RSZ_BILINEAR)
  174. isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  175. ISPRSZ_CNT_CBILIN);
  176. else
  177. isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  178. ISPRSZ_CNT_CBILIN);
  179. }
  180. /*
  181. * resizer_set_ycpos - Luminance and chrominance order
  182. * @res: Device context.
  183. * @pixelcode: pixel code.
  184. */
  185. static void resizer_set_ycpos(struct isp_res_device *res, u32 pixelcode)
  186. {
  187. struct isp_device *isp = to_isp_device(res);
  188. switch (pixelcode) {
  189. case MEDIA_BUS_FMT_YUYV8_1X16:
  190. isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  191. ISPRSZ_CNT_YCPOS);
  192. break;
  193. case MEDIA_BUS_FMT_UYVY8_1X16:
  194. isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  195. ISPRSZ_CNT_YCPOS);
  196. break;
  197. default:
  198. return;
  199. }
  200. }
  201. /*
  202. * resizer_set_phase - Setup horizontal and vertical starting phase
  203. * @res: Device context.
  204. * @h_phase: horizontal phase parameters.
  205. * @v_phase: vertical phase parameters.
  206. *
  207. * Horizontal and vertical phase range is 0 to 7
  208. */
  209. static void resizer_set_phase(struct isp_res_device *res, u32 h_phase,
  210. u32 v_phase)
  211. {
  212. struct isp_device *isp = to_isp_device(res);
  213. u32 rgval;
  214. rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) &
  215. ~(ISPRSZ_CNT_HSTPH_MASK | ISPRSZ_CNT_VSTPH_MASK);
  216. rgval |= (h_phase << ISPRSZ_CNT_HSTPH_SHIFT) & ISPRSZ_CNT_HSTPH_MASK;
  217. rgval |= (v_phase << ISPRSZ_CNT_VSTPH_SHIFT) & ISPRSZ_CNT_VSTPH_MASK;
  218. isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT);
  219. }
  220. /*
  221. * resizer_set_luma - Setup luminance enhancer parameters
  222. * @res: Device context.
  223. * @luma: Structure for luminance enhancer parameters.
  224. *
  225. * Algorithm select:
  226. * 0x0: Disable
  227. * 0x1: [-1 2 -1]/2 high-pass filter
  228. * 0x2: [-1 -2 6 -2 -1]/4 high-pass filter
  229. *
  230. * Maximum gain:
  231. * The data is coded in U4Q4 representation.
  232. *
  233. * Slope:
  234. * The data is coded in U4Q4 representation.
  235. *
  236. * Coring offset:
  237. * The data is coded in U8Q0 representation.
  238. *
  239. * The new luminance value is computed as:
  240. * Y += HPF(Y) x max(GAIN, (HPF(Y) - CORE) x SLOP + 8) >> 4.
  241. */
  242. static void resizer_set_luma(struct isp_res_device *res,
  243. struct resizer_luma_yenh *luma)
  244. {
  245. struct isp_device *isp = to_isp_device(res);
  246. u32 rgval;
  247. rgval = (luma->algo << ISPRSZ_YENH_ALGO_SHIFT)
  248. & ISPRSZ_YENH_ALGO_MASK;
  249. rgval |= (luma->gain << ISPRSZ_YENH_GAIN_SHIFT)
  250. & ISPRSZ_YENH_GAIN_MASK;
  251. rgval |= (luma->slope << ISPRSZ_YENH_SLOP_SHIFT)
  252. & ISPRSZ_YENH_SLOP_MASK;
  253. rgval |= (luma->core << ISPRSZ_YENH_CORE_SHIFT)
  254. & ISPRSZ_YENH_CORE_MASK;
  255. isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_YENH);
  256. }
  257. /*
  258. * resizer_set_source - Input source select
  259. * @res: Device context.
  260. * @source: Input source type
  261. *
  262. * If this field is set to RESIZER_INPUT_VP, the resizer input is fed from
  263. * Preview/CCDC engine, otherwise from memory.
  264. */
  265. static void resizer_set_source(struct isp_res_device *res,
  266. enum resizer_input_entity source)
  267. {
  268. struct isp_device *isp = to_isp_device(res);
  269. if (source == RESIZER_INPUT_MEMORY)
  270. isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  271. ISPRSZ_CNT_INPSRC);
  272. else
  273. isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  274. ISPRSZ_CNT_INPSRC);
  275. }
  276. /*
  277. * resizer_set_ratio - Setup horizontal and vertical resizing value
  278. * @res: Device context.
  279. * @ratio: Structure for ratio parameters.
  280. *
  281. * Resizing range from 64 to 1024
  282. */
  283. static void resizer_set_ratio(struct isp_res_device *res,
  284. const struct resizer_ratio *ratio)
  285. {
  286. struct isp_device *isp = to_isp_device(res);
  287. const u16 *h_filter, *v_filter;
  288. u32 rgval;
  289. rgval = isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT) &
  290. ~(ISPRSZ_CNT_HRSZ_MASK | ISPRSZ_CNT_VRSZ_MASK);
  291. rgval |= ((ratio->horz - 1) << ISPRSZ_CNT_HRSZ_SHIFT)
  292. & ISPRSZ_CNT_HRSZ_MASK;
  293. rgval |= ((ratio->vert - 1) << ISPRSZ_CNT_VRSZ_SHIFT)
  294. & ISPRSZ_CNT_VRSZ_MASK;
  295. isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT);
  296. /* prepare horizontal filter coefficients */
  297. if (ratio->horz > MID_RESIZE_VALUE)
  298. h_filter = &filter_coefs.h_filter_coef_7tap[0];
  299. else
  300. h_filter = &filter_coefs.h_filter_coef_4tap[0];
  301. /* prepare vertical filter coefficients */
  302. if (ratio->vert > MID_RESIZE_VALUE)
  303. v_filter = &filter_coefs.v_filter_coef_7tap[0];
  304. else
  305. v_filter = &filter_coefs.v_filter_coef_4tap[0];
  306. resizer_set_filters(res, h_filter, v_filter);
  307. }
  308. /*
  309. * resizer_set_dst_size - Setup the output height and width
  310. * @res: Device context.
  311. * @width: Output width.
  312. * @height: Output height.
  313. *
  314. * Width :
  315. * The value must be EVEN.
  316. *
  317. * Height:
  318. * The number of bytes written to SDRAM must be
  319. * a multiple of 16-bytes if the vertical resizing factor
  320. * is greater than 1x (upsizing)
  321. */
  322. static void resizer_set_output_size(struct isp_res_device *res,
  323. u32 width, u32 height)
  324. {
  325. struct isp_device *isp = to_isp_device(res);
  326. u32 rgval;
  327. rgval = (width << ISPRSZ_OUT_SIZE_HORZ_SHIFT)
  328. & ISPRSZ_OUT_SIZE_HORZ_MASK;
  329. rgval |= (height << ISPRSZ_OUT_SIZE_VERT_SHIFT)
  330. & ISPRSZ_OUT_SIZE_VERT_MASK;
  331. isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_OUT_SIZE);
  332. }
  333. /*
  334. * resizer_set_output_offset - Setup memory offset for the output lines.
  335. * @res: Device context.
  336. * @offset: Memory offset.
  337. *
  338. * The 5 LSBs are forced to be zeros by the hardware to align on a 32-byte
  339. * boundary; the 5 LSBs are read-only. For optimal use of SDRAM bandwidth,
  340. * the SDRAM line offset must be set on a 256-byte boundary
  341. */
  342. static void resizer_set_output_offset(struct isp_res_device *res, u32 offset)
  343. {
  344. struct isp_device *isp = to_isp_device(res);
  345. isp_reg_writel(isp, offset, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_OUTOFF);
  346. }
  347. /*
  348. * resizer_set_start - Setup vertical and horizontal start position
  349. * @res: Device context.
  350. * @left: Horizontal start position.
  351. * @top: Vertical start position.
  352. *
  353. * Vertical start line:
  354. * This field makes sense only when the resizer obtains its input
  355. * from the preview engine/CCDC
  356. *
  357. * Horizontal start pixel:
  358. * Pixels are coded on 16 bits for YUV and 8 bits for color separate data.
  359. * When the resizer gets its input from SDRAM, this field must be set
  360. * to <= 15 for YUV 16-bit data and <= 31 for 8-bit color separate data
  361. */
  362. static void resizer_set_start(struct isp_res_device *res, u32 left, u32 top)
  363. {
  364. struct isp_device *isp = to_isp_device(res);
  365. u32 rgval;
  366. rgval = (left << ISPRSZ_IN_START_HORZ_ST_SHIFT)
  367. & ISPRSZ_IN_START_HORZ_ST_MASK;
  368. rgval |= (top << ISPRSZ_IN_START_VERT_ST_SHIFT)
  369. & ISPRSZ_IN_START_VERT_ST_MASK;
  370. isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_IN_START);
  371. }
  372. /*
  373. * resizer_set_input_size - Setup the input size
  374. * @res: Device context.
  375. * @width: The range is 0 to 4095 pixels
  376. * @height: The range is 0 to 4095 lines
  377. */
  378. static void resizer_set_input_size(struct isp_res_device *res,
  379. u32 width, u32 height)
  380. {
  381. struct isp_device *isp = to_isp_device(res);
  382. u32 rgval;
  383. rgval = (width << ISPRSZ_IN_SIZE_HORZ_SHIFT)
  384. & ISPRSZ_IN_SIZE_HORZ_MASK;
  385. rgval |= (height << ISPRSZ_IN_SIZE_VERT_SHIFT)
  386. & ISPRSZ_IN_SIZE_VERT_MASK;
  387. isp_reg_writel(isp, rgval, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_IN_SIZE);
  388. }
  389. /*
  390. * resizer_set_src_offs - Setup the memory offset for the input lines
  391. * @res: Device context.
  392. * @offset: Memory offset.
  393. *
  394. * The 5 LSBs are forced to be zeros by the hardware to align on a 32-byte
  395. * boundary; the 5 LSBs are read-only. This field must be programmed to be
  396. * 0x0 if the resizer input is from preview engine/CCDC.
  397. */
  398. static void resizer_set_input_offset(struct isp_res_device *res, u32 offset)
  399. {
  400. struct isp_device *isp = to_isp_device(res);
  401. isp_reg_writel(isp, offset, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_INOFF);
  402. }
  403. /*
  404. * resizer_set_intype - Input type select
  405. * @res: Device context.
  406. * @type: Pixel format type.
  407. */
  408. static void resizer_set_intype(struct isp_res_device *res,
  409. enum resizer_colors_type type)
  410. {
  411. struct isp_device *isp = to_isp_device(res);
  412. if (type == RSZ_COLOR8)
  413. isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  414. ISPRSZ_CNT_INPTYP);
  415. else
  416. isp_reg_clr(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_CNT,
  417. ISPRSZ_CNT_INPTYP);
  418. }
  419. /*
  420. * __resizer_set_inaddr - Helper function for set input address
  421. * @res : pointer to resizer private data structure
  422. * @addr: input address
  423. * return none
  424. */
  425. static void __resizer_set_inaddr(struct isp_res_device *res, u32 addr)
  426. {
  427. struct isp_device *isp = to_isp_device(res);
  428. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_INADD);
  429. }
  430. /*
  431. * The data rate at the horizontal resizer output must not exceed half the
  432. * functional clock or 100 MP/s, whichever is lower. According to the TRM
  433. * there's no similar requirement for the vertical resizer output. However
  434. * experience showed that vertical upscaling by 4 leads to SBL overflows (with
  435. * data rates at the resizer output exceeding 300 MP/s). Limiting the resizer
  436. * output data rate to the functional clock or 200 MP/s, whichever is lower,
  437. * seems to get rid of SBL overflows.
  438. *
  439. * The maximum data rate at the output of the horizontal resizer can thus be
  440. * computed with
  441. *
  442. * max intermediate rate <= L3 clock * input height / output height
  443. * max intermediate rate <= L3 clock / 2
  444. *
  445. * The maximum data rate at the resizer input is then
  446. *
  447. * max input rate <= max intermediate rate * input width / output width
  448. *
  449. * where the input width and height are the resizer input crop rectangle size.
  450. * The TRM doesn't clearly explain if that's a maximum instant data rate or a
  451. * maximum average data rate.
  452. */
  453. void omap3isp_resizer_max_rate(struct isp_res_device *res,
  454. unsigned int *max_rate)
  455. {
  456. struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);
  457. const struct v4l2_mbus_framefmt *ofmt = &res->formats[RESZ_PAD_SOURCE];
  458. unsigned long limit = min(pipe->l3_ick, 200000000UL);
  459. unsigned long clock;
  460. clock = div_u64((u64)limit * res->crop.active.height, ofmt->height);
  461. clock = min(clock, limit / 2);
  462. *max_rate = div_u64((u64)clock * res->crop.active.width, ofmt->width);
  463. }
  464. /*
  465. * When the resizer processes images from memory, the driver must slow down read
  466. * requests on the input to at least comply with the internal data rate
  467. * requirements. If the application real-time requirements can cope with slower
  468. * processing, the resizer can be slowed down even more to put less pressure on
  469. * the overall system.
  470. *
  471. * When the resizer processes images on the fly (either from the CCDC or the
  472. * preview module), the same data rate requirements apply but they can't be
  473. * enforced at the resizer level. The image input module (sensor, CCP2 or
  474. * preview module) must not provide image data faster than the resizer can
  475. * process.
  476. *
  477. * For live image pipelines, the data rate is set by the frame format, size and
  478. * rate. The sensor output frame rate must not exceed the maximum resizer data
  479. * rate.
  480. *
  481. * The resizer slows down read requests by inserting wait cycles in the SBL
  482. * requests. The maximum number of 256-byte requests per second can be computed
  483. * as (the data rate is multiplied by 2 to convert from pixels per second to
  484. * bytes per second)
  485. *
  486. * request per second = data rate * 2 / 256
  487. * cycles per request = cycles per second / requests per second
  488. *
  489. * The number of cycles per second is controlled by the L3 clock, leading to
  490. *
  491. * cycles per request = L3 frequency / 2 * 256 / data rate
  492. */
  493. static void resizer_adjust_bandwidth(struct isp_res_device *res)
  494. {
  495. struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);
  496. struct isp_device *isp = to_isp_device(res);
  497. unsigned long l3_ick = pipe->l3_ick;
  498. struct v4l2_fract *timeperframe;
  499. unsigned int cycles_per_frame;
  500. unsigned int requests_per_frame;
  501. unsigned int cycles_per_request;
  502. unsigned int granularity;
  503. unsigned int minimum;
  504. unsigned int maximum;
  505. unsigned int value;
  506. if (res->input != RESIZER_INPUT_MEMORY) {
  507. isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
  508. ISPSBL_SDR_REQ_RSZ_EXP_MASK);
  509. return;
  510. }
  511. switch (isp->revision) {
  512. case ISP_REVISION_1_0:
  513. case ISP_REVISION_2_0:
  514. default:
  515. granularity = 1024;
  516. break;
  517. case ISP_REVISION_15_0:
  518. granularity = 32;
  519. break;
  520. }
  521. /* Compute the minimum number of cycles per request, based on the
  522. * pipeline maximum data rate. This is an absolute lower bound if we
  523. * don't want SBL overflows, so round the value up.
  524. */
  525. cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,
  526. pipe->max_rate);
  527. minimum = DIV_ROUND_UP(cycles_per_request, granularity);
  528. /* Compute the maximum number of cycles per request, based on the
  529. * requested frame rate. This is a soft upper bound to achieve a frame
  530. * rate equal or higher than the requested value, so round the value
  531. * down.
  532. */
  533. timeperframe = &pipe->max_timeperframe;
  534. requests_per_frame = DIV_ROUND_UP(res->crop.active.width * 2, 256)
  535. * res->crop.active.height;
  536. cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator,
  537. timeperframe->denominator);
  538. cycles_per_request = cycles_per_frame / requests_per_frame;
  539. maximum = cycles_per_request / granularity;
  540. value = max(minimum, maximum);
  541. dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value);
  542. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
  543. ISPSBL_SDR_REQ_RSZ_EXP_MASK,
  544. value << ISPSBL_SDR_REQ_RSZ_EXP_SHIFT);
  545. }
  546. /*
  547. * omap3isp_resizer_busy - Checks if ISP resizer is busy.
  548. *
  549. * Returns busy field from ISPRSZ_PCR register.
  550. */
  551. int omap3isp_resizer_busy(struct isp_res_device *res)
  552. {
  553. struct isp_device *isp = to_isp_device(res);
  554. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_PCR) &
  555. ISPRSZ_PCR_BUSY;
  556. }
  557. /*
  558. * resizer_set_inaddr - Sets the memory address of the input frame.
  559. * @addr: 32bit memory address aligned on 32byte boundary.
  560. */
  561. static void resizer_set_inaddr(struct isp_res_device *res, u32 addr)
  562. {
  563. res->addr_base = addr;
  564. /* This will handle crop settings in stream off state */
  565. if (res->crop_offset)
  566. addr += res->crop_offset & ~0x1f;
  567. __resizer_set_inaddr(res, addr);
  568. }
  569. /*
  570. * Configures the memory address to which the output frame is written.
  571. * @addr: 32bit memory address aligned on 32byte boundary.
  572. * Note: For SBL efficiency reasons the address should be on a 256-byte
  573. * boundary.
  574. */
  575. static void resizer_set_outaddr(struct isp_res_device *res, u32 addr)
  576. {
  577. struct isp_device *isp = to_isp_device(res);
  578. /*
  579. * Set output address. This needs to be in its own function
  580. * because it changes often.
  581. */
  582. isp_reg_writel(isp, addr << ISPRSZ_SDR_OUTADD_ADDR_SHIFT,
  583. OMAP3_ISP_IOMEM_RESZ, ISPRSZ_SDR_OUTADD);
  584. }
  585. /*
  586. * resizer_print_status - Prints the values of the resizer module registers.
  587. */
  588. #define RSZ_PRINT_REGISTER(isp, name)\
  589. dev_dbg(isp->dev, "###RSZ " #name "=0x%08x\n", \
  590. isp_reg_readl(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_##name))
  591. static void resizer_print_status(struct isp_res_device *res)
  592. {
  593. struct isp_device *isp = to_isp_device(res);
  594. dev_dbg(isp->dev, "-------------Resizer Register dump----------\n");
  595. RSZ_PRINT_REGISTER(isp, PCR);
  596. RSZ_PRINT_REGISTER(isp, CNT);
  597. RSZ_PRINT_REGISTER(isp, OUT_SIZE);
  598. RSZ_PRINT_REGISTER(isp, IN_START);
  599. RSZ_PRINT_REGISTER(isp, IN_SIZE);
  600. RSZ_PRINT_REGISTER(isp, SDR_INADD);
  601. RSZ_PRINT_REGISTER(isp, SDR_INOFF);
  602. RSZ_PRINT_REGISTER(isp, SDR_OUTADD);
  603. RSZ_PRINT_REGISTER(isp, SDR_OUTOFF);
  604. RSZ_PRINT_REGISTER(isp, YENH);
  605. dev_dbg(isp->dev, "--------------------------------------------\n");
  606. }
  607. /*
  608. * resizer_calc_ratios - Helper function for calculating resizer ratios
  609. * @res: pointer to resizer private data structure
  610. * @input: input frame size
  611. * @output: output frame size
  612. * @ratio : return calculated ratios
  613. * return none
  614. *
  615. * The resizer uses a polyphase sample rate converter. The upsampling filter
  616. * has a fixed number of phases that depend on the resizing ratio. As the ratio
  617. * computation depends on the number of phases, we need to compute a first
  618. * approximation and then refine it.
  619. *
  620. * The input/output/ratio relationship is given by the OMAP34xx TRM:
  621. *
  622. * - 8-phase, 4-tap mode (RSZ = 64 ~ 512)
  623. * iw = (32 * sph + (ow - 1) * hrsz + 16) >> 8 + 7
  624. * ih = (32 * spv + (oh - 1) * vrsz + 16) >> 8 + 4
  625. * - 4-phase, 7-tap mode (RSZ = 513 ~ 1024)
  626. * iw = (64 * sph + (ow - 1) * hrsz + 32) >> 8 + 7
  627. * ih = (64 * spv + (oh - 1) * vrsz + 32) >> 8 + 7
  628. *
  629. * iw and ih are the input width and height after cropping. Those equations need
  630. * to be satisfied exactly for the resizer to work correctly.
  631. *
  632. * The equations can't be easily reverted, as the >> 8 operation is not linear.
  633. * In addition, not all input sizes can be achieved for a given output size. To
  634. * get the highest input size lower than or equal to the requested input size,
  635. * we need to compute the highest resizing ratio that satisfies the following
  636. * inequality (taking the 4-tap mode width equation as an example)
  637. *
  638. * iw >= (32 * sph + (ow - 1) * hrsz + 16) >> 8 - 7
  639. *
  640. * (where iw is the requested input width) which can be rewritten as
  641. *
  642. * iw - 7 >= (32 * sph + (ow - 1) * hrsz + 16) >> 8
  643. * (iw - 7) << 8 >= 32 * sph + (ow - 1) * hrsz + 16 - b
  644. * ((iw - 7) << 8) + b >= 32 * sph + (ow - 1) * hrsz + 16
  645. *
  646. * where b is the value of the 8 least significant bits of the right hand side
  647. * expression of the last inequality. The highest resizing ratio value will be
  648. * achieved when b is equal to its maximum value of 255. That resizing ratio
  649. * value will still satisfy the original inequality, as b will disappear when
  650. * the expression will be shifted right by 8.
  651. *
  652. * The reverted equations thus become
  653. *
  654. * - 8-phase, 4-tap mode
  655. * hrsz = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / (ow - 1)
  656. * vrsz = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / (oh - 1)
  657. * - 4-phase, 7-tap mode
  658. * hrsz = ((iw - 7) * 256 + 255 - 32 - 64 * sph) / (ow - 1)
  659. * vrsz = ((ih - 7) * 256 + 255 - 32 - 64 * spv) / (oh - 1)
  660. *
  661. * The ratios are integer values, and are rounded down to ensure that the
  662. * cropped input size is not bigger than the uncropped input size.
  663. *
  664. * As the number of phases/taps, used to select the correct equations to compute
  665. * the ratio, depends on the ratio, we start with the 4-tap mode equations to
  666. * compute an approximation of the ratio, and switch to the 7-tap mode equations
  667. * if the approximation is higher than the ratio threshold.
  668. *
  669. * As the 7-tap mode equations will return a ratio smaller than or equal to the
  670. * 4-tap mode equations, the resulting ratio could become lower than or equal to
  671. * the ratio threshold. This 'equations loop' isn't an issue as long as the
  672. * correct equations are used to compute the final input size. Starting with the
  673. * 4-tap mode equations ensure that, in case of values resulting in a 'ratio
  674. * loop', the smallest of the ratio values will be used, never exceeding the
  675. * requested input size.
  676. *
  677. * We first clamp the output size according to the hardware capability to avoid
  678. * auto-cropping the input more than required to satisfy the TRM equations. The
  679. * minimum output size is achieved with a scaling factor of 1024. It is thus
  680. * computed using the 7-tap equations.
  681. *
  682. * min ow = ((iw - 7) * 256 - 32 - 64 * sph) / 1024 + 1
  683. * min oh = ((ih - 7) * 256 - 32 - 64 * spv) / 1024 + 1
  684. *
  685. * Similarly, the maximum output size is achieved with a scaling factor of 64
  686. * and computed using the 4-tap equations.
  687. *
  688. * max ow = ((iw - 7) * 256 + 255 - 16 - 32 * sph) / 64 + 1
  689. * max oh = ((ih - 4) * 256 + 255 - 16 - 32 * spv) / 64 + 1
  690. *
  691. * The additional +255 term compensates for the round down operation performed
  692. * by the TRM equations when shifting the value right by 8 bits.
  693. *
  694. * We then compute and clamp the ratios (x1/4 ~ x4). Clamping the output size to
  695. * the maximum value guarantees that the ratio value will never be smaller than
  696. * the minimum, but it could still slightly exceed the maximum. Clamping the
  697. * ratio will thus result in a resizing factor slightly larger than the
  698. * requested value.
  699. *
  700. * To accommodate that, and make sure the TRM equations are satisfied exactly, we
  701. * compute the input crop rectangle as the last step.
  702. *
  703. * As if the situation wasn't complex enough, the maximum output width depends
  704. * on the vertical resizing ratio. Fortunately, the output height doesn't
  705. * depend on the horizontal resizing ratio. We can then start by computing the
  706. * output height and the vertical ratio, and then move to computing the output
  707. * width and the horizontal ratio.
  708. */
  709. static void resizer_calc_ratios(struct isp_res_device *res,
  710. struct v4l2_rect *input,
  711. struct v4l2_mbus_framefmt *output,
  712. struct resizer_ratio *ratio)
  713. {
  714. struct isp_device *isp = to_isp_device(res);
  715. const unsigned int spv = DEFAULT_PHASE;
  716. const unsigned int sph = DEFAULT_PHASE;
  717. unsigned int upscaled_width;
  718. unsigned int upscaled_height;
  719. unsigned int min_width;
  720. unsigned int min_height;
  721. unsigned int max_width;
  722. unsigned int max_height;
  723. unsigned int width_alignment;
  724. unsigned int width;
  725. unsigned int height;
  726. /*
  727. * Clamp the output height based on the hardware capabilities and
  728. * compute the vertical resizing ratio.
  729. */
  730. min_height = ((input->height - 7) * 256 - 32 - 64 * spv) / 1024 + 1;
  731. min_height = max_t(unsigned int, min_height, MIN_OUT_HEIGHT);
  732. max_height = ((input->height - 4) * 256 + 255 - 16 - 32 * spv) / 64 + 1;
  733. max_height = min_t(unsigned int, max_height, MAX_OUT_HEIGHT);
  734. output->height = clamp(output->height, min_height, max_height);
  735. ratio->vert = ((input->height - 4) * 256 + 255 - 16 - 32 * spv)
  736. / (output->height - 1);
  737. if (ratio->vert > MID_RESIZE_VALUE)
  738. ratio->vert = ((input->height - 7) * 256 + 255 - 32 - 64 * spv)
  739. / (output->height - 1);
  740. ratio->vert = clamp_t(unsigned int, ratio->vert,
  741. MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
  742. if (ratio->vert <= MID_RESIZE_VALUE) {
  743. upscaled_height = (output->height - 1) * ratio->vert
  744. + 32 * spv + 16;
  745. height = (upscaled_height >> 8) + 4;
  746. } else {
  747. upscaled_height = (output->height - 1) * ratio->vert
  748. + 64 * spv + 32;
  749. height = (upscaled_height >> 8) + 7;
  750. }
  751. /*
  752. * Compute the minimum and maximum output widths based on the hardware
  753. * capabilities. The maximum depends on the vertical resizing ratio.
  754. */
  755. min_width = ((input->width - 7) * 256 - 32 - 64 * sph) / 1024 + 1;
  756. min_width = max_t(unsigned int, min_width, MIN_OUT_WIDTH);
  757. if (ratio->vert <= MID_RESIZE_VALUE) {
  758. switch (isp->revision) {
  759. case ISP_REVISION_1_0:
  760. max_width = MAX_4TAP_OUT_WIDTH_ES1;
  761. break;
  762. case ISP_REVISION_2_0:
  763. default:
  764. max_width = MAX_4TAP_OUT_WIDTH_ES2;
  765. break;
  766. case ISP_REVISION_15_0:
  767. max_width = MAX_4TAP_OUT_WIDTH_3630;
  768. break;
  769. }
  770. } else {
  771. switch (isp->revision) {
  772. case ISP_REVISION_1_0:
  773. max_width = MAX_7TAP_OUT_WIDTH_ES1;
  774. break;
  775. case ISP_REVISION_2_0:
  776. default:
  777. max_width = MAX_7TAP_OUT_WIDTH_ES2;
  778. break;
  779. case ISP_REVISION_15_0:
  780. max_width = MAX_7TAP_OUT_WIDTH_3630;
  781. break;
  782. }
  783. }
  784. max_width = min(((input->width - 7) * 256 + 255 - 16 - 32 * sph) / 64
  785. + 1, max_width);
  786. /*
  787. * The output width must be even, and must be a multiple of 16 bytes
  788. * when upscaling vertically. Clamp the output width to the valid range.
  789. * Take the alignment into account (the maximum width in 7-tap mode on
  790. * ES2 isn't a multiple of 8) and align the result up to make sure it
  791. * won't be smaller than the minimum.
  792. */
  793. width_alignment = ratio->vert < 256 ? 8 : 2;
  794. output->width = clamp(output->width, min_width,
  795. max_width & ~(width_alignment - 1));
  796. output->width = ALIGN(output->width, width_alignment);
  797. ratio->horz = ((input->width - 7) * 256 + 255 - 16 - 32 * sph)
  798. / (output->width - 1);
  799. if (ratio->horz > MID_RESIZE_VALUE)
  800. ratio->horz = ((input->width - 7) * 256 + 255 - 32 - 64 * sph)
  801. / (output->width - 1);
  802. ratio->horz = clamp_t(unsigned int, ratio->horz,
  803. MIN_RESIZE_VALUE, MAX_RESIZE_VALUE);
  804. if (ratio->horz <= MID_RESIZE_VALUE) {
  805. upscaled_width = (output->width - 1) * ratio->horz
  806. + 32 * sph + 16;
  807. width = (upscaled_width >> 8) + 7;
  808. } else {
  809. upscaled_width = (output->width - 1) * ratio->horz
  810. + 64 * sph + 32;
  811. width = (upscaled_width >> 8) + 7;
  812. }
  813. /* Center the new crop rectangle. */
  814. input->left += (input->width - width) / 2;
  815. input->top += (input->height - height) / 2;
  816. input->width = width;
  817. input->height = height;
  818. }
  819. /*
  820. * resizer_set_crop_params - Setup hardware with cropping parameters
  821. * @res : resizer private structure
  822. * @input : format on sink pad
  823. * @output : format on source pad
  824. * return none
  825. */
  826. static void resizer_set_crop_params(struct isp_res_device *res,
  827. const struct v4l2_mbus_framefmt *input,
  828. const struct v4l2_mbus_framefmt *output)
  829. {
  830. resizer_set_ratio(res, &res->ratio);
  831. /* Set chrominance horizontal algorithm */
  832. if (res->ratio.horz >= RESIZE_DIVISOR)
  833. resizer_set_bilinear(res, RSZ_THE_SAME);
  834. else
  835. resizer_set_bilinear(res, RSZ_BILINEAR);
  836. resizer_adjust_bandwidth(res);
  837. if (res->input == RESIZER_INPUT_MEMORY) {
  838. /* Calculate additional offset for crop */
  839. res->crop_offset = (res->crop.active.top * input->width +
  840. res->crop.active.left) * 2;
  841. /*
  842. * Write lowest 4 bits of horizontal pixel offset (in pixels),
  843. * vertical start must be 0.
  844. */
  845. resizer_set_start(res, (res->crop_offset / 2) & 0xf, 0);
  846. /*
  847. * Set start (read) address for cropping, in bytes.
  848. * Lowest 5 bits must be zero.
  849. */
  850. __resizer_set_inaddr(res,
  851. res->addr_base + (res->crop_offset & ~0x1f));
  852. } else {
  853. /*
  854. * Set vertical start line and horizontal starting pixel.
  855. * If the input is from CCDC/PREV, horizontal start field is
  856. * in bytes (twice number of pixels).
  857. */
  858. resizer_set_start(res, res->crop.active.left * 2,
  859. res->crop.active.top);
  860. /* Input address and offset must be 0 for preview/ccdc input */
  861. __resizer_set_inaddr(res, 0);
  862. resizer_set_input_offset(res, 0);
  863. }
  864. /* Set the input size */
  865. resizer_set_input_size(res, res->crop.active.width,
  866. res->crop.active.height);
  867. }
  868. static void resizer_configure(struct isp_res_device *res)
  869. {
  870. struct v4l2_mbus_framefmt *informat, *outformat;
  871. struct resizer_luma_yenh luma = {0, 0, 0, 0};
  872. resizer_set_source(res, res->input);
  873. informat = &res->formats[RESZ_PAD_SINK];
  874. outformat = &res->formats[RESZ_PAD_SOURCE];
  875. /* RESZ_PAD_SINK */
  876. if (res->input == RESIZER_INPUT_VP)
  877. resizer_set_input_offset(res, 0);
  878. else
  879. resizer_set_input_offset(res, ALIGN(informat->width, 0x10) * 2);
  880. /* YUV422 interleaved, default phase, no luma enhancement */
  881. resizer_set_intype(res, RSZ_YUV422);
  882. resizer_set_ycpos(res, informat->code);
  883. resizer_set_phase(res, DEFAULT_PHASE, DEFAULT_PHASE);
  884. resizer_set_luma(res, &luma);
  885. /* RESZ_PAD_SOURCE */
  886. resizer_set_output_offset(res, ALIGN(outformat->width * 2, 32));
  887. resizer_set_output_size(res, outformat->width, outformat->height);
  888. resizer_set_crop_params(res, informat, outformat);
  889. }
  890. /* -----------------------------------------------------------------------------
  891. * Interrupt handling
  892. */
  893. static void resizer_enable_oneshot(struct isp_res_device *res)
  894. {
  895. struct isp_device *isp = to_isp_device(res);
  896. isp_reg_set(isp, OMAP3_ISP_IOMEM_RESZ, ISPRSZ_PCR,
  897. ISPRSZ_PCR_ENABLE | ISPRSZ_PCR_ONESHOT);
  898. }
  899. void omap3isp_resizer_isr_frame_sync(struct isp_res_device *res)
  900. {
  901. /*
  902. * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun
  903. * condition, the module was paused and now we have a buffer queued
  904. * on the output again. Restart the pipeline if running in continuous
  905. * mode.
  906. */
  907. if (res->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
  908. res->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
  909. resizer_enable_oneshot(res);
  910. isp_video_dmaqueue_flags_clr(&res->video_out);
  911. }
  912. }
  913. static void resizer_isr_buffer(struct isp_res_device *res)
  914. {
  915. struct isp_pipeline *pipe = to_isp_pipeline(&res->subdev.entity);
  916. struct isp_buffer *buffer;
  917. int restart = 0;
  918. if (res->state == ISP_PIPELINE_STREAM_STOPPED)
  919. return;
  920. /* Complete the output buffer and, if reading from memory, the input
  921. * buffer.
  922. */
  923. buffer = omap3isp_video_buffer_next(&res->video_out);
  924. if (buffer != NULL) {
  925. resizer_set_outaddr(res, buffer->dma);
  926. restart = 1;
  927. }
  928. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  929. if (res->input == RESIZER_INPUT_MEMORY) {
  930. buffer = omap3isp_video_buffer_next(&res->video_in);
  931. if (buffer != NULL)
  932. resizer_set_inaddr(res, buffer->dma);
  933. pipe->state |= ISP_PIPELINE_IDLE_INPUT;
  934. }
  935. if (res->state == ISP_PIPELINE_STREAM_SINGLESHOT) {
  936. if (isp_pipeline_ready(pipe))
  937. omap3isp_pipeline_set_stream(pipe,
  938. ISP_PIPELINE_STREAM_SINGLESHOT);
  939. } else {
  940. /* If an underrun occurs, the video queue operation handler will
  941. * restart the resizer. Otherwise restart it immediately.
  942. */
  943. if (restart)
  944. resizer_enable_oneshot(res);
  945. }
  946. }
  947. /*
  948. * omap3isp_resizer_isr - ISP resizer interrupt handler
  949. *
  950. * Manage the resizer video buffers and configure shadowed and busy-locked
  951. * registers.
  952. */
  953. void omap3isp_resizer_isr(struct isp_res_device *res)
  954. {
  955. struct v4l2_mbus_framefmt *informat, *outformat;
  956. unsigned long flags;
  957. if (omap3isp_module_sync_is_stopping(&res->wait, &res->stopping))
  958. return;
  959. spin_lock_irqsave(&res->lock, flags);
  960. if (res->applycrop) {
  961. outformat = __resizer_get_format(res, NULL, RESZ_PAD_SOURCE,
  962. V4L2_SUBDEV_FORMAT_ACTIVE);
  963. informat = __resizer_get_format(res, NULL, RESZ_PAD_SINK,
  964. V4L2_SUBDEV_FORMAT_ACTIVE);
  965. resizer_set_crop_params(res, informat, outformat);
  966. res->applycrop = 0;
  967. }
  968. spin_unlock_irqrestore(&res->lock, flags);
  969. resizer_isr_buffer(res);
  970. }
  971. /* -----------------------------------------------------------------------------
  972. * ISP video operations
  973. */
  974. static int resizer_video_queue(struct isp_video *video,
  975. struct isp_buffer *buffer)
  976. {
  977. struct isp_res_device *res = &video->isp->isp_res;
  978. if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
  979. resizer_set_inaddr(res, buffer->dma);
  980. /*
  981. * We now have a buffer queued on the output. Despite what the
  982. * TRM says, the resizer can't be restarted immediately.
  983. * Enabling it in one shot mode in the middle of a frame (or at
  984. * least asynchronously to the frame) results in the output
  985. * being shifted randomly left/right and up/down, as if the
  986. * hardware didn't synchronize itself to the beginning of the
  987. * frame correctly.
  988. *
  989. * Restart the resizer on the next sync interrupt if running in
  990. * continuous mode or when starting the stream.
  991. */
  992. if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
  993. resizer_set_outaddr(res, buffer->dma);
  994. return 0;
  995. }
  996. static const struct isp_video_operations resizer_video_ops = {
  997. .queue = resizer_video_queue,
  998. };
  999. /* -----------------------------------------------------------------------------
  1000. * V4L2 subdev operations
  1001. */
  1002. /*
  1003. * resizer_set_stream - Enable/Disable streaming on resizer subdev
  1004. * @sd: ISP resizer V4L2 subdev
  1005. * @enable: 1 == Enable, 0 == Disable
  1006. *
  1007. * The resizer hardware can't be enabled without a memory buffer to write to.
  1008. * As the s_stream operation is called in response to a STREAMON call without
  1009. * any buffer queued yet, just update the state field and return immediately.
  1010. * The resizer will be enabled in resizer_video_queue().
  1011. */
  1012. static int resizer_set_stream(struct v4l2_subdev *sd, int enable)
  1013. {
  1014. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1015. struct isp_video *video_out = &res->video_out;
  1016. struct isp_device *isp = to_isp_device(res);
  1017. struct device *dev = to_device(res);
  1018. if (res->state == ISP_PIPELINE_STREAM_STOPPED) {
  1019. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1020. return 0;
  1021. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_RESIZER);
  1022. resizer_configure(res);
  1023. resizer_print_status(res);
  1024. }
  1025. switch (enable) {
  1026. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1027. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_WRITE);
  1028. if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
  1029. resizer_enable_oneshot(res);
  1030. isp_video_dmaqueue_flags_clr(video_out);
  1031. }
  1032. break;
  1033. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1034. if (res->input == RESIZER_INPUT_MEMORY)
  1035. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_READ);
  1036. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_RESIZER_WRITE);
  1037. resizer_enable_oneshot(res);
  1038. break;
  1039. case ISP_PIPELINE_STREAM_STOPPED:
  1040. if (omap3isp_module_sync_idle(&sd->entity, &res->wait,
  1041. &res->stopping))
  1042. dev_dbg(dev, "%s: module stop timeout.\n", sd->name);
  1043. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_RESIZER_READ |
  1044. OMAP3_ISP_SBL_RESIZER_WRITE);
  1045. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_RESIZER);
  1046. isp_video_dmaqueue_flags_clr(video_out);
  1047. break;
  1048. }
  1049. res->state = enable;
  1050. return 0;
  1051. }
  1052. /*
  1053. * resizer_try_crop - mangles crop parameters.
  1054. */
  1055. static void resizer_try_crop(const struct v4l2_mbus_framefmt *sink,
  1056. const struct v4l2_mbus_framefmt *source,
  1057. struct v4l2_rect *crop)
  1058. {
  1059. const unsigned int spv = DEFAULT_PHASE;
  1060. const unsigned int sph = DEFAULT_PHASE;
  1061. /* Crop rectangle is constrained by the output size so that zoom ratio
  1062. * cannot exceed +/-4.0.
  1063. */
  1064. unsigned int min_width =
  1065. ((32 * sph + (source->width - 1) * 64 + 16) >> 8) + 7;
  1066. unsigned int min_height =
  1067. ((32 * spv + (source->height - 1) * 64 + 16) >> 8) + 4;
  1068. unsigned int max_width =
  1069. ((64 * sph + (source->width - 1) * 1024 + 32) >> 8) + 7;
  1070. unsigned int max_height =
  1071. ((64 * spv + (source->height - 1) * 1024 + 32) >> 8) + 7;
  1072. crop->width = clamp_t(u32, crop->width, min_width, max_width);
  1073. crop->height = clamp_t(u32, crop->height, min_height, max_height);
  1074. /* Crop can not go beyond of the input rectangle */
  1075. crop->left = clamp_t(u32, crop->left, 0, sink->width - MIN_IN_WIDTH);
  1076. crop->width = clamp_t(u32, crop->width, MIN_IN_WIDTH,
  1077. sink->width - crop->left);
  1078. crop->top = clamp_t(u32, crop->top, 0, sink->height - MIN_IN_HEIGHT);
  1079. crop->height = clamp_t(u32, crop->height, MIN_IN_HEIGHT,
  1080. sink->height - crop->top);
  1081. }
  1082. /*
  1083. * resizer_get_selection - Retrieve a selection rectangle on a pad
  1084. * @sd: ISP resizer V4L2 subdevice
  1085. * @cfg: V4L2 subdev pad configuration
  1086. * @sel: Selection rectangle
  1087. *
  1088. * The only supported rectangles are the crop rectangles on the sink pad.
  1089. *
  1090. * Return 0 on success or a negative error code otherwise.
  1091. */
  1092. static int resizer_get_selection(struct v4l2_subdev *sd,
  1093. struct v4l2_subdev_pad_config *cfg,
  1094. struct v4l2_subdev_selection *sel)
  1095. {
  1096. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1097. struct v4l2_mbus_framefmt *format_source;
  1098. struct v4l2_mbus_framefmt *format_sink;
  1099. struct resizer_ratio ratio;
  1100. if (sel->pad != RESZ_PAD_SINK)
  1101. return -EINVAL;
  1102. format_sink = __resizer_get_format(res, cfg, RESZ_PAD_SINK,
  1103. sel->which);
  1104. format_source = __resizer_get_format(res, cfg, RESZ_PAD_SOURCE,
  1105. sel->which);
  1106. switch (sel->target) {
  1107. case V4L2_SEL_TGT_CROP_BOUNDS:
  1108. sel->r.left = 0;
  1109. sel->r.top = 0;
  1110. sel->r.width = INT_MAX;
  1111. sel->r.height = INT_MAX;
  1112. resizer_try_crop(format_sink, format_source, &sel->r);
  1113. resizer_calc_ratios(res, &sel->r, format_source, &ratio);
  1114. break;
  1115. case V4L2_SEL_TGT_CROP:
  1116. sel->r = *__resizer_get_crop(res, cfg, sel->which);
  1117. resizer_calc_ratios(res, &sel->r, format_source, &ratio);
  1118. break;
  1119. default:
  1120. return -EINVAL;
  1121. }
  1122. return 0;
  1123. }
  1124. /*
  1125. * resizer_set_selection - Set a selection rectangle on a pad
  1126. * @sd: ISP resizer V4L2 subdevice
  1127. * @cfg: V4L2 subdev pad configuration
  1128. * @sel: Selection rectangle
  1129. *
  1130. * The only supported rectangle is the actual crop rectangle on the sink pad.
  1131. *
  1132. * FIXME: This function currently behaves as if the KEEP_CONFIG selection flag
  1133. * was always set.
  1134. *
  1135. * Return 0 on success or a negative error code otherwise.
  1136. */
  1137. static int resizer_set_selection(struct v4l2_subdev *sd,
  1138. struct v4l2_subdev_pad_config *cfg,
  1139. struct v4l2_subdev_selection *sel)
  1140. {
  1141. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1142. struct isp_device *isp = to_isp_device(res);
  1143. const struct v4l2_mbus_framefmt *format_sink;
  1144. struct v4l2_mbus_framefmt format_source;
  1145. struct resizer_ratio ratio;
  1146. unsigned long flags;
  1147. if (sel->target != V4L2_SEL_TGT_CROP ||
  1148. sel->pad != RESZ_PAD_SINK)
  1149. return -EINVAL;
  1150. format_sink = __resizer_get_format(res, cfg, RESZ_PAD_SINK,
  1151. sel->which);
  1152. format_source = *__resizer_get_format(res, cfg, RESZ_PAD_SOURCE,
  1153. sel->which);
  1154. dev_dbg(isp->dev, "%s(%s): req %ux%u -> (%d,%d)/%ux%u -> %ux%u\n",
  1155. __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act",
  1156. format_sink->width, format_sink->height,
  1157. sel->r.left, sel->r.top, sel->r.width, sel->r.height,
  1158. format_source.width, format_source.height);
  1159. /* Clamp the crop rectangle to the bounds, and then mangle it further to
  1160. * fulfill the TRM equations. Store the clamped but otherwise unmangled
  1161. * rectangle to avoid cropping the input multiple times: when an
  1162. * application sets the output format, the current crop rectangle is
  1163. * mangled during crop rectangle computation, which would lead to a new,
  1164. * smaller input crop rectangle every time the output size is set if we
  1165. * stored the mangled rectangle.
  1166. */
  1167. resizer_try_crop(format_sink, &format_source, &sel->r);
  1168. *__resizer_get_crop(res, cfg, sel->which) = sel->r;
  1169. resizer_calc_ratios(res, &sel->r, &format_source, &ratio);
  1170. dev_dbg(isp->dev, "%s(%s): got %ux%u -> (%d,%d)/%ux%u -> %ux%u\n",
  1171. __func__, sel->which == V4L2_SUBDEV_FORMAT_TRY ? "try" : "act",
  1172. format_sink->width, format_sink->height,
  1173. sel->r.left, sel->r.top, sel->r.width, sel->r.height,
  1174. format_source.width, format_source.height);
  1175. if (sel->which == V4L2_SUBDEV_FORMAT_TRY) {
  1176. *__resizer_get_format(res, cfg, RESZ_PAD_SOURCE, sel->which) =
  1177. format_source;
  1178. return 0;
  1179. }
  1180. /* Update the source format, resizing ratios and crop rectangle. If
  1181. * streaming is on the IRQ handler will reprogram the resizer after the
  1182. * current frame. We thus we need to protect against race conditions.
  1183. */
  1184. spin_lock_irqsave(&res->lock, flags);
  1185. *__resizer_get_format(res, cfg, RESZ_PAD_SOURCE, sel->which) =
  1186. format_source;
  1187. res->ratio = ratio;
  1188. res->crop.active = sel->r;
  1189. if (res->state != ISP_PIPELINE_STREAM_STOPPED)
  1190. res->applycrop = 1;
  1191. spin_unlock_irqrestore(&res->lock, flags);
  1192. return 0;
  1193. }
  1194. /* resizer pixel formats */
  1195. static const unsigned int resizer_formats[] = {
  1196. MEDIA_BUS_FMT_UYVY8_1X16,
  1197. MEDIA_BUS_FMT_YUYV8_1X16,
  1198. };
  1199. static unsigned int resizer_max_in_width(struct isp_res_device *res)
  1200. {
  1201. struct isp_device *isp = to_isp_device(res);
  1202. if (res->input == RESIZER_INPUT_MEMORY) {
  1203. return MAX_IN_WIDTH_MEMORY_MODE;
  1204. } else {
  1205. if (isp->revision == ISP_REVISION_1_0)
  1206. return MAX_IN_WIDTH_ONTHEFLY_MODE_ES1;
  1207. else
  1208. return MAX_IN_WIDTH_ONTHEFLY_MODE_ES2;
  1209. }
  1210. }
  1211. /*
  1212. * resizer_try_format - Handle try format by pad subdev method
  1213. * @res : ISP resizer device
  1214. * @cfg: V4L2 subdev pad configuration
  1215. * @pad : pad num
  1216. * @fmt : pointer to v4l2 format structure
  1217. * @which : wanted subdev format
  1218. */
  1219. static void resizer_try_format(struct isp_res_device *res,
  1220. struct v4l2_subdev_pad_config *cfg, unsigned int pad,
  1221. struct v4l2_mbus_framefmt *fmt,
  1222. enum v4l2_subdev_format_whence which)
  1223. {
  1224. struct v4l2_mbus_framefmt *format;
  1225. struct resizer_ratio ratio;
  1226. struct v4l2_rect crop;
  1227. switch (pad) {
  1228. case RESZ_PAD_SINK:
  1229. if (fmt->code != MEDIA_BUS_FMT_YUYV8_1X16 &&
  1230. fmt->code != MEDIA_BUS_FMT_UYVY8_1X16)
  1231. fmt->code = MEDIA_BUS_FMT_YUYV8_1X16;
  1232. fmt->width = clamp_t(u32, fmt->width, MIN_IN_WIDTH,
  1233. resizer_max_in_width(res));
  1234. fmt->height = clamp_t(u32, fmt->height, MIN_IN_HEIGHT,
  1235. MAX_IN_HEIGHT);
  1236. break;
  1237. case RESZ_PAD_SOURCE:
  1238. format = __resizer_get_format(res, cfg, RESZ_PAD_SINK, which);
  1239. fmt->code = format->code;
  1240. crop = *__resizer_get_crop(res, cfg, which);
  1241. resizer_calc_ratios(res, &crop, fmt, &ratio);
  1242. break;
  1243. }
  1244. fmt->colorspace = V4L2_COLORSPACE_JPEG;
  1245. fmt->field = V4L2_FIELD_NONE;
  1246. }
  1247. /*
  1248. * resizer_enum_mbus_code - Handle pixel format enumeration
  1249. * @sd : pointer to v4l2 subdev structure
  1250. * @cfg: V4L2 subdev pad configuration
  1251. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1252. * return -EINVAL or zero on success
  1253. */
  1254. static int resizer_enum_mbus_code(struct v4l2_subdev *sd,
  1255. struct v4l2_subdev_pad_config *cfg,
  1256. struct v4l2_subdev_mbus_code_enum *code)
  1257. {
  1258. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1259. struct v4l2_mbus_framefmt *format;
  1260. if (code->pad == RESZ_PAD_SINK) {
  1261. if (code->index >= ARRAY_SIZE(resizer_formats))
  1262. return -EINVAL;
  1263. code->code = resizer_formats[code->index];
  1264. } else {
  1265. if (code->index != 0)
  1266. return -EINVAL;
  1267. format = __resizer_get_format(res, cfg, RESZ_PAD_SINK,
  1268. code->which);
  1269. code->code = format->code;
  1270. }
  1271. return 0;
  1272. }
  1273. static int resizer_enum_frame_size(struct v4l2_subdev *sd,
  1274. struct v4l2_subdev_pad_config *cfg,
  1275. struct v4l2_subdev_frame_size_enum *fse)
  1276. {
  1277. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1278. struct v4l2_mbus_framefmt format;
  1279. if (fse->index != 0)
  1280. return -EINVAL;
  1281. format.code = fse->code;
  1282. format.width = 1;
  1283. format.height = 1;
  1284. resizer_try_format(res, cfg, fse->pad, &format, fse->which);
  1285. fse->min_width = format.width;
  1286. fse->min_height = format.height;
  1287. if (format.code != fse->code)
  1288. return -EINVAL;
  1289. format.code = fse->code;
  1290. format.width = -1;
  1291. format.height = -1;
  1292. resizer_try_format(res, cfg, fse->pad, &format, fse->which);
  1293. fse->max_width = format.width;
  1294. fse->max_height = format.height;
  1295. return 0;
  1296. }
  1297. /*
  1298. * resizer_get_format - Handle get format by pads subdev method
  1299. * @sd : pointer to v4l2 subdev structure
  1300. * @cfg: V4L2 subdev pad configuration
  1301. * @fmt : pointer to v4l2 subdev format structure
  1302. * return -EINVAL or zero on success
  1303. */
  1304. static int resizer_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
  1305. struct v4l2_subdev_format *fmt)
  1306. {
  1307. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1308. struct v4l2_mbus_framefmt *format;
  1309. format = __resizer_get_format(res, cfg, fmt->pad, fmt->which);
  1310. if (format == NULL)
  1311. return -EINVAL;
  1312. fmt->format = *format;
  1313. return 0;
  1314. }
  1315. /*
  1316. * resizer_set_format - Handle set format by pads subdev method
  1317. * @sd : pointer to v4l2 subdev structure
  1318. * @cfg: V4L2 subdev pad configuration
  1319. * @fmt : pointer to v4l2 subdev format structure
  1320. * return -EINVAL or zero on success
  1321. */
  1322. static int resizer_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
  1323. struct v4l2_subdev_format *fmt)
  1324. {
  1325. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1326. struct v4l2_mbus_framefmt *format;
  1327. struct v4l2_rect *crop;
  1328. format = __resizer_get_format(res, cfg, fmt->pad, fmt->which);
  1329. if (format == NULL)
  1330. return -EINVAL;
  1331. resizer_try_format(res, cfg, fmt->pad, &fmt->format, fmt->which);
  1332. *format = fmt->format;
  1333. if (fmt->pad == RESZ_PAD_SINK) {
  1334. /* reset crop rectangle */
  1335. crop = __resizer_get_crop(res, cfg, fmt->which);
  1336. crop->left = 0;
  1337. crop->top = 0;
  1338. crop->width = fmt->format.width;
  1339. crop->height = fmt->format.height;
  1340. /* Propagate the format from sink to source */
  1341. format = __resizer_get_format(res, cfg, RESZ_PAD_SOURCE,
  1342. fmt->which);
  1343. *format = fmt->format;
  1344. resizer_try_format(res, cfg, RESZ_PAD_SOURCE, format,
  1345. fmt->which);
  1346. }
  1347. if (fmt->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  1348. /* Compute and store the active crop rectangle and resizer
  1349. * ratios. format already points to the source pad active
  1350. * format.
  1351. */
  1352. res->crop.active = res->crop.request;
  1353. resizer_calc_ratios(res, &res->crop.active, format,
  1354. &res->ratio);
  1355. }
  1356. return 0;
  1357. }
  1358. static int resizer_link_validate(struct v4l2_subdev *sd,
  1359. struct media_link *link,
  1360. struct v4l2_subdev_format *source_fmt,
  1361. struct v4l2_subdev_format *sink_fmt)
  1362. {
  1363. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1364. struct isp_pipeline *pipe = to_isp_pipeline(&sd->entity);
  1365. omap3isp_resizer_max_rate(res, &pipe->max_rate);
  1366. return v4l2_subdev_link_validate_default(sd, link,
  1367. source_fmt, sink_fmt);
  1368. }
  1369. /*
  1370. * resizer_init_formats - Initialize formats on all pads
  1371. * @sd: ISP resizer V4L2 subdevice
  1372. * @fh: V4L2 subdev file handle
  1373. *
  1374. * Initialize all pad formats with default values. If fh is not NULL, try
  1375. * formats are initialized on the file handle. Otherwise active formats are
  1376. * initialized on the device.
  1377. */
  1378. static int resizer_init_formats(struct v4l2_subdev *sd,
  1379. struct v4l2_subdev_fh *fh)
  1380. {
  1381. struct v4l2_subdev_format format;
  1382. memset(&format, 0, sizeof(format));
  1383. format.pad = RESZ_PAD_SINK;
  1384. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1385. format.format.code = MEDIA_BUS_FMT_YUYV8_1X16;
  1386. format.format.width = 4096;
  1387. format.format.height = 4096;
  1388. resizer_set_format(sd, fh ? fh->pad : NULL, &format);
  1389. return 0;
  1390. }
  1391. /* subdev video operations */
  1392. static const struct v4l2_subdev_video_ops resizer_v4l2_video_ops = {
  1393. .s_stream = resizer_set_stream,
  1394. };
  1395. /* subdev pad operations */
  1396. static const struct v4l2_subdev_pad_ops resizer_v4l2_pad_ops = {
  1397. .enum_mbus_code = resizer_enum_mbus_code,
  1398. .enum_frame_size = resizer_enum_frame_size,
  1399. .get_fmt = resizer_get_format,
  1400. .set_fmt = resizer_set_format,
  1401. .get_selection = resizer_get_selection,
  1402. .set_selection = resizer_set_selection,
  1403. .link_validate = resizer_link_validate,
  1404. };
  1405. /* subdev operations */
  1406. static const struct v4l2_subdev_ops resizer_v4l2_ops = {
  1407. .video = &resizer_v4l2_video_ops,
  1408. .pad = &resizer_v4l2_pad_ops,
  1409. };
  1410. /* subdev internal operations */
  1411. static const struct v4l2_subdev_internal_ops resizer_v4l2_internal_ops = {
  1412. .open = resizer_init_formats,
  1413. };
  1414. /* -----------------------------------------------------------------------------
  1415. * Media entity operations
  1416. */
  1417. /*
  1418. * resizer_link_setup - Setup resizer connections.
  1419. * @entity : Pointer to media entity structure
  1420. * @local : Pointer to local pad array
  1421. * @remote : Pointer to remote pad array
  1422. * @flags : Link flags
  1423. * return -EINVAL or zero on success
  1424. */
  1425. static int resizer_link_setup(struct media_entity *entity,
  1426. const struct media_pad *local,
  1427. const struct media_pad *remote, u32 flags)
  1428. {
  1429. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1430. struct isp_res_device *res = v4l2_get_subdevdata(sd);
  1431. switch (local->index | media_entity_type(remote->entity)) {
  1432. case RESZ_PAD_SINK | MEDIA_ENT_T_DEVNODE:
  1433. /* read from memory */
  1434. if (flags & MEDIA_LNK_FL_ENABLED) {
  1435. if (res->input == RESIZER_INPUT_VP)
  1436. return -EBUSY;
  1437. res->input = RESIZER_INPUT_MEMORY;
  1438. } else {
  1439. if (res->input == RESIZER_INPUT_MEMORY)
  1440. res->input = RESIZER_INPUT_NONE;
  1441. }
  1442. break;
  1443. case RESZ_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1444. /* read from ccdc or previewer */
  1445. if (flags & MEDIA_LNK_FL_ENABLED) {
  1446. if (res->input == RESIZER_INPUT_MEMORY)
  1447. return -EBUSY;
  1448. res->input = RESIZER_INPUT_VP;
  1449. } else {
  1450. if (res->input == RESIZER_INPUT_VP)
  1451. res->input = RESIZER_INPUT_NONE;
  1452. }
  1453. break;
  1454. case RESZ_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
  1455. /* resizer always write to memory */
  1456. break;
  1457. default:
  1458. return -EINVAL;
  1459. }
  1460. return 0;
  1461. }
  1462. /* media operations */
  1463. static const struct media_entity_operations resizer_media_ops = {
  1464. .link_setup = resizer_link_setup,
  1465. .link_validate = v4l2_subdev_link_validate,
  1466. };
  1467. void omap3isp_resizer_unregister_entities(struct isp_res_device *res)
  1468. {
  1469. v4l2_device_unregister_subdev(&res->subdev);
  1470. omap3isp_video_unregister(&res->video_in);
  1471. omap3isp_video_unregister(&res->video_out);
  1472. }
  1473. int omap3isp_resizer_register_entities(struct isp_res_device *res,
  1474. struct v4l2_device *vdev)
  1475. {
  1476. int ret;
  1477. /* Register the subdev and video nodes. */
  1478. ret = v4l2_device_register_subdev(vdev, &res->subdev);
  1479. if (ret < 0)
  1480. goto error;
  1481. ret = omap3isp_video_register(&res->video_in, vdev);
  1482. if (ret < 0)
  1483. goto error;
  1484. ret = omap3isp_video_register(&res->video_out, vdev);
  1485. if (ret < 0)
  1486. goto error;
  1487. return 0;
  1488. error:
  1489. omap3isp_resizer_unregister_entities(res);
  1490. return ret;
  1491. }
  1492. /* -----------------------------------------------------------------------------
  1493. * ISP resizer initialization and cleanup
  1494. */
  1495. /*
  1496. * resizer_init_entities - Initialize resizer subdev and media entity.
  1497. * @res : Pointer to resizer device structure
  1498. * return -ENOMEM or zero on success
  1499. */
  1500. static int resizer_init_entities(struct isp_res_device *res)
  1501. {
  1502. struct v4l2_subdev *sd = &res->subdev;
  1503. struct media_pad *pads = res->pads;
  1504. struct media_entity *me = &sd->entity;
  1505. int ret;
  1506. res->input = RESIZER_INPUT_NONE;
  1507. v4l2_subdev_init(sd, &resizer_v4l2_ops);
  1508. sd->internal_ops = &resizer_v4l2_internal_ops;
  1509. strlcpy(sd->name, "OMAP3 ISP resizer", sizeof(sd->name));
  1510. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  1511. v4l2_set_subdevdata(sd, res);
  1512. sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  1513. pads[RESZ_PAD_SINK].flags = MEDIA_PAD_FL_SINK
  1514. | MEDIA_PAD_FL_MUST_CONNECT;
  1515. pads[RESZ_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
  1516. me->ops = &resizer_media_ops;
  1517. ret = media_entity_init(me, RESZ_PADS_NUM, pads, 0);
  1518. if (ret < 0)
  1519. return ret;
  1520. resizer_init_formats(sd, NULL);
  1521. res->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  1522. res->video_in.ops = &resizer_video_ops;
  1523. res->video_in.isp = to_isp_device(res);
  1524. res->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
  1525. res->video_in.bpl_alignment = 32;
  1526. res->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  1527. res->video_out.ops = &resizer_video_ops;
  1528. res->video_out.isp = to_isp_device(res);
  1529. res->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
  1530. res->video_out.bpl_alignment = 32;
  1531. ret = omap3isp_video_init(&res->video_in, "resizer");
  1532. if (ret < 0)
  1533. goto error_video_in;
  1534. ret = omap3isp_video_init(&res->video_out, "resizer");
  1535. if (ret < 0)
  1536. goto error_video_out;
  1537. res->video_out.video.entity.flags |= MEDIA_ENT_FL_DEFAULT;
  1538. /* Connect the video nodes to the resizer subdev. */
  1539. ret = media_entity_create_link(&res->video_in.video.entity, 0,
  1540. &res->subdev.entity, RESZ_PAD_SINK, 0);
  1541. if (ret < 0)
  1542. goto error_link;
  1543. ret = media_entity_create_link(&res->subdev.entity, RESZ_PAD_SOURCE,
  1544. &res->video_out.video.entity, 0, 0);
  1545. if (ret < 0)
  1546. goto error_link;
  1547. return 0;
  1548. error_link:
  1549. omap3isp_video_cleanup(&res->video_out);
  1550. error_video_out:
  1551. omap3isp_video_cleanup(&res->video_in);
  1552. error_video_in:
  1553. media_entity_cleanup(&res->subdev.entity);
  1554. return ret;
  1555. }
  1556. /*
  1557. * isp_resizer_init - Resizer initialization.
  1558. * @isp : Pointer to ISP device
  1559. * return -ENOMEM or zero on success
  1560. */
  1561. int omap3isp_resizer_init(struct isp_device *isp)
  1562. {
  1563. struct isp_res_device *res = &isp->isp_res;
  1564. init_waitqueue_head(&res->wait);
  1565. atomic_set(&res->stopping, 0);
  1566. spin_lock_init(&res->lock);
  1567. return resizer_init_entities(res);
  1568. }
  1569. void omap3isp_resizer_cleanup(struct isp_device *isp)
  1570. {
  1571. struct isp_res_device *res = &isp->isp_res;
  1572. omap3isp_video_cleanup(&res->video_in);
  1573. omap3isp_video_cleanup(&res->video_out);
  1574. media_entity_cleanup(&res->subdev.entity);
  1575. }