g2d-regs.h 4.6 KB

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  1. /*
  2. * Samsung S5P G2D - 2D Graphics Accelerator Driver
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  5. * Kamil Debski, <k.debski@samsung.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the
  10. * License, or (at your option) any later version
  11. */
  12. /* General Registers */
  13. #define SOFT_RESET_REG 0x0000 /* Software reset reg */
  14. #define INTEN_REG 0x0004 /* Interrupt Enable reg */
  15. #define INTC_PEND_REG 0x000C /* Interrupt Control Pending reg */
  16. #define FIFO_STAT_REG 0x0010 /* Command FIFO Status reg */
  17. #define AXI_ID_MODE_REG 0x0014 /* AXI Read ID Mode reg */
  18. #define CACHECTL_REG 0x0018 /* Cache & Buffer clear reg */
  19. #define AXI_MODE_REG 0x001C /* AXI Mode reg */
  20. /* Command Registers */
  21. #define BITBLT_START_REG 0x0100 /* BitBLT Start reg */
  22. #define BITBLT_COMMAND_REG 0x0104 /* Command reg for BitBLT */
  23. /* Parameter Setting Registers (Rotate & Direction) */
  24. #define ROTATE_REG 0x0200 /* Rotation reg */
  25. #define SRC_MSK_DIRECT_REG 0x0204 /* Src and Mask Direction reg */
  26. #define DST_PAT_DIRECT_REG 0x0208 /* Dest and Pattern Direction reg */
  27. /* Parameter Setting Registers (Src) */
  28. #define SRC_SELECT_REG 0x0300 /* Src Image Selection reg */
  29. #define SRC_BASE_ADDR_REG 0x0304 /* Src Image Base Address reg */
  30. #define SRC_STRIDE_REG 0x0308 /* Src Stride reg */
  31. #define SRC_COLOR_MODE_REG 0x030C /* Src Image Color Mode reg */
  32. #define SRC_LEFT_TOP_REG 0x0310 /* Src Left Top Coordinate reg */
  33. #define SRC_RIGHT_BOTTOM_REG 0x0314 /* Src Right Bottom Coordinate reg */
  34. #define SRC_SCALE_CTRL_REG 0x0328 /* Src Scaling type select */
  35. #define SRC_XSCALE_REG 0x032c /* Src X Scaling ratio */
  36. #define SRC_YSCALE_REG 0x0330 /* Src Y Scaling ratio */
  37. /* Parameter Setting Registers (Dest) */
  38. #define DST_SELECT_REG 0x0400 /* Dest Image Selection reg */
  39. #define DST_BASE_ADDR_REG 0x0404 /* Dest Image Base Address reg */
  40. #define DST_STRIDE_REG 0x0408 /* Dest Stride reg */
  41. #define DST_COLOR_MODE_REG 0x040C /* Dest Image Color Mode reg */
  42. #define DST_LEFT_TOP_REG 0x0410 /* Dest Left Top Coordinate reg */
  43. #define DST_RIGHT_BOTTOM_REG 0x0414 /* Dest Right Bottom Coordinate reg */
  44. /* Parameter Setting Registers (Pattern) */
  45. #define PAT_BASE_ADDR_REG 0x0500 /* Pattern Image Base Address reg */
  46. #define PAT_SIZE_REG 0x0504 /* Pattern Image Size reg */
  47. #define PAT_COLOR_MODE_REG 0x0508 /* Pattern Image Color Mode reg */
  48. #define PAT_OFFSET_REG 0x050C /* Pattern Left Top Coordinate reg */
  49. #define PAT_STRIDE_REG 0x0510 /* Pattern Stride reg */
  50. /* Parameter Setting Registers (Mask) */
  51. #define MASK_BASE_ADDR_REG 0x0520 /* Mask Base Address reg */
  52. #define MASK_STRIDE_REG 0x0524 /* Mask Stride reg */
  53. /* Parameter Setting Registers (Clipping Window) */
  54. #define CW_LT_REG 0x0600 /* LeftTop coordinates of Clip Window */
  55. #define CW_RB_REG 0x0604 /* RightBottom coordinates of Clip
  56. Window */
  57. /* Parameter Setting Registers (ROP & Alpha Setting) */
  58. #define THIRD_OPERAND_REG 0x0610 /* Third Operand Selection reg */
  59. #define ROP4_REG 0x0614 /* Raster Operation reg */
  60. #define ALPHA_REG 0x0618 /* Alpha value, Fading offset value */
  61. /* Parameter Setting Registers (Color) */
  62. #define FG_COLOR_REG 0x0700 /* Foreground Color reg */
  63. #define BG_COLOR_REG 0x0704 /* Background Color reg */
  64. #define BS_COLOR_REG 0x0708 /* Blue Screen Color reg */
  65. /* Parameter Setting Registers (Color Key) */
  66. #define SRC_COLORKEY_CTRL_REG 0x0710 /* Src Colorkey control reg */
  67. #define SRC_COLORKEY_DR_MIN_REG 0x0714 /* Src Colorkey Decision Reference
  68. Min reg */
  69. #define SRC_COLORKEY_DR_MAX_REG 0x0718 /* Src Colorkey Decision Reference
  70. Max reg */
  71. #define DST_COLORKEY_CTRL_REG 0x071C /* Dest Colorkey control reg */
  72. #define DST_COLORKEY_DR_MIN_REG 0x0720 /* Dest Colorkey Decision Reference
  73. Min reg */
  74. #define DST_COLORKEY_DR_MAX_REG 0x0724 /* Dest Colorkey Decision Reference
  75. Max reg */
  76. /* Color mode values */
  77. #define ORDER_XRGB 0
  78. #define ORDER_RGBX 1
  79. #define ORDER_XBGR 2
  80. #define ORDER_BGRX 3
  81. #define MODE_XRGB_8888 0
  82. #define MODE_ARGB_8888 1
  83. #define MODE_RGB_565 2
  84. #define MODE_XRGB_1555 3
  85. #define MODE_ARGB_1555 4
  86. #define MODE_XRGB_4444 5
  87. #define MODE_ARGB_4444 6
  88. #define MODE_PACKED_RGB_888 7
  89. #define COLOR_MODE(o, m) (((o) << 4) | (m))
  90. /* ROP4 operation values */
  91. #define ROP4_COPY 0xCCCC
  92. #define ROP4_INVERT 0x3333
  93. /* Hardware limits */
  94. #define MAX_WIDTH 8000
  95. #define MAX_HEIGHT 8000
  96. #define G2D_TIMEOUT 500
  97. #define DEFAULT_WIDTH 100
  98. #define DEFAULT_HEIGHT 100
  99. #define DEFAULT_SCALE_MODE (2 << 0)
  100. /* Command mode register values */
  101. #define CMD_V3_ENABLE_STRETCH (1 << 4)