atmel-isi.c 29 KB

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  1. /*
  2. * Copyright (c) 2011 Atmel Corporation
  3. * Josh Wu, <josh.wu@atmel.com>
  4. *
  5. * Based on previous work by Lars Haring, <lars.haring@atmel.com>
  6. * and Sedji Gaouaou
  7. * Based on the bttv driver for Bt848 with respective copyright holders
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/completion.h>
  15. #include <linux/delay.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/pm_runtime.h>
  23. #include <linux/slab.h>
  24. #include <media/soc_camera.h>
  25. #include <media/soc_mediabus.h>
  26. #include <media/v4l2-of.h>
  27. #include <media/videobuf2-dma-contig.h>
  28. #include "atmel-isi.h"
  29. #define MAX_BUFFER_NUM 32
  30. #define MAX_SUPPORT_WIDTH 2048
  31. #define MAX_SUPPORT_HEIGHT 2048
  32. #define VID_LIMIT_BYTES (16 * 1024 * 1024)
  33. #define MIN_FRAME_RATE 15
  34. #define FRAME_INTERVAL_MILLI_SEC (1000 / MIN_FRAME_RATE)
  35. /* Frame buffer descriptor */
  36. struct fbd {
  37. /* Physical address of the frame buffer */
  38. u32 fb_address;
  39. /* DMA Control Register(only in HISI2) */
  40. u32 dma_ctrl;
  41. /* Physical address of the next fbd */
  42. u32 next_fbd_address;
  43. };
  44. static void set_dma_ctrl(struct fbd *fb_desc, u32 ctrl)
  45. {
  46. fb_desc->dma_ctrl = ctrl;
  47. }
  48. struct isi_dma_desc {
  49. struct list_head list;
  50. struct fbd *p_fbd;
  51. dma_addr_t fbd_phys;
  52. };
  53. /* Frame buffer data */
  54. struct frame_buffer {
  55. struct vb2_v4l2_buffer vb;
  56. struct isi_dma_desc *p_dma_desc;
  57. struct list_head list;
  58. };
  59. struct atmel_isi {
  60. /* Protects the access of variables shared with the ISR */
  61. spinlock_t lock;
  62. void __iomem *regs;
  63. int sequence;
  64. struct vb2_alloc_ctx *alloc_ctx;
  65. /* Allocate descriptors for dma buffer use */
  66. struct fbd *p_fb_descriptors;
  67. dma_addr_t fb_descriptors_phys;
  68. struct list_head dma_desc_head;
  69. struct isi_dma_desc dma_desc[MAX_BUFFER_NUM];
  70. struct completion complete;
  71. /* ISI peripherial clock */
  72. struct clk *pclk;
  73. unsigned int irq;
  74. struct isi_platform_data pdata;
  75. u16 width_flags; /* max 12 bits */
  76. struct list_head video_buffer_list;
  77. struct frame_buffer *active;
  78. struct soc_camera_host soc_host;
  79. };
  80. static void isi_writel(struct atmel_isi *isi, u32 reg, u32 val)
  81. {
  82. writel(val, isi->regs + reg);
  83. }
  84. static u32 isi_readl(struct atmel_isi *isi, u32 reg)
  85. {
  86. return readl(isi->regs + reg);
  87. }
  88. static void configure_geometry(struct atmel_isi *isi, u32 width,
  89. u32 height, u32 code)
  90. {
  91. u32 cfg2;
  92. /* According to sensor's output format to set cfg2 */
  93. switch (code) {
  94. default:
  95. /* Grey */
  96. case MEDIA_BUS_FMT_Y8_1X8:
  97. cfg2 = ISI_CFG2_GRAYSCALE | ISI_CFG2_COL_SPACE_YCbCr;
  98. break;
  99. /* YUV */
  100. case MEDIA_BUS_FMT_VYUY8_2X8:
  101. cfg2 = ISI_CFG2_YCC_SWAP_MODE_3 | ISI_CFG2_COL_SPACE_YCbCr;
  102. break;
  103. case MEDIA_BUS_FMT_UYVY8_2X8:
  104. cfg2 = ISI_CFG2_YCC_SWAP_MODE_2 | ISI_CFG2_COL_SPACE_YCbCr;
  105. break;
  106. case MEDIA_BUS_FMT_YVYU8_2X8:
  107. cfg2 = ISI_CFG2_YCC_SWAP_MODE_1 | ISI_CFG2_COL_SPACE_YCbCr;
  108. break;
  109. case MEDIA_BUS_FMT_YUYV8_2X8:
  110. cfg2 = ISI_CFG2_YCC_SWAP_DEFAULT | ISI_CFG2_COL_SPACE_YCbCr;
  111. break;
  112. /* RGB, TODO */
  113. }
  114. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  115. /* Set width */
  116. cfg2 |= ((width - 1) << ISI_CFG2_IM_HSIZE_OFFSET) &
  117. ISI_CFG2_IM_HSIZE_MASK;
  118. /* Set height */
  119. cfg2 |= ((height - 1) << ISI_CFG2_IM_VSIZE_OFFSET)
  120. & ISI_CFG2_IM_VSIZE_MASK;
  121. isi_writel(isi, ISI_CFG2, cfg2);
  122. }
  123. static bool is_supported(struct soc_camera_device *icd,
  124. const u32 pixformat)
  125. {
  126. switch (pixformat) {
  127. /* YUV, including grey */
  128. case V4L2_PIX_FMT_GREY:
  129. case V4L2_PIX_FMT_YUYV:
  130. case V4L2_PIX_FMT_UYVY:
  131. case V4L2_PIX_FMT_YVYU:
  132. case V4L2_PIX_FMT_VYUY:
  133. return true;
  134. /* RGB, TODO */
  135. default:
  136. return false;
  137. }
  138. }
  139. static irqreturn_t atmel_isi_handle_streaming(struct atmel_isi *isi)
  140. {
  141. if (isi->active) {
  142. struct vb2_v4l2_buffer *vbuf = &isi->active->vb;
  143. struct frame_buffer *buf = isi->active;
  144. list_del_init(&buf->list);
  145. v4l2_get_timestamp(&vbuf->timestamp);
  146. vbuf->sequence = isi->sequence++;
  147. vb2_buffer_done(&vbuf->vb2_buf, VB2_BUF_STATE_DONE);
  148. }
  149. if (list_empty(&isi->video_buffer_list)) {
  150. isi->active = NULL;
  151. } else {
  152. /* start next dma frame. */
  153. isi->active = list_entry(isi->video_buffer_list.next,
  154. struct frame_buffer, list);
  155. isi_writel(isi, ISI_DMA_C_DSCR,
  156. (u32)isi->active->p_dma_desc->fbd_phys);
  157. isi_writel(isi, ISI_DMA_C_CTRL,
  158. ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  159. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  160. }
  161. return IRQ_HANDLED;
  162. }
  163. /* ISI interrupt service routine */
  164. static irqreturn_t isi_interrupt(int irq, void *dev_id)
  165. {
  166. struct atmel_isi *isi = dev_id;
  167. u32 status, mask, pending;
  168. irqreturn_t ret = IRQ_NONE;
  169. spin_lock(&isi->lock);
  170. status = isi_readl(isi, ISI_STATUS);
  171. mask = isi_readl(isi, ISI_INTMASK);
  172. pending = status & mask;
  173. if (pending & ISI_CTRL_SRST) {
  174. complete(&isi->complete);
  175. isi_writel(isi, ISI_INTDIS, ISI_CTRL_SRST);
  176. ret = IRQ_HANDLED;
  177. } else if (pending & ISI_CTRL_DIS) {
  178. complete(&isi->complete);
  179. isi_writel(isi, ISI_INTDIS, ISI_CTRL_DIS);
  180. ret = IRQ_HANDLED;
  181. } else {
  182. if (likely(pending & ISI_SR_CXFR_DONE))
  183. ret = atmel_isi_handle_streaming(isi);
  184. }
  185. spin_unlock(&isi->lock);
  186. return ret;
  187. }
  188. #define WAIT_ISI_RESET 1
  189. #define WAIT_ISI_DISABLE 0
  190. static int atmel_isi_wait_status(struct atmel_isi *isi, int wait_reset)
  191. {
  192. unsigned long timeout;
  193. /*
  194. * The reset or disable will only succeed if we have a
  195. * pixel clock from the camera.
  196. */
  197. init_completion(&isi->complete);
  198. if (wait_reset) {
  199. isi_writel(isi, ISI_INTEN, ISI_CTRL_SRST);
  200. isi_writel(isi, ISI_CTRL, ISI_CTRL_SRST);
  201. } else {
  202. isi_writel(isi, ISI_INTEN, ISI_CTRL_DIS);
  203. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  204. }
  205. timeout = wait_for_completion_timeout(&isi->complete,
  206. msecs_to_jiffies(500));
  207. if (timeout == 0)
  208. return -ETIMEDOUT;
  209. return 0;
  210. }
  211. /* ------------------------------------------------------------------
  212. Videobuf operations
  213. ------------------------------------------------------------------*/
  214. static int queue_setup(struct vb2_queue *vq, const void *parg,
  215. unsigned int *nbuffers, unsigned int *nplanes,
  216. unsigned int sizes[], void *alloc_ctxs[])
  217. {
  218. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  219. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  220. struct atmel_isi *isi = ici->priv;
  221. unsigned long size;
  222. size = icd->sizeimage;
  223. if (!*nbuffers || *nbuffers > MAX_BUFFER_NUM)
  224. *nbuffers = MAX_BUFFER_NUM;
  225. if (size * *nbuffers > VID_LIMIT_BYTES)
  226. *nbuffers = VID_LIMIT_BYTES / size;
  227. *nplanes = 1;
  228. sizes[0] = size;
  229. alloc_ctxs[0] = isi->alloc_ctx;
  230. isi->sequence = 0;
  231. isi->active = NULL;
  232. dev_dbg(icd->parent, "%s, count=%d, size=%ld\n", __func__,
  233. *nbuffers, size);
  234. return 0;
  235. }
  236. static int buffer_init(struct vb2_buffer *vb)
  237. {
  238. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  239. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  240. buf->p_dma_desc = NULL;
  241. INIT_LIST_HEAD(&buf->list);
  242. return 0;
  243. }
  244. static int buffer_prepare(struct vb2_buffer *vb)
  245. {
  246. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  247. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  248. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  249. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  250. struct atmel_isi *isi = ici->priv;
  251. unsigned long size;
  252. struct isi_dma_desc *desc;
  253. size = icd->sizeimage;
  254. if (vb2_plane_size(vb, 0) < size) {
  255. dev_err(icd->parent, "%s data will not fit into plane (%lu < %lu)\n",
  256. __func__, vb2_plane_size(vb, 0), size);
  257. return -EINVAL;
  258. }
  259. vb2_set_plane_payload(vb, 0, size);
  260. if (!buf->p_dma_desc) {
  261. if (list_empty(&isi->dma_desc_head)) {
  262. dev_err(icd->parent, "Not enough dma descriptors.\n");
  263. return -EINVAL;
  264. } else {
  265. /* Get an available descriptor */
  266. desc = list_entry(isi->dma_desc_head.next,
  267. struct isi_dma_desc, list);
  268. /* Delete the descriptor since now it is used */
  269. list_del_init(&desc->list);
  270. /* Initialize the dma descriptor */
  271. desc->p_fbd->fb_address =
  272. vb2_dma_contig_plane_dma_addr(vb, 0);
  273. desc->p_fbd->next_fbd_address = 0;
  274. set_dma_ctrl(desc->p_fbd, ISI_DMA_CTRL_WB);
  275. buf->p_dma_desc = desc;
  276. }
  277. }
  278. return 0;
  279. }
  280. static void buffer_cleanup(struct vb2_buffer *vb)
  281. {
  282. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  283. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  284. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  285. struct atmel_isi *isi = ici->priv;
  286. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  287. /* This descriptor is available now and we add to head list */
  288. if (buf->p_dma_desc)
  289. list_add(&buf->p_dma_desc->list, &isi->dma_desc_head);
  290. }
  291. static void start_dma(struct atmel_isi *isi, struct frame_buffer *buffer)
  292. {
  293. u32 ctrl, cfg1;
  294. cfg1 = isi_readl(isi, ISI_CFG1);
  295. /* Enable irq: cxfr for the codec path, pxfr for the preview path */
  296. isi_writel(isi, ISI_INTEN,
  297. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  298. /* Check if already in a frame */
  299. if (isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) {
  300. dev_err(isi->soc_host.icd->parent, "Already in frame handling.\n");
  301. return;
  302. }
  303. isi_writel(isi, ISI_DMA_C_DSCR, (u32)buffer->p_dma_desc->fbd_phys);
  304. isi_writel(isi, ISI_DMA_C_CTRL, ISI_DMA_CTRL_FETCH | ISI_DMA_CTRL_DONE);
  305. isi_writel(isi, ISI_DMA_CHER, ISI_DMA_CHSR_C_CH);
  306. cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK;
  307. /* Enable linked list */
  308. cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR;
  309. /* Enable codec path and ISI */
  310. ctrl = ISI_CTRL_CDC | ISI_CTRL_EN;
  311. isi_writel(isi, ISI_CTRL, ctrl);
  312. isi_writel(isi, ISI_CFG1, cfg1);
  313. }
  314. static void buffer_queue(struct vb2_buffer *vb)
  315. {
  316. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  317. struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
  318. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  319. struct atmel_isi *isi = ici->priv;
  320. struct frame_buffer *buf = container_of(vbuf, struct frame_buffer, vb);
  321. unsigned long flags = 0;
  322. spin_lock_irqsave(&isi->lock, flags);
  323. list_add_tail(&buf->list, &isi->video_buffer_list);
  324. if (isi->active == NULL) {
  325. isi->active = buf;
  326. if (vb2_is_streaming(vb->vb2_queue))
  327. start_dma(isi, buf);
  328. }
  329. spin_unlock_irqrestore(&isi->lock, flags);
  330. }
  331. static int start_streaming(struct vb2_queue *vq, unsigned int count)
  332. {
  333. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  334. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  335. struct atmel_isi *isi = ici->priv;
  336. int ret;
  337. pm_runtime_get_sync(ici->v4l2_dev.dev);
  338. /* Reset ISI */
  339. ret = atmel_isi_wait_status(isi, WAIT_ISI_RESET);
  340. if (ret < 0) {
  341. dev_err(icd->parent, "Reset ISI timed out\n");
  342. pm_runtime_put(ici->v4l2_dev.dev);
  343. return ret;
  344. }
  345. /* Disable all interrupts */
  346. isi_writel(isi, ISI_INTDIS, (u32)~0UL);
  347. configure_geometry(isi, icd->user_width, icd->user_height,
  348. icd->current_fmt->code);
  349. spin_lock_irq(&isi->lock);
  350. /* Clear any pending interrupt */
  351. isi_readl(isi, ISI_STATUS);
  352. if (count)
  353. start_dma(isi, isi->active);
  354. spin_unlock_irq(&isi->lock);
  355. return 0;
  356. }
  357. /* abort streaming and wait for last buffer */
  358. static void stop_streaming(struct vb2_queue *vq)
  359. {
  360. struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
  361. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  362. struct atmel_isi *isi = ici->priv;
  363. struct frame_buffer *buf, *node;
  364. int ret = 0;
  365. unsigned long timeout;
  366. spin_lock_irq(&isi->lock);
  367. isi->active = NULL;
  368. /* Release all active buffers */
  369. list_for_each_entry_safe(buf, node, &isi->video_buffer_list, list) {
  370. list_del_init(&buf->list);
  371. vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
  372. }
  373. spin_unlock_irq(&isi->lock);
  374. timeout = jiffies + FRAME_INTERVAL_MILLI_SEC * HZ;
  375. /* Wait until the end of the current frame. */
  376. while ((isi_readl(isi, ISI_STATUS) & ISI_CTRL_CDC) &&
  377. time_before(jiffies, timeout))
  378. msleep(1);
  379. if (time_after(jiffies, timeout))
  380. dev_err(icd->parent,
  381. "Timeout waiting for finishing codec request\n");
  382. /* Disable interrupts */
  383. isi_writel(isi, ISI_INTDIS,
  384. ISI_SR_CXFR_DONE | ISI_SR_PXFR_DONE);
  385. /* Disable ISI and wait for it is done */
  386. ret = atmel_isi_wait_status(isi, WAIT_ISI_DISABLE);
  387. if (ret < 0)
  388. dev_err(icd->parent, "Disable ISI timed out\n");
  389. pm_runtime_put(ici->v4l2_dev.dev);
  390. }
  391. static struct vb2_ops isi_video_qops = {
  392. .queue_setup = queue_setup,
  393. .buf_init = buffer_init,
  394. .buf_prepare = buffer_prepare,
  395. .buf_cleanup = buffer_cleanup,
  396. .buf_queue = buffer_queue,
  397. .start_streaming = start_streaming,
  398. .stop_streaming = stop_streaming,
  399. .wait_prepare = vb2_ops_wait_prepare,
  400. .wait_finish = vb2_ops_wait_finish,
  401. };
  402. /* ------------------------------------------------------------------
  403. SOC camera operations for the device
  404. ------------------------------------------------------------------*/
  405. static int isi_camera_init_videobuf(struct vb2_queue *q,
  406. struct soc_camera_device *icd)
  407. {
  408. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  409. q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  410. q->io_modes = VB2_MMAP;
  411. q->drv_priv = icd;
  412. q->buf_struct_size = sizeof(struct frame_buffer);
  413. q->ops = &isi_video_qops;
  414. q->mem_ops = &vb2_dma_contig_memops;
  415. q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
  416. q->lock = &ici->host_lock;
  417. return vb2_queue_init(q);
  418. }
  419. static int isi_camera_set_fmt(struct soc_camera_device *icd,
  420. struct v4l2_format *f)
  421. {
  422. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  423. const struct soc_camera_format_xlate *xlate;
  424. struct v4l2_pix_format *pix = &f->fmt.pix;
  425. struct v4l2_subdev_format format = {
  426. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  427. };
  428. struct v4l2_mbus_framefmt *mf = &format.format;
  429. int ret;
  430. /* check with atmel-isi support format, if not support use YUYV */
  431. if (!is_supported(icd, pix->pixelformat))
  432. pix->pixelformat = V4L2_PIX_FMT_YUYV;
  433. xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
  434. if (!xlate) {
  435. dev_warn(icd->parent, "Format %x not found\n",
  436. pix->pixelformat);
  437. return -EINVAL;
  438. }
  439. dev_dbg(icd->parent, "Plan to set format %dx%d\n",
  440. pix->width, pix->height);
  441. mf->width = pix->width;
  442. mf->height = pix->height;
  443. mf->field = pix->field;
  444. mf->colorspace = pix->colorspace;
  445. mf->code = xlate->code;
  446. ret = v4l2_subdev_call(sd, pad, set_fmt, NULL, &format);
  447. if (ret < 0)
  448. return ret;
  449. if (mf->code != xlate->code)
  450. return -EINVAL;
  451. pix->width = mf->width;
  452. pix->height = mf->height;
  453. pix->field = mf->field;
  454. pix->colorspace = mf->colorspace;
  455. icd->current_fmt = xlate;
  456. dev_dbg(icd->parent, "Finally set format %dx%d\n",
  457. pix->width, pix->height);
  458. return ret;
  459. }
  460. static int isi_camera_try_fmt(struct soc_camera_device *icd,
  461. struct v4l2_format *f)
  462. {
  463. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  464. const struct soc_camera_format_xlate *xlate;
  465. struct v4l2_pix_format *pix = &f->fmt.pix;
  466. struct v4l2_subdev_pad_config pad_cfg;
  467. struct v4l2_subdev_format format = {
  468. .which = V4L2_SUBDEV_FORMAT_TRY,
  469. };
  470. struct v4l2_mbus_framefmt *mf = &format.format;
  471. u32 pixfmt = pix->pixelformat;
  472. int ret;
  473. /* check with atmel-isi support format, if not support use YUYV */
  474. if (!is_supported(icd, pix->pixelformat))
  475. pix->pixelformat = V4L2_PIX_FMT_YUYV;
  476. xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
  477. if (pixfmt && !xlate) {
  478. dev_warn(icd->parent, "Format %x not found\n", pixfmt);
  479. return -EINVAL;
  480. }
  481. /* limit to Atmel ISI hardware capabilities */
  482. if (pix->height > MAX_SUPPORT_HEIGHT)
  483. pix->height = MAX_SUPPORT_HEIGHT;
  484. if (pix->width > MAX_SUPPORT_WIDTH)
  485. pix->width = MAX_SUPPORT_WIDTH;
  486. /* limit to sensor capabilities */
  487. mf->width = pix->width;
  488. mf->height = pix->height;
  489. mf->field = pix->field;
  490. mf->colorspace = pix->colorspace;
  491. mf->code = xlate->code;
  492. ret = v4l2_subdev_call(sd, pad, set_fmt, &pad_cfg, &format);
  493. if (ret < 0)
  494. return ret;
  495. pix->width = mf->width;
  496. pix->height = mf->height;
  497. pix->colorspace = mf->colorspace;
  498. switch (mf->field) {
  499. case V4L2_FIELD_ANY:
  500. pix->field = V4L2_FIELD_NONE;
  501. break;
  502. case V4L2_FIELD_NONE:
  503. break;
  504. default:
  505. dev_err(icd->parent, "Field type %d unsupported.\n",
  506. mf->field);
  507. ret = -EINVAL;
  508. }
  509. return ret;
  510. }
  511. static const struct soc_mbus_pixelfmt isi_camera_formats[] = {
  512. {
  513. .fourcc = V4L2_PIX_FMT_YUYV,
  514. .name = "Packed YUV422 16 bit",
  515. .bits_per_sample = 8,
  516. .packing = SOC_MBUS_PACKING_2X8_PADHI,
  517. .order = SOC_MBUS_ORDER_LE,
  518. .layout = SOC_MBUS_LAYOUT_PACKED,
  519. },
  520. };
  521. /* This will be corrected as we get more formats */
  522. static bool isi_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
  523. {
  524. return fmt->packing == SOC_MBUS_PACKING_NONE ||
  525. (fmt->bits_per_sample == 8 &&
  526. fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
  527. (fmt->bits_per_sample > 8 &&
  528. fmt->packing == SOC_MBUS_PACKING_EXTEND16);
  529. }
  530. #define ISI_BUS_PARAM (V4L2_MBUS_MASTER | \
  531. V4L2_MBUS_HSYNC_ACTIVE_HIGH | \
  532. V4L2_MBUS_HSYNC_ACTIVE_LOW | \
  533. V4L2_MBUS_VSYNC_ACTIVE_HIGH | \
  534. V4L2_MBUS_VSYNC_ACTIVE_LOW | \
  535. V4L2_MBUS_PCLK_SAMPLE_RISING | \
  536. V4L2_MBUS_PCLK_SAMPLE_FALLING | \
  537. V4L2_MBUS_DATA_ACTIVE_HIGH)
  538. static int isi_camera_try_bus_param(struct soc_camera_device *icd,
  539. unsigned char buswidth)
  540. {
  541. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  542. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  543. struct atmel_isi *isi = ici->priv;
  544. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  545. unsigned long common_flags;
  546. int ret;
  547. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  548. if (!ret) {
  549. common_flags = soc_mbus_config_compatible(&cfg,
  550. ISI_BUS_PARAM);
  551. if (!common_flags) {
  552. dev_warn(icd->parent,
  553. "Flags incompatible: camera 0x%x, host 0x%x\n",
  554. cfg.flags, ISI_BUS_PARAM);
  555. return -EINVAL;
  556. }
  557. } else if (ret != -ENOIOCTLCMD) {
  558. return ret;
  559. }
  560. if ((1 << (buswidth - 1)) & isi->width_flags)
  561. return 0;
  562. return -EINVAL;
  563. }
  564. static int isi_camera_get_formats(struct soc_camera_device *icd,
  565. unsigned int idx,
  566. struct soc_camera_format_xlate *xlate)
  567. {
  568. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  569. int formats = 0, ret;
  570. /* sensor format */
  571. struct v4l2_subdev_mbus_code_enum code = {
  572. .which = V4L2_SUBDEV_FORMAT_ACTIVE,
  573. .index = idx,
  574. };
  575. /* soc camera host format */
  576. const struct soc_mbus_pixelfmt *fmt;
  577. ret = v4l2_subdev_call(sd, pad, enum_mbus_code, NULL, &code);
  578. if (ret < 0)
  579. /* No more formats */
  580. return 0;
  581. fmt = soc_mbus_get_fmtdesc(code.code);
  582. if (!fmt) {
  583. dev_err(icd->parent,
  584. "Invalid format code #%u: %d\n", idx, code.code);
  585. return 0;
  586. }
  587. /* This also checks support for the requested bits-per-sample */
  588. ret = isi_camera_try_bus_param(icd, fmt->bits_per_sample);
  589. if (ret < 0) {
  590. dev_err(icd->parent,
  591. "Fail to try the bus parameters.\n");
  592. return 0;
  593. }
  594. switch (code.code) {
  595. case MEDIA_BUS_FMT_UYVY8_2X8:
  596. case MEDIA_BUS_FMT_VYUY8_2X8:
  597. case MEDIA_BUS_FMT_YUYV8_2X8:
  598. case MEDIA_BUS_FMT_YVYU8_2X8:
  599. formats++;
  600. if (xlate) {
  601. xlate->host_fmt = &isi_camera_formats[0];
  602. xlate->code = code.code;
  603. xlate++;
  604. dev_dbg(icd->parent, "Providing format %s using code %d\n",
  605. isi_camera_formats[0].name, code.code);
  606. }
  607. break;
  608. default:
  609. if (!isi_camera_packing_supported(fmt))
  610. return 0;
  611. if (xlate)
  612. dev_dbg(icd->parent,
  613. "Providing format %s in pass-through mode\n",
  614. fmt->name);
  615. }
  616. /* Generic pass-through */
  617. formats++;
  618. if (xlate) {
  619. xlate->host_fmt = fmt;
  620. xlate->code = code.code;
  621. xlate++;
  622. }
  623. return formats;
  624. }
  625. static int isi_camera_add_device(struct soc_camera_device *icd)
  626. {
  627. dev_dbg(icd->parent, "Atmel ISI Camera driver attached to camera %d\n",
  628. icd->devnum);
  629. return 0;
  630. }
  631. static void isi_camera_remove_device(struct soc_camera_device *icd)
  632. {
  633. dev_dbg(icd->parent, "Atmel ISI Camera driver detached from camera %d\n",
  634. icd->devnum);
  635. }
  636. static unsigned int isi_camera_poll(struct file *file, poll_table *pt)
  637. {
  638. struct soc_camera_device *icd = file->private_data;
  639. return vb2_poll(&icd->vb2_vidq, file, pt);
  640. }
  641. static int isi_camera_querycap(struct soc_camera_host *ici,
  642. struct v4l2_capability *cap)
  643. {
  644. strcpy(cap->driver, "atmel-isi");
  645. strcpy(cap->card, "Atmel Image Sensor Interface");
  646. cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
  647. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  648. return 0;
  649. }
  650. static int isi_camera_set_bus_param(struct soc_camera_device *icd)
  651. {
  652. struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
  653. struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
  654. struct atmel_isi *isi = ici->priv;
  655. struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
  656. unsigned long common_flags;
  657. int ret;
  658. u32 cfg1 = 0;
  659. ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
  660. if (!ret) {
  661. common_flags = soc_mbus_config_compatible(&cfg,
  662. ISI_BUS_PARAM);
  663. if (!common_flags) {
  664. dev_warn(icd->parent,
  665. "Flags incompatible: camera 0x%x, host 0x%x\n",
  666. cfg.flags, ISI_BUS_PARAM);
  667. return -EINVAL;
  668. }
  669. } else if (ret != -ENOIOCTLCMD) {
  670. return ret;
  671. } else {
  672. common_flags = ISI_BUS_PARAM;
  673. }
  674. dev_dbg(icd->parent, "Flags cam: 0x%x host: 0x%x common: 0x%lx\n",
  675. cfg.flags, ISI_BUS_PARAM, common_flags);
  676. /* Make choises, based on platform preferences */
  677. if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
  678. (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
  679. if (isi->pdata.hsync_act_low)
  680. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
  681. else
  682. common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
  683. }
  684. if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
  685. (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
  686. if (isi->pdata.vsync_act_low)
  687. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
  688. else
  689. common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
  690. }
  691. if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
  692. (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
  693. if (isi->pdata.pclk_act_falling)
  694. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
  695. else
  696. common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
  697. }
  698. cfg.flags = common_flags;
  699. ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
  700. if (ret < 0 && ret != -ENOIOCTLCMD) {
  701. dev_dbg(icd->parent, "camera s_mbus_config(0x%lx) returned %d\n",
  702. common_flags, ret);
  703. return ret;
  704. }
  705. /* set bus param for ISI */
  706. if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  707. cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW;
  708. if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  709. cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW;
  710. if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  711. cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING;
  712. dev_dbg(icd->parent, "vsync active %s, hsync active %s, sampling on pix clock %s edge\n",
  713. common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW ? "low" : "high",
  714. common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW ? "low" : "high",
  715. common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING ? "falling" : "rising");
  716. if (isi->pdata.has_emb_sync)
  717. cfg1 |= ISI_CFG1_EMB_SYNC;
  718. if (isi->pdata.full_mode)
  719. cfg1 |= ISI_CFG1_FULL_MODE;
  720. cfg1 |= ISI_CFG1_THMASK_BEATS_16;
  721. /* Enable PM and peripheral clock before operate isi registers */
  722. pm_runtime_get_sync(ici->v4l2_dev.dev);
  723. isi_writel(isi, ISI_CTRL, ISI_CTRL_DIS);
  724. isi_writel(isi, ISI_CFG1, cfg1);
  725. pm_runtime_put(ici->v4l2_dev.dev);
  726. return 0;
  727. }
  728. static struct soc_camera_host_ops isi_soc_camera_host_ops = {
  729. .owner = THIS_MODULE,
  730. .add = isi_camera_add_device,
  731. .remove = isi_camera_remove_device,
  732. .set_fmt = isi_camera_set_fmt,
  733. .try_fmt = isi_camera_try_fmt,
  734. .get_formats = isi_camera_get_formats,
  735. .init_videobuf2 = isi_camera_init_videobuf,
  736. .poll = isi_camera_poll,
  737. .querycap = isi_camera_querycap,
  738. .set_bus_param = isi_camera_set_bus_param,
  739. };
  740. /* -----------------------------------------------------------------------*/
  741. static int atmel_isi_remove(struct platform_device *pdev)
  742. {
  743. struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
  744. struct atmel_isi *isi = container_of(soc_host,
  745. struct atmel_isi, soc_host);
  746. soc_camera_host_unregister(soc_host);
  747. vb2_dma_contig_cleanup_ctx(isi->alloc_ctx);
  748. dma_free_coherent(&pdev->dev,
  749. sizeof(struct fbd) * MAX_BUFFER_NUM,
  750. isi->p_fb_descriptors,
  751. isi->fb_descriptors_phys);
  752. pm_runtime_disable(&pdev->dev);
  753. return 0;
  754. }
  755. static int atmel_isi_parse_dt(struct atmel_isi *isi,
  756. struct platform_device *pdev)
  757. {
  758. struct device_node *np= pdev->dev.of_node;
  759. struct v4l2_of_endpoint ep;
  760. int err;
  761. /* Default settings for ISI */
  762. isi->pdata.full_mode = 1;
  763. isi->pdata.frate = ISI_CFG1_FRATE_CAPTURE_ALL;
  764. np = of_graph_get_next_endpoint(np, NULL);
  765. if (!np) {
  766. dev_err(&pdev->dev, "Could not find the endpoint\n");
  767. return -EINVAL;
  768. }
  769. err = v4l2_of_parse_endpoint(np, &ep);
  770. of_node_put(np);
  771. if (err) {
  772. dev_err(&pdev->dev, "Could not parse the endpoint\n");
  773. return err;
  774. }
  775. switch (ep.bus.parallel.bus_width) {
  776. case 8:
  777. isi->pdata.data_width_flags = ISI_DATAWIDTH_8;
  778. break;
  779. case 10:
  780. isi->pdata.data_width_flags =
  781. ISI_DATAWIDTH_8 | ISI_DATAWIDTH_10;
  782. break;
  783. default:
  784. dev_err(&pdev->dev, "Unsupported bus width: %d\n",
  785. ep.bus.parallel.bus_width);
  786. return -EINVAL;
  787. }
  788. if (ep.bus.parallel.flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
  789. isi->pdata.hsync_act_low = true;
  790. if (ep.bus.parallel.flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
  791. isi->pdata.vsync_act_low = true;
  792. if (ep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  793. isi->pdata.pclk_act_falling = true;
  794. if (ep.bus_type == V4L2_MBUS_BT656)
  795. isi->pdata.has_emb_sync = true;
  796. return 0;
  797. }
  798. static int atmel_isi_probe(struct platform_device *pdev)
  799. {
  800. unsigned int irq;
  801. struct atmel_isi *isi;
  802. struct resource *regs;
  803. int ret, i;
  804. struct soc_camera_host *soc_host;
  805. isi = devm_kzalloc(&pdev->dev, sizeof(struct atmel_isi), GFP_KERNEL);
  806. if (!isi) {
  807. dev_err(&pdev->dev, "Can't allocate interface!\n");
  808. return -ENOMEM;
  809. }
  810. isi->pclk = devm_clk_get(&pdev->dev, "isi_clk");
  811. if (IS_ERR(isi->pclk))
  812. return PTR_ERR(isi->pclk);
  813. ret = atmel_isi_parse_dt(isi, pdev);
  814. if (ret)
  815. return ret;
  816. isi->active = NULL;
  817. spin_lock_init(&isi->lock);
  818. INIT_LIST_HEAD(&isi->video_buffer_list);
  819. INIT_LIST_HEAD(&isi->dma_desc_head);
  820. isi->p_fb_descriptors = dma_alloc_coherent(&pdev->dev,
  821. sizeof(struct fbd) * MAX_BUFFER_NUM,
  822. &isi->fb_descriptors_phys,
  823. GFP_KERNEL);
  824. if (!isi->p_fb_descriptors) {
  825. dev_err(&pdev->dev, "Can't allocate descriptors!\n");
  826. return -ENOMEM;
  827. }
  828. for (i = 0; i < MAX_BUFFER_NUM; i++) {
  829. isi->dma_desc[i].p_fbd = isi->p_fb_descriptors + i;
  830. isi->dma_desc[i].fbd_phys = isi->fb_descriptors_phys +
  831. i * sizeof(struct fbd);
  832. list_add(&isi->dma_desc[i].list, &isi->dma_desc_head);
  833. }
  834. isi->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
  835. if (IS_ERR(isi->alloc_ctx)) {
  836. ret = PTR_ERR(isi->alloc_ctx);
  837. goto err_alloc_ctx;
  838. }
  839. regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  840. isi->regs = devm_ioremap_resource(&pdev->dev, regs);
  841. if (IS_ERR(isi->regs)) {
  842. ret = PTR_ERR(isi->regs);
  843. goto err_ioremap;
  844. }
  845. if (isi->pdata.data_width_flags & ISI_DATAWIDTH_8)
  846. isi->width_flags = 1 << 7;
  847. if (isi->pdata.data_width_flags & ISI_DATAWIDTH_10)
  848. isi->width_flags |= 1 << 9;
  849. irq = platform_get_irq(pdev, 0);
  850. if (IS_ERR_VALUE(irq)) {
  851. ret = irq;
  852. goto err_req_irq;
  853. }
  854. ret = devm_request_irq(&pdev->dev, irq, isi_interrupt, 0, "isi", isi);
  855. if (ret) {
  856. dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
  857. goto err_req_irq;
  858. }
  859. isi->irq = irq;
  860. soc_host = &isi->soc_host;
  861. soc_host->drv_name = "isi-camera";
  862. soc_host->ops = &isi_soc_camera_host_ops;
  863. soc_host->priv = isi;
  864. soc_host->v4l2_dev.dev = &pdev->dev;
  865. soc_host->nr = pdev->id;
  866. pm_suspend_ignore_children(&pdev->dev, true);
  867. pm_runtime_enable(&pdev->dev);
  868. ret = soc_camera_host_register(soc_host);
  869. if (ret) {
  870. dev_err(&pdev->dev, "Unable to register soc camera host\n");
  871. goto err_register_soc_camera_host;
  872. }
  873. return 0;
  874. err_register_soc_camera_host:
  875. pm_runtime_disable(&pdev->dev);
  876. err_req_irq:
  877. err_ioremap:
  878. vb2_dma_contig_cleanup_ctx(isi->alloc_ctx);
  879. err_alloc_ctx:
  880. dma_free_coherent(&pdev->dev,
  881. sizeof(struct fbd) * MAX_BUFFER_NUM,
  882. isi->p_fb_descriptors,
  883. isi->fb_descriptors_phys);
  884. return ret;
  885. }
  886. #ifdef CONFIG_PM
  887. static int atmel_isi_runtime_suspend(struct device *dev)
  888. {
  889. struct soc_camera_host *soc_host = to_soc_camera_host(dev);
  890. struct atmel_isi *isi = container_of(soc_host,
  891. struct atmel_isi, soc_host);
  892. clk_disable_unprepare(isi->pclk);
  893. return 0;
  894. }
  895. static int atmel_isi_runtime_resume(struct device *dev)
  896. {
  897. struct soc_camera_host *soc_host = to_soc_camera_host(dev);
  898. struct atmel_isi *isi = container_of(soc_host,
  899. struct atmel_isi, soc_host);
  900. return clk_prepare_enable(isi->pclk);
  901. }
  902. #endif /* CONFIG_PM */
  903. static const struct dev_pm_ops atmel_isi_dev_pm_ops = {
  904. SET_RUNTIME_PM_OPS(atmel_isi_runtime_suspend,
  905. atmel_isi_runtime_resume, NULL)
  906. };
  907. static const struct of_device_id atmel_isi_of_match[] = {
  908. { .compatible = "atmel,at91sam9g45-isi" },
  909. { }
  910. };
  911. MODULE_DEVICE_TABLE(of, atmel_isi_of_match);
  912. static struct platform_driver atmel_isi_driver = {
  913. .remove = atmel_isi_remove,
  914. .driver = {
  915. .name = "atmel_isi",
  916. .of_match_table = of_match_ptr(atmel_isi_of_match),
  917. .pm = &atmel_isi_dev_pm_ops,
  918. },
  919. };
  920. module_platform_driver_probe(atmel_isi_driver, atmel_isi_probe);
  921. MODULE_AUTHOR("Josh Wu <josh.wu@atmel.com>");
  922. MODULE_DESCRIPTION("The V4L2 driver for Atmel Linux");
  923. MODULE_LICENSE("GPL");
  924. MODULE_SUPPORTED_DEVICE("video");