bdisp-v4l2.c 35 KB

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  1. /*
  2. * Copyright (C) STMicroelectronics SA 2014
  3. * Authors: Fabien Dessenne <fabien.dessenne@st.com> for STMicroelectronics.
  4. * License terms: GNU General Public License (GPL), version 2
  5. */
  6. #include <linux/errno.h>
  7. #include <linux/interrupt.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/of.h>
  11. #include <linux/pm_runtime.h>
  12. #include <linux/slab.h>
  13. #include <media/v4l2-event.h>
  14. #include <media/v4l2-ioctl.h>
  15. #include "bdisp.h"
  16. #define BDISP_MAX_CTRL_NUM 10
  17. #define BDISP_WORK_TIMEOUT ((100 * HZ) / 1000)
  18. /* User configuration change */
  19. #define BDISP_PARAMS BIT(0) /* Config updated */
  20. #define BDISP_SRC_FMT BIT(1) /* Source set */
  21. #define BDISP_DST_FMT BIT(2) /* Destination set */
  22. #define BDISP_CTX_STOP_REQ BIT(3) /* Stop request */
  23. #define BDISP_CTX_ABORT BIT(4) /* Abort while device run */
  24. #define BDISP_MIN_W 1
  25. #define BDISP_MAX_W 8191
  26. #define BDISP_MIN_H 1
  27. #define BDISP_MAX_H 8191
  28. #define fh_to_ctx(__fh) container_of(__fh, struct bdisp_ctx, fh)
  29. enum bdisp_dev_flags {
  30. ST_M2M_OPEN, /* Driver opened */
  31. ST_M2M_RUNNING, /* HW device running */
  32. ST_M2M_SUSPENDED, /* Driver suspended */
  33. ST_M2M_SUSPENDING, /* Driver being suspended */
  34. };
  35. static const struct bdisp_fmt bdisp_formats[] = {
  36. /* ARGB888. [31:0] A:R:G:B 8:8:8:8 little endian */
  37. {
  38. .pixelformat = V4L2_PIX_FMT_ABGR32, /* is actually ARGB */
  39. .nb_planes = 1,
  40. .bpp = 32,
  41. .bpp_plane0 = 32,
  42. .w_align = 1,
  43. .h_align = 1
  44. },
  45. /* XRGB888. [31:0] x:R:G:B 8:8:8:8 little endian */
  46. {
  47. .pixelformat = V4L2_PIX_FMT_XBGR32, /* is actually xRGB */
  48. .nb_planes = 1,
  49. .bpp = 32,
  50. .bpp_plane0 = 32,
  51. .w_align = 1,
  52. .h_align = 1
  53. },
  54. /* RGB565. [15:0] R:G:B 5:6:5 little endian */
  55. {
  56. .pixelformat = V4L2_PIX_FMT_RGB565,
  57. .nb_planes = 1,
  58. .bpp = 16,
  59. .bpp_plane0 = 16,
  60. .w_align = 1,
  61. .h_align = 1
  62. },
  63. /* NV12. YUV420SP - 1 plane for Y + 1 plane for (CbCr) */
  64. {
  65. .pixelformat = V4L2_PIX_FMT_NV12,
  66. .nb_planes = 2,
  67. .bpp = 12,
  68. .bpp_plane0 = 8,
  69. .w_align = 2,
  70. .h_align = 2
  71. },
  72. /* RGB888. [23:0] B:G:R 8:8:8 little endian */
  73. {
  74. .pixelformat = V4L2_PIX_FMT_RGB24,
  75. .nb_planes = 1,
  76. .bpp = 24,
  77. .bpp_plane0 = 24,
  78. .w_align = 1,
  79. .h_align = 1
  80. },
  81. /* YU12. YUV420P - 1 plane for Y + 1 plane for Cb + 1 plane for Cr
  82. * To keep as the LAST element of this table (no support on capture)
  83. */
  84. {
  85. .pixelformat = V4L2_PIX_FMT_YUV420,
  86. .nb_planes = 3,
  87. .bpp = 12,
  88. .bpp_plane0 = 8,
  89. .w_align = 2,
  90. .h_align = 2
  91. }
  92. };
  93. /* Default format : HD ARGB32*/
  94. #define BDISP_DEF_WIDTH 1920
  95. #define BDISP_DEF_HEIGHT 1080
  96. static const struct bdisp_frame bdisp_dflt_fmt = {
  97. .width = BDISP_DEF_WIDTH,
  98. .height = BDISP_DEF_HEIGHT,
  99. .fmt = &bdisp_formats[0],
  100. .field = V4L2_FIELD_NONE,
  101. .bytesperline = BDISP_DEF_WIDTH * 4,
  102. .sizeimage = BDISP_DEF_WIDTH * BDISP_DEF_HEIGHT * 4,
  103. .colorspace = V4L2_COLORSPACE_REC709,
  104. .crop = {0, 0, BDISP_DEF_WIDTH, BDISP_DEF_HEIGHT},
  105. .paddr = {0, 0, 0, 0}
  106. };
  107. static inline void bdisp_ctx_state_lock_set(u32 state, struct bdisp_ctx *ctx)
  108. {
  109. unsigned long flags;
  110. spin_lock_irqsave(&ctx->bdisp_dev->slock, flags);
  111. ctx->state |= state;
  112. spin_unlock_irqrestore(&ctx->bdisp_dev->slock, flags);
  113. }
  114. static inline void bdisp_ctx_state_lock_clear(u32 state, struct bdisp_ctx *ctx)
  115. {
  116. unsigned long flags;
  117. spin_lock_irqsave(&ctx->bdisp_dev->slock, flags);
  118. ctx->state &= ~state;
  119. spin_unlock_irqrestore(&ctx->bdisp_dev->slock, flags);
  120. }
  121. static inline bool bdisp_ctx_state_is_set(u32 mask, struct bdisp_ctx *ctx)
  122. {
  123. unsigned long flags;
  124. bool ret;
  125. spin_lock_irqsave(&ctx->bdisp_dev->slock, flags);
  126. ret = (ctx->state & mask) == mask;
  127. spin_unlock_irqrestore(&ctx->bdisp_dev->slock, flags);
  128. return ret;
  129. }
  130. static const struct bdisp_fmt *bdisp_find_fmt(u32 pixelformat)
  131. {
  132. const struct bdisp_fmt *fmt;
  133. unsigned int i;
  134. for (i = 0; i < ARRAY_SIZE(bdisp_formats); i++) {
  135. fmt = &bdisp_formats[i];
  136. if (fmt->pixelformat == pixelformat)
  137. return fmt;
  138. }
  139. return NULL;
  140. }
  141. static struct bdisp_frame *ctx_get_frame(struct bdisp_ctx *ctx,
  142. enum v4l2_buf_type type)
  143. {
  144. switch (type) {
  145. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  146. return &ctx->src;
  147. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  148. return &ctx->dst;
  149. default:
  150. dev_err(ctx->bdisp_dev->dev,
  151. "Wrong buffer/video queue type (%d)\n", type);
  152. break;
  153. }
  154. return ERR_PTR(-EINVAL);
  155. }
  156. static void bdisp_job_finish(struct bdisp_ctx *ctx, int vb_state)
  157. {
  158. struct vb2_v4l2_buffer *src_vb, *dst_vb;
  159. if (WARN(!ctx || !ctx->fh.m2m_ctx, "Null hardware context\n"))
  160. return;
  161. dev_dbg(ctx->bdisp_dev->dev, "%s\n", __func__);
  162. src_vb = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx);
  163. dst_vb = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx);
  164. if (src_vb && dst_vb) {
  165. dst_vb->timestamp = src_vb->timestamp;
  166. dst_vb->timecode = src_vb->timecode;
  167. dst_vb->flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  168. dst_vb->flags |= src_vb->flags &
  169. V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  170. v4l2_m2m_buf_done(src_vb, vb_state);
  171. v4l2_m2m_buf_done(dst_vb, vb_state);
  172. v4l2_m2m_job_finish(ctx->bdisp_dev->m2m.m2m_dev,
  173. ctx->fh.m2m_ctx);
  174. }
  175. }
  176. static int bdisp_ctx_stop_req(struct bdisp_ctx *ctx)
  177. {
  178. struct bdisp_ctx *curr_ctx;
  179. struct bdisp_dev *bdisp = ctx->bdisp_dev;
  180. int ret;
  181. dev_dbg(ctx->bdisp_dev->dev, "%s\n", __func__);
  182. cancel_delayed_work(&bdisp->timeout_work);
  183. curr_ctx = v4l2_m2m_get_curr_priv(bdisp->m2m.m2m_dev);
  184. if (!test_bit(ST_M2M_RUNNING, &bdisp->state) || (curr_ctx != ctx))
  185. return 0;
  186. bdisp_ctx_state_lock_set(BDISP_CTX_STOP_REQ, ctx);
  187. ret = wait_event_timeout(bdisp->irq_queue,
  188. !bdisp_ctx_state_is_set(BDISP_CTX_STOP_REQ, ctx),
  189. BDISP_WORK_TIMEOUT);
  190. if (!ret) {
  191. dev_err(ctx->bdisp_dev->dev, "%s IRQ timeout\n", __func__);
  192. return -ETIMEDOUT;
  193. }
  194. return 0;
  195. }
  196. static void __bdisp_job_abort(struct bdisp_ctx *ctx)
  197. {
  198. int ret;
  199. ret = bdisp_ctx_stop_req(ctx);
  200. if ((ret == -ETIMEDOUT) || (ctx->state & BDISP_CTX_ABORT)) {
  201. bdisp_ctx_state_lock_clear(BDISP_CTX_STOP_REQ | BDISP_CTX_ABORT,
  202. ctx);
  203. bdisp_job_finish(ctx, VB2_BUF_STATE_ERROR);
  204. }
  205. }
  206. static void bdisp_job_abort(void *priv)
  207. {
  208. __bdisp_job_abort((struct bdisp_ctx *)priv);
  209. }
  210. static int bdisp_get_addr(struct bdisp_ctx *ctx, struct vb2_buffer *vb,
  211. struct bdisp_frame *frame, dma_addr_t *paddr)
  212. {
  213. if (!vb || !frame)
  214. return -EINVAL;
  215. paddr[0] = vb2_dma_contig_plane_dma_addr(vb, 0);
  216. if (frame->fmt->nb_planes > 1)
  217. /* UV (NV12) or U (420P) */
  218. paddr[1] = (dma_addr_t)(paddr[0] +
  219. frame->bytesperline * frame->height);
  220. if (frame->fmt->nb_planes > 2)
  221. /* V (420P) */
  222. paddr[2] = (dma_addr_t)(paddr[1] +
  223. (frame->bytesperline * frame->height) / 4);
  224. if (frame->fmt->nb_planes > 3)
  225. dev_dbg(ctx->bdisp_dev->dev, "ignoring some planes\n");
  226. dev_dbg(ctx->bdisp_dev->dev,
  227. "%s plane[0]=%pad plane[1]=%pad plane[2]=%pad\n",
  228. __func__, &paddr[0], &paddr[1], &paddr[2]);
  229. return 0;
  230. }
  231. static int bdisp_get_bufs(struct bdisp_ctx *ctx)
  232. {
  233. struct bdisp_frame *src, *dst;
  234. struct vb2_v4l2_buffer *src_vb, *dst_vb;
  235. int ret;
  236. src = &ctx->src;
  237. dst = &ctx->dst;
  238. src_vb = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
  239. ret = bdisp_get_addr(ctx, &src_vb->vb2_buf, src, src->paddr);
  240. if (ret)
  241. return ret;
  242. dst_vb = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  243. ret = bdisp_get_addr(ctx, &dst_vb->vb2_buf, dst, dst->paddr);
  244. if (ret)
  245. return ret;
  246. dst_vb->timestamp = src_vb->timestamp;
  247. return 0;
  248. }
  249. static void bdisp_device_run(void *priv)
  250. {
  251. struct bdisp_ctx *ctx = priv;
  252. struct bdisp_dev *bdisp;
  253. unsigned long flags;
  254. int err = 0;
  255. if (WARN(!ctx, "Null hardware context\n"))
  256. return;
  257. bdisp = ctx->bdisp_dev;
  258. dev_dbg(bdisp->dev, "%s\n", __func__);
  259. spin_lock_irqsave(&bdisp->slock, flags);
  260. if (bdisp->m2m.ctx != ctx) {
  261. dev_dbg(bdisp->dev, "ctx updated: %p -> %p\n",
  262. bdisp->m2m.ctx, ctx);
  263. ctx->state |= BDISP_PARAMS;
  264. bdisp->m2m.ctx = ctx;
  265. }
  266. if (ctx->state & BDISP_CTX_STOP_REQ) {
  267. ctx->state &= ~BDISP_CTX_STOP_REQ;
  268. ctx->state |= BDISP_CTX_ABORT;
  269. wake_up(&bdisp->irq_queue);
  270. goto out;
  271. }
  272. err = bdisp_get_bufs(ctx);
  273. if (err) {
  274. dev_err(bdisp->dev, "cannot get address\n");
  275. goto out;
  276. }
  277. bdisp_dbg_perf_begin(bdisp);
  278. err = bdisp_hw_reset(bdisp);
  279. if (err) {
  280. dev_err(bdisp->dev, "could not get HW ready\n");
  281. goto out;
  282. }
  283. err = bdisp_hw_update(ctx);
  284. if (err) {
  285. dev_err(bdisp->dev, "could not send HW request\n");
  286. goto out;
  287. }
  288. queue_delayed_work(bdisp->work_queue, &bdisp->timeout_work,
  289. BDISP_WORK_TIMEOUT);
  290. set_bit(ST_M2M_RUNNING, &bdisp->state);
  291. out:
  292. ctx->state &= ~BDISP_PARAMS;
  293. spin_unlock_irqrestore(&bdisp->slock, flags);
  294. if (err)
  295. bdisp_job_finish(ctx, VB2_BUF_STATE_ERROR);
  296. }
  297. static struct v4l2_m2m_ops bdisp_m2m_ops = {
  298. .device_run = bdisp_device_run,
  299. .job_abort = bdisp_job_abort,
  300. };
  301. static int __bdisp_s_ctrl(struct bdisp_ctx *ctx, struct v4l2_ctrl *ctrl)
  302. {
  303. if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE)
  304. return 0;
  305. switch (ctrl->id) {
  306. case V4L2_CID_HFLIP:
  307. ctx->hflip = ctrl->val;
  308. break;
  309. case V4L2_CID_VFLIP:
  310. ctx->vflip = ctrl->val;
  311. break;
  312. default:
  313. dev_err(ctx->bdisp_dev->dev, "unknown control %d\n", ctrl->id);
  314. return -EINVAL;
  315. }
  316. ctx->state |= BDISP_PARAMS;
  317. return 0;
  318. }
  319. static int bdisp_s_ctrl(struct v4l2_ctrl *ctrl)
  320. {
  321. struct bdisp_ctx *ctx = container_of(ctrl->handler, struct bdisp_ctx,
  322. ctrl_handler);
  323. unsigned long flags;
  324. int ret;
  325. spin_lock_irqsave(&ctx->bdisp_dev->slock, flags);
  326. ret = __bdisp_s_ctrl(ctx, ctrl);
  327. spin_unlock_irqrestore(&ctx->bdisp_dev->slock, flags);
  328. return ret;
  329. }
  330. static const struct v4l2_ctrl_ops bdisp_c_ops = {
  331. .s_ctrl = bdisp_s_ctrl,
  332. };
  333. static int bdisp_ctrls_create(struct bdisp_ctx *ctx)
  334. {
  335. if (ctx->ctrls_rdy)
  336. return 0;
  337. v4l2_ctrl_handler_init(&ctx->ctrl_handler, BDISP_MAX_CTRL_NUM);
  338. ctx->bdisp_ctrls.hflip = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  339. &bdisp_c_ops, V4L2_CID_HFLIP, 0, 1, 1, 0);
  340. ctx->bdisp_ctrls.vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler,
  341. &bdisp_c_ops, V4L2_CID_VFLIP, 0, 1, 1, 0);
  342. if (ctx->ctrl_handler.error) {
  343. int err = ctx->ctrl_handler.error;
  344. v4l2_ctrl_handler_free(&ctx->ctrl_handler);
  345. return err;
  346. }
  347. ctx->ctrls_rdy = true;
  348. return 0;
  349. }
  350. static void bdisp_ctrls_delete(struct bdisp_ctx *ctx)
  351. {
  352. if (ctx->ctrls_rdy) {
  353. v4l2_ctrl_handler_free(&ctx->ctrl_handler);
  354. ctx->ctrls_rdy = false;
  355. }
  356. }
  357. static int bdisp_queue_setup(struct vb2_queue *vq,
  358. const void *parg,
  359. unsigned int *nb_buf, unsigned int *nb_planes,
  360. unsigned int sizes[], void *allocators[])
  361. {
  362. const struct v4l2_format *fmt = parg;
  363. struct bdisp_ctx *ctx = vb2_get_drv_priv(vq);
  364. struct bdisp_frame *frame = ctx_get_frame(ctx, vq->type);
  365. if (IS_ERR(frame)) {
  366. dev_err(ctx->bdisp_dev->dev, "Invalid frame (%p)\n", frame);
  367. return PTR_ERR(frame);
  368. }
  369. if (!frame->fmt) {
  370. dev_err(ctx->bdisp_dev->dev, "Invalid format\n");
  371. return -EINVAL;
  372. }
  373. if (fmt && fmt->fmt.pix.sizeimage < frame->sizeimage)
  374. return -EINVAL;
  375. *nb_planes = 1;
  376. sizes[0] = fmt ? fmt->fmt.pix.sizeimage : frame->sizeimage;
  377. allocators[0] = ctx->bdisp_dev->alloc_ctx;
  378. return 0;
  379. }
  380. static int bdisp_buf_prepare(struct vb2_buffer *vb)
  381. {
  382. struct bdisp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  383. struct bdisp_frame *frame = ctx_get_frame(ctx, vb->vb2_queue->type);
  384. if (IS_ERR(frame)) {
  385. dev_err(ctx->bdisp_dev->dev, "Invalid frame (%p)\n", frame);
  386. return PTR_ERR(frame);
  387. }
  388. if (vb->vb2_queue->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
  389. vb2_set_plane_payload(vb, 0, frame->sizeimage);
  390. return 0;
  391. }
  392. static void bdisp_buf_queue(struct vb2_buffer *vb)
  393. {
  394. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  395. struct bdisp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  396. /* return to V4L2 any 0-size buffer so it can be dequeued by user */
  397. if (!vb2_get_plane_payload(vb, 0)) {
  398. dev_dbg(ctx->bdisp_dev->dev, "0 data buffer, skip it\n");
  399. vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
  400. return;
  401. }
  402. if (ctx->fh.m2m_ctx)
  403. v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
  404. }
  405. static int bdisp_start_streaming(struct vb2_queue *q, unsigned int count)
  406. {
  407. struct bdisp_ctx *ctx = q->drv_priv;
  408. struct vb2_v4l2_buffer *buf;
  409. int ret = pm_runtime_get_sync(ctx->bdisp_dev->dev);
  410. if (ret < 0) {
  411. dev_err(ctx->bdisp_dev->dev, "failed to set runtime PM\n");
  412. if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
  413. while ((buf = v4l2_m2m_src_buf_remove(ctx->fh.m2m_ctx)))
  414. v4l2_m2m_buf_done(buf, VB2_BUF_STATE_QUEUED);
  415. } else {
  416. while ((buf = v4l2_m2m_dst_buf_remove(ctx->fh.m2m_ctx)))
  417. v4l2_m2m_buf_done(buf, VB2_BUF_STATE_QUEUED);
  418. }
  419. return ret;
  420. }
  421. return 0;
  422. }
  423. static void bdisp_stop_streaming(struct vb2_queue *q)
  424. {
  425. struct bdisp_ctx *ctx = q->drv_priv;
  426. __bdisp_job_abort(ctx);
  427. pm_runtime_put(ctx->bdisp_dev->dev);
  428. }
  429. static struct vb2_ops bdisp_qops = {
  430. .queue_setup = bdisp_queue_setup,
  431. .buf_prepare = bdisp_buf_prepare,
  432. .buf_queue = bdisp_buf_queue,
  433. .wait_prepare = vb2_ops_wait_prepare,
  434. .wait_finish = vb2_ops_wait_finish,
  435. .stop_streaming = bdisp_stop_streaming,
  436. .start_streaming = bdisp_start_streaming,
  437. };
  438. static int queue_init(void *priv,
  439. struct vb2_queue *src_vq, struct vb2_queue *dst_vq)
  440. {
  441. struct bdisp_ctx *ctx = priv;
  442. int ret;
  443. memset(src_vq, 0, sizeof(*src_vq));
  444. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  445. src_vq->io_modes = VB2_MMAP | VB2_DMABUF;
  446. src_vq->drv_priv = ctx;
  447. src_vq->ops = &bdisp_qops;
  448. src_vq->mem_ops = &vb2_dma_contig_memops;
  449. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  450. src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  451. src_vq->lock = &ctx->bdisp_dev->lock;
  452. ret = vb2_queue_init(src_vq);
  453. if (ret)
  454. return ret;
  455. memset(dst_vq, 0, sizeof(*dst_vq));
  456. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  457. dst_vq->io_modes = VB2_MMAP | VB2_DMABUF;
  458. dst_vq->drv_priv = ctx;
  459. dst_vq->ops = &bdisp_qops;
  460. dst_vq->mem_ops = &vb2_dma_contig_memops;
  461. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  462. dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  463. dst_vq->lock = &ctx->bdisp_dev->lock;
  464. return vb2_queue_init(dst_vq);
  465. }
  466. static int bdisp_open(struct file *file)
  467. {
  468. struct bdisp_dev *bdisp = video_drvdata(file);
  469. struct bdisp_ctx *ctx = NULL;
  470. int ret;
  471. if (mutex_lock_interruptible(&bdisp->lock))
  472. return -ERESTARTSYS;
  473. /* Allocate memory for both context and node */
  474. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  475. if (!ctx) {
  476. ret = -ENOMEM;
  477. goto unlock;
  478. }
  479. ctx->bdisp_dev = bdisp;
  480. if (bdisp_hw_alloc_nodes(ctx)) {
  481. dev_err(bdisp->dev, "no memory for nodes\n");
  482. ret = -ENOMEM;
  483. goto mem_ctx;
  484. }
  485. v4l2_fh_init(&ctx->fh, bdisp->m2m.vdev);
  486. ret = bdisp_ctrls_create(ctx);
  487. if (ret) {
  488. dev_err(bdisp->dev, "Failed to create control\n");
  489. goto error_fh;
  490. }
  491. /* Use separate control handler per file handle */
  492. ctx->fh.ctrl_handler = &ctx->ctrl_handler;
  493. file->private_data = &ctx->fh;
  494. v4l2_fh_add(&ctx->fh);
  495. /* Default format */
  496. ctx->src = bdisp_dflt_fmt;
  497. ctx->dst = bdisp_dflt_fmt;
  498. /* Setup the device context for mem2mem mode. */
  499. ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(bdisp->m2m.m2m_dev, ctx,
  500. queue_init);
  501. if (IS_ERR(ctx->fh.m2m_ctx)) {
  502. dev_err(bdisp->dev, "Failed to initialize m2m context\n");
  503. ret = PTR_ERR(ctx->fh.m2m_ctx);
  504. goto error_ctrls;
  505. }
  506. bdisp->m2m.refcnt++;
  507. set_bit(ST_M2M_OPEN, &bdisp->state);
  508. dev_dbg(bdisp->dev, "driver opened, ctx = 0x%p\n", ctx);
  509. mutex_unlock(&bdisp->lock);
  510. return 0;
  511. error_ctrls:
  512. bdisp_ctrls_delete(ctx);
  513. error_fh:
  514. v4l2_fh_del(&ctx->fh);
  515. v4l2_fh_exit(&ctx->fh);
  516. bdisp_hw_free_nodes(ctx);
  517. mem_ctx:
  518. kfree(ctx);
  519. unlock:
  520. mutex_unlock(&bdisp->lock);
  521. return ret;
  522. }
  523. static int bdisp_release(struct file *file)
  524. {
  525. struct bdisp_ctx *ctx = fh_to_ctx(file->private_data);
  526. struct bdisp_dev *bdisp = ctx->bdisp_dev;
  527. dev_dbg(bdisp->dev, "%s\n", __func__);
  528. if (mutex_lock_interruptible(&bdisp->lock))
  529. return -ERESTARTSYS;
  530. v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
  531. bdisp_ctrls_delete(ctx);
  532. v4l2_fh_del(&ctx->fh);
  533. v4l2_fh_exit(&ctx->fh);
  534. if (--bdisp->m2m.refcnt <= 0)
  535. clear_bit(ST_M2M_OPEN, &bdisp->state);
  536. bdisp_hw_free_nodes(ctx);
  537. kfree(ctx);
  538. mutex_unlock(&bdisp->lock);
  539. return 0;
  540. }
  541. static const struct v4l2_file_operations bdisp_fops = {
  542. .owner = THIS_MODULE,
  543. .open = bdisp_open,
  544. .release = bdisp_release,
  545. .poll = v4l2_m2m_fop_poll,
  546. .unlocked_ioctl = video_ioctl2,
  547. .mmap = v4l2_m2m_fop_mmap,
  548. };
  549. static int bdisp_querycap(struct file *file, void *fh,
  550. struct v4l2_capability *cap)
  551. {
  552. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  553. struct bdisp_dev *bdisp = ctx->bdisp_dev;
  554. strlcpy(cap->driver, bdisp->pdev->name, sizeof(cap->driver));
  555. strlcpy(cap->card, bdisp->pdev->name, sizeof(cap->card));
  556. snprintf(cap->bus_info, sizeof(cap->bus_info), "platform:%s%d",
  557. BDISP_NAME, bdisp->id);
  558. cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_M2M;
  559. cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
  560. return 0;
  561. }
  562. static int bdisp_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f)
  563. {
  564. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  565. const struct bdisp_fmt *fmt;
  566. if (f->index >= ARRAY_SIZE(bdisp_formats))
  567. return -EINVAL;
  568. fmt = &bdisp_formats[f->index];
  569. if ((fmt->pixelformat == V4L2_PIX_FMT_YUV420) &&
  570. (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)) {
  571. dev_dbg(ctx->bdisp_dev->dev, "No YU12 on capture\n");
  572. return -EINVAL;
  573. }
  574. f->pixelformat = fmt->pixelformat;
  575. return 0;
  576. }
  577. static int bdisp_g_fmt(struct file *file, void *fh, struct v4l2_format *f)
  578. {
  579. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  580. struct v4l2_pix_format *pix = &f->fmt.pix;
  581. struct bdisp_frame *frame = ctx_get_frame(ctx, f->type);
  582. if (IS_ERR(frame)) {
  583. dev_err(ctx->bdisp_dev->dev, "Invalid frame (%p)\n", frame);
  584. return PTR_ERR(frame);
  585. }
  586. pix = &f->fmt.pix;
  587. pix->width = frame->width;
  588. pix->height = frame->height;
  589. pix->pixelformat = frame->fmt->pixelformat;
  590. pix->field = frame->field;
  591. pix->bytesperline = frame->bytesperline;
  592. pix->sizeimage = frame->sizeimage;
  593. pix->colorspace = (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) ?
  594. frame->colorspace : bdisp_dflt_fmt.colorspace;
  595. return 0;
  596. }
  597. static int bdisp_try_fmt(struct file *file, void *fh, struct v4l2_format *f)
  598. {
  599. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  600. struct v4l2_pix_format *pix = &f->fmt.pix;
  601. const struct bdisp_fmt *format;
  602. u32 in_w, in_h;
  603. format = bdisp_find_fmt(pix->pixelformat);
  604. if (!format) {
  605. dev_dbg(ctx->bdisp_dev->dev, "Unknown format 0x%x\n",
  606. pix->pixelformat);
  607. return -EINVAL;
  608. }
  609. /* YUV420P only supported for VIDEO_OUTPUT */
  610. if ((format->pixelformat == V4L2_PIX_FMT_YUV420) &&
  611. (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)) {
  612. dev_dbg(ctx->bdisp_dev->dev, "No YU12 on capture\n");
  613. return -EINVAL;
  614. }
  615. /* Field (interlaced only supported on OUTPUT) */
  616. if ((f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) ||
  617. (pix->field != V4L2_FIELD_INTERLACED))
  618. pix->field = V4L2_FIELD_NONE;
  619. /* Adjust width & height */
  620. in_w = pix->width;
  621. in_h = pix->height;
  622. v4l_bound_align_image(&pix->width,
  623. BDISP_MIN_W, BDISP_MAX_W,
  624. ffs(format->w_align) - 1,
  625. &pix->height,
  626. BDISP_MIN_H, BDISP_MAX_H,
  627. ffs(format->h_align) - 1,
  628. 0);
  629. if ((pix->width != in_w) || (pix->height != in_h))
  630. dev_dbg(ctx->bdisp_dev->dev,
  631. "%s size updated: %dx%d -> %dx%d\n", __func__,
  632. in_w, in_h, pix->width, pix->height);
  633. pix->bytesperline = (pix->width * format->bpp_plane0) / 8;
  634. pix->sizeimage = (pix->width * pix->height * format->bpp) / 8;
  635. if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
  636. pix->colorspace = bdisp_dflt_fmt.colorspace;
  637. return 0;
  638. }
  639. static int bdisp_s_fmt(struct file *file, void *fh, struct v4l2_format *f)
  640. {
  641. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  642. struct vb2_queue *vq;
  643. struct bdisp_frame *frame;
  644. struct v4l2_pix_format *pix;
  645. int ret;
  646. u32 state;
  647. ret = bdisp_try_fmt(file, fh, f);
  648. if (ret) {
  649. dev_err(ctx->bdisp_dev->dev, "Cannot set format\n");
  650. return ret;
  651. }
  652. vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
  653. if (vb2_is_streaming(vq)) {
  654. dev_err(ctx->bdisp_dev->dev, "queue (%d) busy\n", f->type);
  655. return -EBUSY;
  656. }
  657. frame = (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) ?
  658. &ctx->src : &ctx->dst;
  659. pix = &f->fmt.pix;
  660. frame->fmt = bdisp_find_fmt(pix->pixelformat);
  661. if (!frame->fmt) {
  662. dev_err(ctx->bdisp_dev->dev, "Unknown format 0x%x\n",
  663. pix->pixelformat);
  664. return -EINVAL;
  665. }
  666. frame->width = pix->width;
  667. frame->height = pix->height;
  668. frame->bytesperline = pix->bytesperline;
  669. frame->sizeimage = pix->sizeimage;
  670. frame->field = pix->field;
  671. if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
  672. frame->colorspace = pix->colorspace;
  673. frame->crop.width = frame->width;
  674. frame->crop.height = frame->height;
  675. frame->crop.left = 0;
  676. frame->crop.top = 0;
  677. state = BDISP_PARAMS;
  678. state |= (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) ?
  679. BDISP_DST_FMT : BDISP_SRC_FMT;
  680. bdisp_ctx_state_lock_set(state, ctx);
  681. return 0;
  682. }
  683. static int bdisp_g_selection(struct file *file, void *fh,
  684. struct v4l2_selection *s)
  685. {
  686. struct bdisp_frame *frame;
  687. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  688. frame = ctx_get_frame(ctx, s->type);
  689. if (IS_ERR(frame)) {
  690. dev_err(ctx->bdisp_dev->dev, "Invalid frame (%p)\n", frame);
  691. return PTR_ERR(frame);
  692. }
  693. switch (s->type) {
  694. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  695. switch (s->target) {
  696. case V4L2_SEL_TGT_CROP:
  697. /* cropped frame */
  698. s->r = frame->crop;
  699. break;
  700. case V4L2_SEL_TGT_CROP_DEFAULT:
  701. case V4L2_SEL_TGT_CROP_BOUNDS:
  702. /* complete frame */
  703. s->r.left = 0;
  704. s->r.top = 0;
  705. s->r.width = frame->width;
  706. s->r.height = frame->height;
  707. break;
  708. default:
  709. dev_err(ctx->bdisp_dev->dev, "Invalid target\n");
  710. return -EINVAL;
  711. }
  712. break;
  713. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  714. switch (s->target) {
  715. case V4L2_SEL_TGT_COMPOSE:
  716. case V4L2_SEL_TGT_COMPOSE_PADDED:
  717. /* composed (cropped) frame */
  718. s->r = frame->crop;
  719. break;
  720. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  721. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  722. /* complete frame */
  723. s->r.left = 0;
  724. s->r.top = 0;
  725. s->r.width = frame->width;
  726. s->r.height = frame->height;
  727. break;
  728. default:
  729. dev_err(ctx->bdisp_dev->dev, "Invalid target\n");
  730. return -EINVAL;
  731. }
  732. break;
  733. default:
  734. dev_err(ctx->bdisp_dev->dev, "Invalid type\n");
  735. return -EINVAL;
  736. }
  737. return 0;
  738. }
  739. static int is_rect_enclosed(struct v4l2_rect *a, struct v4l2_rect *b)
  740. {
  741. /* Return 1 if a is enclosed in b, or 0 otherwise. */
  742. if (a->left < b->left || a->top < b->top)
  743. return 0;
  744. if (a->left + a->width > b->left + b->width)
  745. return 0;
  746. if (a->top + a->height > b->top + b->height)
  747. return 0;
  748. return 1;
  749. }
  750. static int bdisp_s_selection(struct file *file, void *fh,
  751. struct v4l2_selection *s)
  752. {
  753. struct bdisp_frame *frame;
  754. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  755. struct v4l2_rect *in, out;
  756. bool valid = false;
  757. if ((s->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) &&
  758. (s->target == V4L2_SEL_TGT_CROP))
  759. valid = true;
  760. if ((s->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  761. (s->target == V4L2_SEL_TGT_COMPOSE))
  762. valid = true;
  763. if (!valid) {
  764. dev_err(ctx->bdisp_dev->dev, "Invalid type / target\n");
  765. return -EINVAL;
  766. }
  767. frame = ctx_get_frame(ctx, s->type);
  768. if (IS_ERR(frame)) {
  769. dev_err(ctx->bdisp_dev->dev, "Invalid frame (%p)\n", frame);
  770. return PTR_ERR(frame);
  771. }
  772. in = &s->r;
  773. out = *in;
  774. /* Align and check origin */
  775. out.left = ALIGN(in->left, frame->fmt->w_align);
  776. out.top = ALIGN(in->top, frame->fmt->h_align);
  777. if ((out.left < 0) || (out.left >= frame->width) ||
  778. (out.top < 0) || (out.top >= frame->height)) {
  779. dev_err(ctx->bdisp_dev->dev,
  780. "Invalid crop: %dx%d@(%d,%d) vs frame: %dx%d\n",
  781. out.width, out.height, out.left, out.top,
  782. frame->width, frame->height);
  783. return -EINVAL;
  784. }
  785. /* Align and check size */
  786. out.width = ALIGN(in->width, frame->fmt->w_align);
  787. out.height = ALIGN(in->height, frame->fmt->w_align);
  788. if (((out.left + out.width) > frame->width) ||
  789. ((out.top + out.height) > frame->height)) {
  790. dev_err(ctx->bdisp_dev->dev,
  791. "Invalid crop: %dx%d@(%d,%d) vs frame: %dx%d\n",
  792. out.width, out.height, out.left, out.top,
  793. frame->width, frame->height);
  794. return -EINVAL;
  795. }
  796. /* Checks adjust constraints flags */
  797. if (s->flags & V4L2_SEL_FLAG_LE && !is_rect_enclosed(&out, in))
  798. return -ERANGE;
  799. if (s->flags & V4L2_SEL_FLAG_GE && !is_rect_enclosed(in, &out))
  800. return -ERANGE;
  801. if ((out.left != in->left) || (out.top != in->top) ||
  802. (out.width != in->width) || (out.height != in->height)) {
  803. dev_dbg(ctx->bdisp_dev->dev,
  804. "%s crop updated: %dx%d@(%d,%d) -> %dx%d@(%d,%d)\n",
  805. __func__, in->width, in->height, in->left, in->top,
  806. out.width, out.height, out.left, out.top);
  807. *in = out;
  808. }
  809. frame->crop = out;
  810. bdisp_ctx_state_lock_set(BDISP_PARAMS, ctx);
  811. return 0;
  812. }
  813. static int bdisp_streamon(struct file *file, void *fh, enum v4l2_buf_type type)
  814. {
  815. struct bdisp_ctx *ctx = fh_to_ctx(fh);
  816. if ((type == V4L2_BUF_TYPE_VIDEO_OUTPUT) &&
  817. !bdisp_ctx_state_is_set(BDISP_SRC_FMT, ctx)) {
  818. dev_err(ctx->bdisp_dev->dev, "src not defined\n");
  819. return -EINVAL;
  820. }
  821. if ((type == V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
  822. !bdisp_ctx_state_is_set(BDISP_DST_FMT, ctx)) {
  823. dev_err(ctx->bdisp_dev->dev, "dst not defined\n");
  824. return -EINVAL;
  825. }
  826. return v4l2_m2m_streamon(file, ctx->fh.m2m_ctx, type);
  827. }
  828. static const struct v4l2_ioctl_ops bdisp_ioctl_ops = {
  829. .vidioc_querycap = bdisp_querycap,
  830. .vidioc_enum_fmt_vid_cap = bdisp_enum_fmt,
  831. .vidioc_enum_fmt_vid_out = bdisp_enum_fmt,
  832. .vidioc_g_fmt_vid_cap = bdisp_g_fmt,
  833. .vidioc_g_fmt_vid_out = bdisp_g_fmt,
  834. .vidioc_try_fmt_vid_cap = bdisp_try_fmt,
  835. .vidioc_try_fmt_vid_out = bdisp_try_fmt,
  836. .vidioc_s_fmt_vid_cap = bdisp_s_fmt,
  837. .vidioc_s_fmt_vid_out = bdisp_s_fmt,
  838. .vidioc_g_selection = bdisp_g_selection,
  839. .vidioc_s_selection = bdisp_s_selection,
  840. .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
  841. .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
  842. .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
  843. .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
  844. .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
  845. .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
  846. .vidioc_streamon = bdisp_streamon,
  847. .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
  848. .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
  849. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  850. };
  851. static int bdisp_register_device(struct bdisp_dev *bdisp)
  852. {
  853. int ret;
  854. if (!bdisp)
  855. return -ENODEV;
  856. bdisp->vdev.fops = &bdisp_fops;
  857. bdisp->vdev.ioctl_ops = &bdisp_ioctl_ops;
  858. bdisp->vdev.release = video_device_release_empty;
  859. bdisp->vdev.lock = &bdisp->lock;
  860. bdisp->vdev.vfl_dir = VFL_DIR_M2M;
  861. bdisp->vdev.v4l2_dev = &bdisp->v4l2_dev;
  862. snprintf(bdisp->vdev.name, sizeof(bdisp->vdev.name), "%s.%d",
  863. BDISP_NAME, bdisp->id);
  864. video_set_drvdata(&bdisp->vdev, bdisp);
  865. bdisp->m2m.vdev = &bdisp->vdev;
  866. bdisp->m2m.m2m_dev = v4l2_m2m_init(&bdisp_m2m_ops);
  867. if (IS_ERR(bdisp->m2m.m2m_dev)) {
  868. dev_err(bdisp->dev, "failed to initialize v4l2-m2m device\n");
  869. return PTR_ERR(bdisp->m2m.m2m_dev);
  870. }
  871. ret = video_register_device(&bdisp->vdev, VFL_TYPE_GRABBER, -1);
  872. if (ret) {
  873. dev_err(bdisp->dev,
  874. "%s(): failed to register video device\n", __func__);
  875. v4l2_m2m_release(bdisp->m2m.m2m_dev);
  876. return ret;
  877. }
  878. return 0;
  879. }
  880. static void bdisp_unregister_device(struct bdisp_dev *bdisp)
  881. {
  882. if (!bdisp)
  883. return;
  884. if (bdisp->m2m.m2m_dev)
  885. v4l2_m2m_release(bdisp->m2m.m2m_dev);
  886. video_unregister_device(bdisp->m2m.vdev);
  887. }
  888. static irqreturn_t bdisp_irq_thread(int irq, void *priv)
  889. {
  890. struct bdisp_dev *bdisp = priv;
  891. struct bdisp_ctx *ctx;
  892. spin_lock(&bdisp->slock);
  893. bdisp_dbg_perf_end(bdisp);
  894. cancel_delayed_work(&bdisp->timeout_work);
  895. if (!test_and_clear_bit(ST_M2M_RUNNING, &bdisp->state))
  896. goto isr_unlock;
  897. if (test_and_clear_bit(ST_M2M_SUSPENDING, &bdisp->state)) {
  898. set_bit(ST_M2M_SUSPENDED, &bdisp->state);
  899. wake_up(&bdisp->irq_queue);
  900. goto isr_unlock;
  901. }
  902. ctx = v4l2_m2m_get_curr_priv(bdisp->m2m.m2m_dev);
  903. if (!ctx || !ctx->fh.m2m_ctx)
  904. goto isr_unlock;
  905. spin_unlock(&bdisp->slock);
  906. bdisp_job_finish(ctx, VB2_BUF_STATE_DONE);
  907. if (bdisp_ctx_state_is_set(BDISP_CTX_STOP_REQ, ctx)) {
  908. bdisp_ctx_state_lock_clear(BDISP_CTX_STOP_REQ, ctx);
  909. wake_up(&bdisp->irq_queue);
  910. }
  911. return IRQ_HANDLED;
  912. isr_unlock:
  913. spin_unlock(&bdisp->slock);
  914. return IRQ_HANDLED;
  915. }
  916. static irqreturn_t bdisp_irq_handler(int irq, void *priv)
  917. {
  918. if (bdisp_hw_get_and_clear_irq((struct bdisp_dev *)priv))
  919. return IRQ_NONE;
  920. else
  921. return IRQ_WAKE_THREAD;
  922. }
  923. static void bdisp_irq_timeout(struct work_struct *ptr)
  924. {
  925. struct delayed_work *twork = to_delayed_work(ptr);
  926. struct bdisp_dev *bdisp = container_of(twork, struct bdisp_dev,
  927. timeout_work);
  928. struct bdisp_ctx *ctx;
  929. ctx = v4l2_m2m_get_curr_priv(bdisp->m2m.m2m_dev);
  930. dev_err(ctx->bdisp_dev->dev, "Device work timeout\n");
  931. spin_lock(&bdisp->slock);
  932. clear_bit(ST_M2M_RUNNING, &bdisp->state);
  933. spin_unlock(&bdisp->slock);
  934. bdisp_hw_reset(bdisp);
  935. bdisp_job_finish(ctx, VB2_BUF_STATE_ERROR);
  936. }
  937. static int bdisp_m2m_suspend(struct bdisp_dev *bdisp)
  938. {
  939. unsigned long flags;
  940. int timeout;
  941. spin_lock_irqsave(&bdisp->slock, flags);
  942. if (!test_bit(ST_M2M_RUNNING, &bdisp->state)) {
  943. spin_unlock_irqrestore(&bdisp->slock, flags);
  944. return 0;
  945. }
  946. clear_bit(ST_M2M_SUSPENDED, &bdisp->state);
  947. set_bit(ST_M2M_SUSPENDING, &bdisp->state);
  948. spin_unlock_irqrestore(&bdisp->slock, flags);
  949. timeout = wait_event_timeout(bdisp->irq_queue,
  950. test_bit(ST_M2M_SUSPENDED, &bdisp->state),
  951. BDISP_WORK_TIMEOUT);
  952. clear_bit(ST_M2M_SUSPENDING, &bdisp->state);
  953. if (!timeout) {
  954. dev_err(bdisp->dev, "%s IRQ timeout\n", __func__);
  955. return -EAGAIN;
  956. }
  957. return 0;
  958. }
  959. static int bdisp_m2m_resume(struct bdisp_dev *bdisp)
  960. {
  961. struct bdisp_ctx *ctx;
  962. unsigned long flags;
  963. spin_lock_irqsave(&bdisp->slock, flags);
  964. ctx = bdisp->m2m.ctx;
  965. bdisp->m2m.ctx = NULL;
  966. spin_unlock_irqrestore(&bdisp->slock, flags);
  967. if (test_and_clear_bit(ST_M2M_SUSPENDED, &bdisp->state))
  968. bdisp_job_finish(ctx, VB2_BUF_STATE_ERROR);
  969. return 0;
  970. }
  971. static int bdisp_runtime_resume(struct device *dev)
  972. {
  973. struct bdisp_dev *bdisp = dev_get_drvdata(dev);
  974. int ret = clk_enable(bdisp->clock);
  975. if (ret)
  976. return ret;
  977. return bdisp_m2m_resume(bdisp);
  978. }
  979. static int bdisp_runtime_suspend(struct device *dev)
  980. {
  981. struct bdisp_dev *bdisp = dev_get_drvdata(dev);
  982. int ret = bdisp_m2m_suspend(bdisp);
  983. if (!ret)
  984. clk_disable(bdisp->clock);
  985. return ret;
  986. }
  987. static int bdisp_resume(struct device *dev)
  988. {
  989. struct bdisp_dev *bdisp = dev_get_drvdata(dev);
  990. unsigned long flags;
  991. int opened;
  992. spin_lock_irqsave(&bdisp->slock, flags);
  993. opened = test_bit(ST_M2M_OPEN, &bdisp->state);
  994. spin_unlock_irqrestore(&bdisp->slock, flags);
  995. if (!opened)
  996. return 0;
  997. if (!pm_runtime_suspended(dev))
  998. return bdisp_runtime_resume(dev);
  999. return 0;
  1000. }
  1001. static int bdisp_suspend(struct device *dev)
  1002. {
  1003. if (!pm_runtime_suspended(dev))
  1004. return bdisp_runtime_suspend(dev);
  1005. return 0;
  1006. }
  1007. static const struct dev_pm_ops bdisp_pm_ops = {
  1008. .suspend = bdisp_suspend,
  1009. .resume = bdisp_resume,
  1010. .runtime_suspend = bdisp_runtime_suspend,
  1011. .runtime_resume = bdisp_runtime_resume,
  1012. };
  1013. static int bdisp_remove(struct platform_device *pdev)
  1014. {
  1015. struct bdisp_dev *bdisp = platform_get_drvdata(pdev);
  1016. bdisp_unregister_device(bdisp);
  1017. bdisp_hw_free_filters(bdisp->dev);
  1018. vb2_dma_contig_cleanup_ctx(bdisp->alloc_ctx);
  1019. pm_runtime_disable(&pdev->dev);
  1020. bdisp_debugfs_remove(bdisp);
  1021. v4l2_device_unregister(&bdisp->v4l2_dev);
  1022. if (!IS_ERR(bdisp->clock))
  1023. clk_unprepare(bdisp->clock);
  1024. dev_dbg(&pdev->dev, "%s driver unloaded\n", pdev->name);
  1025. return 0;
  1026. }
  1027. static int bdisp_probe(struct platform_device *pdev)
  1028. {
  1029. struct bdisp_dev *bdisp;
  1030. struct resource *res;
  1031. struct device *dev = &pdev->dev;
  1032. int ret;
  1033. dev_dbg(dev, "%s\n", __func__);
  1034. bdisp = devm_kzalloc(dev, sizeof(struct bdisp_dev), GFP_KERNEL);
  1035. if (!bdisp)
  1036. return -ENOMEM;
  1037. bdisp->pdev = pdev;
  1038. bdisp->dev = dev;
  1039. platform_set_drvdata(pdev, bdisp);
  1040. if (dev->of_node)
  1041. bdisp->id = of_alias_get_id(pdev->dev.of_node, BDISP_NAME);
  1042. else
  1043. bdisp->id = pdev->id;
  1044. init_waitqueue_head(&bdisp->irq_queue);
  1045. INIT_DELAYED_WORK(&bdisp->timeout_work, bdisp_irq_timeout);
  1046. bdisp->work_queue = create_workqueue(BDISP_NAME);
  1047. spin_lock_init(&bdisp->slock);
  1048. mutex_init(&bdisp->lock);
  1049. /* get resources */
  1050. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1051. bdisp->regs = devm_ioremap_resource(dev, res);
  1052. if (IS_ERR(bdisp->regs)) {
  1053. dev_err(dev, "failed to get regs\n");
  1054. return PTR_ERR(bdisp->regs);
  1055. }
  1056. bdisp->clock = devm_clk_get(dev, BDISP_NAME);
  1057. if (IS_ERR(bdisp->clock)) {
  1058. dev_err(dev, "failed to get clock\n");
  1059. return PTR_ERR(bdisp->clock);
  1060. }
  1061. ret = clk_prepare(bdisp->clock);
  1062. if (ret < 0) {
  1063. dev_err(dev, "clock prepare failed\n");
  1064. bdisp->clock = ERR_PTR(-EINVAL);
  1065. return ret;
  1066. }
  1067. res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  1068. if (!res) {
  1069. dev_err(dev, "failed to get IRQ resource\n");
  1070. goto err_clk;
  1071. }
  1072. ret = devm_request_threaded_irq(dev, res->start, bdisp_irq_handler,
  1073. bdisp_irq_thread, IRQF_ONESHOT,
  1074. pdev->name, bdisp);
  1075. if (ret) {
  1076. dev_err(dev, "failed to install irq\n");
  1077. goto err_clk;
  1078. }
  1079. /* v4l2 register */
  1080. ret = v4l2_device_register(dev, &bdisp->v4l2_dev);
  1081. if (ret) {
  1082. dev_err(dev, "failed to register\n");
  1083. goto err_clk;
  1084. }
  1085. /* Debug */
  1086. ret = bdisp_debugfs_create(bdisp);
  1087. if (ret) {
  1088. dev_err(dev, "failed to create debugfs\n");
  1089. goto err_v4l2;
  1090. }
  1091. /* Power management */
  1092. pm_runtime_enable(dev);
  1093. ret = pm_runtime_get_sync(dev);
  1094. if (ret < 0) {
  1095. dev_err(dev, "failed to set PM\n");
  1096. goto err_dbg;
  1097. }
  1098. /* Continuous memory allocator */
  1099. bdisp->alloc_ctx = vb2_dma_contig_init_ctx(dev);
  1100. if (IS_ERR(bdisp->alloc_ctx)) {
  1101. ret = PTR_ERR(bdisp->alloc_ctx);
  1102. goto err_pm;
  1103. }
  1104. /* Filters */
  1105. if (bdisp_hw_alloc_filters(bdisp->dev)) {
  1106. dev_err(bdisp->dev, "no memory for filters\n");
  1107. ret = -ENOMEM;
  1108. goto err_vb2_dma;
  1109. }
  1110. /* Register */
  1111. ret = bdisp_register_device(bdisp);
  1112. if (ret) {
  1113. dev_err(dev, "failed to register\n");
  1114. goto err_filter;
  1115. }
  1116. dev_info(dev, "%s%d registered as /dev/video%d\n", BDISP_NAME,
  1117. bdisp->id, bdisp->vdev.num);
  1118. pm_runtime_put(dev);
  1119. return 0;
  1120. err_filter:
  1121. bdisp_hw_free_filters(bdisp->dev);
  1122. err_vb2_dma:
  1123. vb2_dma_contig_cleanup_ctx(bdisp->alloc_ctx);
  1124. err_pm:
  1125. pm_runtime_put(dev);
  1126. err_dbg:
  1127. bdisp_debugfs_remove(bdisp);
  1128. err_v4l2:
  1129. v4l2_device_unregister(&bdisp->v4l2_dev);
  1130. err_clk:
  1131. if (!IS_ERR(bdisp->clock))
  1132. clk_unprepare(bdisp->clock);
  1133. return ret;
  1134. }
  1135. static const struct of_device_id bdisp_match_types[] = {
  1136. {
  1137. .compatible = "st,stih407-bdisp",
  1138. },
  1139. { /* end node */ }
  1140. };
  1141. MODULE_DEVICE_TABLE(of, bdisp_match_types);
  1142. static struct platform_driver bdisp_driver = {
  1143. .probe = bdisp_probe,
  1144. .remove = bdisp_remove,
  1145. .driver = {
  1146. .name = BDISP_NAME,
  1147. .of_match_table = bdisp_match_types,
  1148. .pm = &bdisp_pm_ops,
  1149. },
  1150. };
  1151. module_platform_driver(bdisp_driver);
  1152. MODULE_DESCRIPTION("2D blitter for STMicroelectronics SoC");
  1153. MODULE_AUTHOR("Fabien Dessenne <fabien.dessenne@st.com>");
  1154. MODULE_LICENSE("GPL");