e4000.c 18 KB

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  1. /*
  2. * Elonics E4000 silicon tuner driver
  3. *
  4. * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. #include "e4000_priv.h"
  21. static int e4000_init(struct e4000_dev *dev)
  22. {
  23. struct i2c_client *client = dev->client;
  24. int ret;
  25. dev_dbg(&client->dev, "\n");
  26. /* reset */
  27. ret = regmap_write(dev->regmap, 0x00, 0x01);
  28. if (ret)
  29. goto err;
  30. /* disable output clock */
  31. ret = regmap_write(dev->regmap, 0x06, 0x00);
  32. if (ret)
  33. goto err;
  34. ret = regmap_write(dev->regmap, 0x7a, 0x96);
  35. if (ret)
  36. goto err;
  37. /* configure gains */
  38. ret = regmap_bulk_write(dev->regmap, 0x7e, "\x01\xfe", 2);
  39. if (ret)
  40. goto err;
  41. ret = regmap_write(dev->regmap, 0x82, 0x00);
  42. if (ret)
  43. goto err;
  44. ret = regmap_write(dev->regmap, 0x24, 0x05);
  45. if (ret)
  46. goto err;
  47. ret = regmap_bulk_write(dev->regmap, 0x87, "\x20\x01", 2);
  48. if (ret)
  49. goto err;
  50. ret = regmap_bulk_write(dev->regmap, 0x9f, "\x7f\x07", 2);
  51. if (ret)
  52. goto err;
  53. /* DC offset control */
  54. ret = regmap_write(dev->regmap, 0x2d, 0x1f);
  55. if (ret)
  56. goto err;
  57. ret = regmap_bulk_write(dev->regmap, 0x70, "\x01\x01", 2);
  58. if (ret)
  59. goto err;
  60. /* gain control */
  61. ret = regmap_write(dev->regmap, 0x1a, 0x17);
  62. if (ret)
  63. goto err;
  64. ret = regmap_write(dev->regmap, 0x1f, 0x1a);
  65. if (ret)
  66. goto err;
  67. dev->active = true;
  68. return 0;
  69. err:
  70. dev_dbg(&client->dev, "failed=%d\n", ret);
  71. return ret;
  72. }
  73. static int e4000_sleep(struct e4000_dev *dev)
  74. {
  75. struct i2c_client *client = dev->client;
  76. int ret;
  77. dev_dbg(&client->dev, "\n");
  78. dev->active = false;
  79. ret = regmap_write(dev->regmap, 0x00, 0x00);
  80. if (ret)
  81. goto err;
  82. return 0;
  83. err:
  84. dev_dbg(&client->dev, "failed=%d\n", ret);
  85. return ret;
  86. }
  87. static int e4000_set_params(struct e4000_dev *dev)
  88. {
  89. struct i2c_client *client = dev->client;
  90. int ret, i;
  91. unsigned int div_n, k, k_cw, div_out;
  92. u64 f_vco;
  93. u8 buf[5], i_data[4], q_data[4];
  94. if (!dev->active) {
  95. dev_dbg(&client->dev, "tuner is sleeping\n");
  96. return 0;
  97. }
  98. /* gain control manual */
  99. ret = regmap_write(dev->regmap, 0x1a, 0x00);
  100. if (ret)
  101. goto err;
  102. /*
  103. * Fractional-N synthesizer
  104. *
  105. * +----------------------------+
  106. * v |
  107. * Fref +----+ +-------+ +------+ +---+
  108. * ------> | PD | --> | VCO | ------> | /N.F | <-- | K |
  109. * +----+ +-------+ +------+ +---+
  110. * |
  111. * |
  112. * v
  113. * +-------+ Fout
  114. * | /Rout | ------>
  115. * +-------+
  116. */
  117. for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
  118. if (dev->f_frequency <= e4000_pll_lut[i].freq)
  119. break;
  120. }
  121. if (i == ARRAY_SIZE(e4000_pll_lut)) {
  122. ret = -EINVAL;
  123. goto err;
  124. }
  125. #define F_REF dev->clk
  126. div_out = e4000_pll_lut[i].div_out;
  127. f_vco = (u64) dev->f_frequency * div_out;
  128. /* calculate PLL integer and fractional control word */
  129. div_n = div_u64_rem(f_vco, F_REF, &k);
  130. k_cw = div_u64((u64) k * 0x10000, F_REF);
  131. dev_dbg(&client->dev,
  132. "frequency=%u bandwidth=%u f_vco=%llu F_REF=%u div_n=%u k=%u k_cw=%04x div_out=%u\n",
  133. dev->f_frequency, dev->f_bandwidth, f_vco, F_REF, div_n, k,
  134. k_cw, div_out);
  135. buf[0] = div_n;
  136. buf[1] = (k_cw >> 0) & 0xff;
  137. buf[2] = (k_cw >> 8) & 0xff;
  138. buf[3] = 0x00;
  139. buf[4] = e4000_pll_lut[i].div_out_reg;
  140. ret = regmap_bulk_write(dev->regmap, 0x09, buf, 5);
  141. if (ret)
  142. goto err;
  143. /* LNA filter (RF filter) */
  144. for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
  145. if (dev->f_frequency <= e400_lna_filter_lut[i].freq)
  146. break;
  147. }
  148. if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
  149. ret = -EINVAL;
  150. goto err;
  151. }
  152. ret = regmap_write(dev->regmap, 0x10, e400_lna_filter_lut[i].val);
  153. if (ret)
  154. goto err;
  155. /* IF filters */
  156. for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
  157. if (dev->f_bandwidth <= e4000_if_filter_lut[i].freq)
  158. break;
  159. }
  160. if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
  161. ret = -EINVAL;
  162. goto err;
  163. }
  164. buf[0] = e4000_if_filter_lut[i].reg11_val;
  165. buf[1] = e4000_if_filter_lut[i].reg12_val;
  166. ret = regmap_bulk_write(dev->regmap, 0x11, buf, 2);
  167. if (ret)
  168. goto err;
  169. /* frequency band */
  170. for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
  171. if (dev->f_frequency <= e4000_band_lut[i].freq)
  172. break;
  173. }
  174. if (i == ARRAY_SIZE(e4000_band_lut)) {
  175. ret = -EINVAL;
  176. goto err;
  177. }
  178. ret = regmap_write(dev->regmap, 0x07, e4000_band_lut[i].reg07_val);
  179. if (ret)
  180. goto err;
  181. ret = regmap_write(dev->regmap, 0x78, e4000_band_lut[i].reg78_val);
  182. if (ret)
  183. goto err;
  184. /* DC offset */
  185. for (i = 0; i < 4; i++) {
  186. if (i == 0)
  187. ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7e\x24", 3);
  188. else if (i == 1)
  189. ret = regmap_bulk_write(dev->regmap, 0x15, "\x00\x7f", 2);
  190. else if (i == 2)
  191. ret = regmap_bulk_write(dev->regmap, 0x15, "\x01", 1);
  192. else
  193. ret = regmap_bulk_write(dev->regmap, 0x16, "\x7e", 1);
  194. if (ret)
  195. goto err;
  196. ret = regmap_write(dev->regmap, 0x29, 0x01);
  197. if (ret)
  198. goto err;
  199. ret = regmap_bulk_read(dev->regmap, 0x2a, buf, 3);
  200. if (ret)
  201. goto err;
  202. i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
  203. q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
  204. }
  205. swap(q_data[2], q_data[3]);
  206. swap(i_data[2], i_data[3]);
  207. ret = regmap_bulk_write(dev->regmap, 0x50, q_data, 4);
  208. if (ret)
  209. goto err;
  210. ret = regmap_bulk_write(dev->regmap, 0x60, i_data, 4);
  211. if (ret)
  212. goto err;
  213. /* gain control auto */
  214. ret = regmap_write(dev->regmap, 0x1a, 0x17);
  215. if (ret)
  216. goto err;
  217. return 0;
  218. err:
  219. dev_dbg(&client->dev, "failed=%d\n", ret);
  220. return ret;
  221. }
  222. /*
  223. * V4L2 API
  224. */
  225. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  226. static const struct v4l2_frequency_band bands[] = {
  227. {
  228. .type = V4L2_TUNER_RF,
  229. .index = 0,
  230. .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
  231. .rangelow = 59000000,
  232. .rangehigh = 1105000000,
  233. },
  234. {
  235. .type = V4L2_TUNER_RF,
  236. .index = 1,
  237. .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
  238. .rangelow = 1249000000,
  239. .rangehigh = 2208000000UL,
  240. },
  241. };
  242. static inline struct e4000_dev *e4000_subdev_to_dev(struct v4l2_subdev *sd)
  243. {
  244. return container_of(sd, struct e4000_dev, sd);
  245. }
  246. static int e4000_s_power(struct v4l2_subdev *sd, int on)
  247. {
  248. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  249. struct i2c_client *client = dev->client;
  250. int ret;
  251. dev_dbg(&client->dev, "on=%d\n", on);
  252. if (on)
  253. ret = e4000_init(dev);
  254. else
  255. ret = e4000_sleep(dev);
  256. if (ret)
  257. return ret;
  258. return e4000_set_params(dev);
  259. }
  260. static const struct v4l2_subdev_core_ops e4000_subdev_core_ops = {
  261. .s_power = e4000_s_power,
  262. };
  263. static int e4000_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
  264. {
  265. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  266. struct i2c_client *client = dev->client;
  267. dev_dbg(&client->dev, "index=%d\n", v->index);
  268. strlcpy(v->name, "Elonics E4000", sizeof(v->name));
  269. v->type = V4L2_TUNER_RF;
  270. v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
  271. v->rangelow = bands[0].rangelow;
  272. v->rangehigh = bands[1].rangehigh;
  273. return 0;
  274. }
  275. static int e4000_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
  276. {
  277. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  278. struct i2c_client *client = dev->client;
  279. dev_dbg(&client->dev, "index=%d\n", v->index);
  280. return 0;
  281. }
  282. static int e4000_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
  283. {
  284. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  285. struct i2c_client *client = dev->client;
  286. dev_dbg(&client->dev, "tuner=%d\n", f->tuner);
  287. f->frequency = dev->f_frequency;
  288. return 0;
  289. }
  290. static int e4000_s_frequency(struct v4l2_subdev *sd,
  291. const struct v4l2_frequency *f)
  292. {
  293. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  294. struct i2c_client *client = dev->client;
  295. dev_dbg(&client->dev, "tuner=%d type=%d frequency=%u\n",
  296. f->tuner, f->type, f->frequency);
  297. dev->f_frequency = clamp_t(unsigned int, f->frequency,
  298. bands[0].rangelow, bands[1].rangehigh);
  299. return e4000_set_params(dev);
  300. }
  301. static int e4000_enum_freq_bands(struct v4l2_subdev *sd,
  302. struct v4l2_frequency_band *band)
  303. {
  304. struct e4000_dev *dev = e4000_subdev_to_dev(sd);
  305. struct i2c_client *client = dev->client;
  306. dev_dbg(&client->dev, "tuner=%d type=%d index=%d\n",
  307. band->tuner, band->type, band->index);
  308. if (band->index >= ARRAY_SIZE(bands))
  309. return -EINVAL;
  310. band->capability = bands[band->index].capability;
  311. band->rangelow = bands[band->index].rangelow;
  312. band->rangehigh = bands[band->index].rangehigh;
  313. return 0;
  314. }
  315. static const struct v4l2_subdev_tuner_ops e4000_subdev_tuner_ops = {
  316. .g_tuner = e4000_g_tuner,
  317. .s_tuner = e4000_s_tuner,
  318. .g_frequency = e4000_g_frequency,
  319. .s_frequency = e4000_s_frequency,
  320. .enum_freq_bands = e4000_enum_freq_bands,
  321. };
  322. static const struct v4l2_subdev_ops e4000_subdev_ops = {
  323. .core = &e4000_subdev_core_ops,
  324. .tuner = &e4000_subdev_tuner_ops,
  325. };
  326. static int e4000_set_lna_gain(struct dvb_frontend *fe)
  327. {
  328. struct e4000_dev *dev = fe->tuner_priv;
  329. struct i2c_client *client = dev->client;
  330. int ret;
  331. u8 u8tmp;
  332. dev_dbg(&client->dev, "lna auto=%d->%d val=%d->%d\n",
  333. dev->lna_gain_auto->cur.val, dev->lna_gain_auto->val,
  334. dev->lna_gain->cur.val, dev->lna_gain->val);
  335. if (dev->lna_gain_auto->val && dev->if_gain_auto->cur.val)
  336. u8tmp = 0x17;
  337. else if (dev->lna_gain_auto->val)
  338. u8tmp = 0x19;
  339. else if (dev->if_gain_auto->cur.val)
  340. u8tmp = 0x16;
  341. else
  342. u8tmp = 0x10;
  343. ret = regmap_write(dev->regmap, 0x1a, u8tmp);
  344. if (ret)
  345. goto err;
  346. if (dev->lna_gain_auto->val == false) {
  347. ret = regmap_write(dev->regmap, 0x14, dev->lna_gain->val);
  348. if (ret)
  349. goto err;
  350. }
  351. return 0;
  352. err:
  353. dev_dbg(&client->dev, "failed=%d\n", ret);
  354. return ret;
  355. }
  356. static int e4000_set_mixer_gain(struct dvb_frontend *fe)
  357. {
  358. struct e4000_dev *dev = fe->tuner_priv;
  359. struct i2c_client *client = dev->client;
  360. int ret;
  361. u8 u8tmp;
  362. dev_dbg(&client->dev, "mixer auto=%d->%d val=%d->%d\n",
  363. dev->mixer_gain_auto->cur.val, dev->mixer_gain_auto->val,
  364. dev->mixer_gain->cur.val, dev->mixer_gain->val);
  365. if (dev->mixer_gain_auto->val)
  366. u8tmp = 0x15;
  367. else
  368. u8tmp = 0x14;
  369. ret = regmap_write(dev->regmap, 0x20, u8tmp);
  370. if (ret)
  371. goto err;
  372. if (dev->mixer_gain_auto->val == false) {
  373. ret = regmap_write(dev->regmap, 0x15, dev->mixer_gain->val);
  374. if (ret)
  375. goto err;
  376. }
  377. return 0;
  378. err:
  379. dev_dbg(&client->dev, "failed=%d\n", ret);
  380. return ret;
  381. }
  382. static int e4000_set_if_gain(struct dvb_frontend *fe)
  383. {
  384. struct e4000_dev *dev = fe->tuner_priv;
  385. struct i2c_client *client = dev->client;
  386. int ret;
  387. u8 buf[2];
  388. u8 u8tmp;
  389. dev_dbg(&client->dev, "if auto=%d->%d val=%d->%d\n",
  390. dev->if_gain_auto->cur.val, dev->if_gain_auto->val,
  391. dev->if_gain->cur.val, dev->if_gain->val);
  392. if (dev->if_gain_auto->val && dev->lna_gain_auto->cur.val)
  393. u8tmp = 0x17;
  394. else if (dev->lna_gain_auto->cur.val)
  395. u8tmp = 0x19;
  396. else if (dev->if_gain_auto->val)
  397. u8tmp = 0x16;
  398. else
  399. u8tmp = 0x10;
  400. ret = regmap_write(dev->regmap, 0x1a, u8tmp);
  401. if (ret)
  402. goto err;
  403. if (dev->if_gain_auto->val == false) {
  404. buf[0] = e4000_if_gain_lut[dev->if_gain->val].reg16_val;
  405. buf[1] = e4000_if_gain_lut[dev->if_gain->val].reg17_val;
  406. ret = regmap_bulk_write(dev->regmap, 0x16, buf, 2);
  407. if (ret)
  408. goto err;
  409. }
  410. return 0;
  411. err:
  412. dev_dbg(&client->dev, "failed=%d\n", ret);
  413. return ret;
  414. }
  415. static int e4000_pll_lock(struct dvb_frontend *fe)
  416. {
  417. struct e4000_dev *dev = fe->tuner_priv;
  418. struct i2c_client *client = dev->client;
  419. int ret;
  420. unsigned int uitmp;
  421. ret = regmap_read(dev->regmap, 0x07, &uitmp);
  422. if (ret)
  423. goto err;
  424. dev->pll_lock->val = (uitmp & 0x01);
  425. return 0;
  426. err:
  427. dev_dbg(&client->dev, "failed=%d\n", ret);
  428. return ret;
  429. }
  430. static int e4000_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
  431. {
  432. struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
  433. struct i2c_client *client = dev->client;
  434. int ret;
  435. if (!dev->active)
  436. return 0;
  437. switch (ctrl->id) {
  438. case V4L2_CID_RF_TUNER_PLL_LOCK:
  439. ret = e4000_pll_lock(dev->fe);
  440. break;
  441. default:
  442. dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
  443. ctrl->id, ctrl->name);
  444. ret = -EINVAL;
  445. }
  446. return ret;
  447. }
  448. static int e4000_s_ctrl(struct v4l2_ctrl *ctrl)
  449. {
  450. struct e4000_dev *dev = container_of(ctrl->handler, struct e4000_dev, hdl);
  451. struct i2c_client *client = dev->client;
  452. int ret;
  453. if (!dev->active)
  454. return 0;
  455. switch (ctrl->id) {
  456. case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
  457. case V4L2_CID_RF_TUNER_BANDWIDTH:
  458. /*
  459. * TODO: Auto logic does not work 100% correctly as tuner driver
  460. * do not have information to calculate maximum suitable
  461. * bandwidth. Calculating it is responsible of master driver.
  462. */
  463. dev->f_bandwidth = dev->bandwidth->val;
  464. ret = e4000_set_params(dev);
  465. break;
  466. case V4L2_CID_RF_TUNER_LNA_GAIN_AUTO:
  467. case V4L2_CID_RF_TUNER_LNA_GAIN:
  468. ret = e4000_set_lna_gain(dev->fe);
  469. break;
  470. case V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO:
  471. case V4L2_CID_RF_TUNER_MIXER_GAIN:
  472. ret = e4000_set_mixer_gain(dev->fe);
  473. break;
  474. case V4L2_CID_RF_TUNER_IF_GAIN_AUTO:
  475. case V4L2_CID_RF_TUNER_IF_GAIN:
  476. ret = e4000_set_if_gain(dev->fe);
  477. break;
  478. default:
  479. dev_dbg(&client->dev, "unknown ctrl: id=%d name=%s\n",
  480. ctrl->id, ctrl->name);
  481. ret = -EINVAL;
  482. }
  483. return ret;
  484. }
  485. static const struct v4l2_ctrl_ops e4000_ctrl_ops = {
  486. .g_volatile_ctrl = e4000_g_volatile_ctrl,
  487. .s_ctrl = e4000_s_ctrl,
  488. };
  489. #endif
  490. /*
  491. * DVB API
  492. */
  493. static int e4000_dvb_set_params(struct dvb_frontend *fe)
  494. {
  495. struct e4000_dev *dev = fe->tuner_priv;
  496. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  497. dev->f_frequency = c->frequency;
  498. dev->f_bandwidth = c->bandwidth_hz;
  499. return e4000_set_params(dev);
  500. }
  501. static int e4000_dvb_init(struct dvb_frontend *fe)
  502. {
  503. return e4000_init(fe->tuner_priv);
  504. }
  505. static int e4000_dvb_sleep(struct dvb_frontend *fe)
  506. {
  507. return e4000_sleep(fe->tuner_priv);
  508. }
  509. static int e4000_dvb_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
  510. {
  511. *frequency = 0; /* Zero-IF */
  512. return 0;
  513. }
  514. static const struct dvb_tuner_ops e4000_dvb_tuner_ops = {
  515. .info = {
  516. .name = "Elonics E4000",
  517. .frequency_min = 174000000,
  518. .frequency_max = 862000000,
  519. },
  520. .init = e4000_dvb_init,
  521. .sleep = e4000_dvb_sleep,
  522. .set_params = e4000_dvb_set_params,
  523. .get_if_frequency = e4000_dvb_get_if_frequency,
  524. };
  525. static int e4000_probe(struct i2c_client *client,
  526. const struct i2c_device_id *id)
  527. {
  528. struct e4000_dev *dev;
  529. struct e4000_config *cfg = client->dev.platform_data;
  530. struct dvb_frontend *fe = cfg->fe;
  531. int ret;
  532. unsigned int uitmp;
  533. static const struct regmap_config regmap_config = {
  534. .reg_bits = 8,
  535. .val_bits = 8,
  536. };
  537. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  538. if (!dev) {
  539. ret = -ENOMEM;
  540. goto err;
  541. }
  542. dev->clk = cfg->clock;
  543. dev->client = client;
  544. dev->fe = cfg->fe;
  545. dev->regmap = devm_regmap_init_i2c(client, &regmap_config);
  546. if (IS_ERR(dev->regmap)) {
  547. ret = PTR_ERR(dev->regmap);
  548. goto err_kfree;
  549. }
  550. /* check if the tuner is there */
  551. ret = regmap_read(dev->regmap, 0x02, &uitmp);
  552. if (ret)
  553. goto err_kfree;
  554. dev_dbg(&client->dev, "chip id=%02x\n", uitmp);
  555. if (uitmp != 0x40) {
  556. ret = -ENODEV;
  557. goto err_kfree;
  558. }
  559. /* put sleep as chip seems to be in normal mode by default */
  560. ret = regmap_write(dev->regmap, 0x00, 0x00);
  561. if (ret)
  562. goto err_kfree;
  563. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  564. /* Register controls */
  565. v4l2_ctrl_handler_init(&dev->hdl, 9);
  566. dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  567. V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
  568. dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  569. V4L2_CID_RF_TUNER_BANDWIDTH, 4300000, 11000000, 100000, 4300000);
  570. v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false);
  571. dev->lna_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  572. V4L2_CID_RF_TUNER_LNA_GAIN_AUTO, 0, 1, 1, 1);
  573. dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  574. V4L2_CID_RF_TUNER_LNA_GAIN, 0, 15, 1, 10);
  575. v4l2_ctrl_auto_cluster(2, &dev->lna_gain_auto, 0, false);
  576. dev->mixer_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  577. V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO, 0, 1, 1, 1);
  578. dev->mixer_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  579. V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
  580. v4l2_ctrl_auto_cluster(2, &dev->mixer_gain_auto, 0, false);
  581. dev->if_gain_auto = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  582. V4L2_CID_RF_TUNER_IF_GAIN_AUTO, 0, 1, 1, 1);
  583. dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  584. V4L2_CID_RF_TUNER_IF_GAIN, 0, 54, 1, 0);
  585. v4l2_ctrl_auto_cluster(2, &dev->if_gain_auto, 0, false);
  586. dev->pll_lock = v4l2_ctrl_new_std(&dev->hdl, &e4000_ctrl_ops,
  587. V4L2_CID_RF_TUNER_PLL_LOCK, 0, 1, 1, 0);
  588. if (dev->hdl.error) {
  589. ret = dev->hdl.error;
  590. dev_err(&client->dev, "Could not initialize controls\n");
  591. v4l2_ctrl_handler_free(&dev->hdl);
  592. goto err_kfree;
  593. }
  594. dev->sd.ctrl_handler = &dev->hdl;
  595. dev->f_frequency = bands[0].rangelow;
  596. dev->f_bandwidth = dev->bandwidth->val;
  597. v4l2_i2c_subdev_init(&dev->sd, client, &e4000_subdev_ops);
  598. #endif
  599. fe->tuner_priv = dev;
  600. memcpy(&fe->ops.tuner_ops, &e4000_dvb_tuner_ops,
  601. sizeof(fe->ops.tuner_ops));
  602. v4l2_set_subdevdata(&dev->sd, client);
  603. i2c_set_clientdata(client, &dev->sd);
  604. dev_info(&client->dev, "Elonics E4000 successfully identified\n");
  605. return 0;
  606. err_kfree:
  607. kfree(dev);
  608. err:
  609. dev_dbg(&client->dev, "failed=%d\n", ret);
  610. return ret;
  611. }
  612. static int e4000_remove(struct i2c_client *client)
  613. {
  614. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  615. struct e4000_dev *dev = container_of(sd, struct e4000_dev, sd);
  616. dev_dbg(&client->dev, "\n");
  617. #if IS_ENABLED(CONFIG_VIDEO_V4L2)
  618. v4l2_ctrl_handler_free(&dev->hdl);
  619. #endif
  620. kfree(dev);
  621. return 0;
  622. }
  623. static const struct i2c_device_id e4000_id_table[] = {
  624. {"e4000", 0},
  625. {}
  626. };
  627. MODULE_DEVICE_TABLE(i2c, e4000_id_table);
  628. static struct i2c_driver e4000_driver = {
  629. .driver = {
  630. .name = "e4000",
  631. .suppress_bind_attrs = true,
  632. },
  633. .probe = e4000_probe,
  634. .remove = e4000_remove,
  635. .id_table = e4000_id_table,
  636. };
  637. module_i2c_driver(e4000_driver);
  638. MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
  639. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  640. MODULE_LICENSE("GPL");