max2165.c 10 KB

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  1. /*
  2. * Driver for Maxim MAX2165 silicon tuner
  3. *
  4. * Copyright (c) 2009 David T. L. Wong <davidtlwong@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/module.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/videodev2.h>
  24. #include <linux/delay.h>
  25. #include <linux/dvb/frontend.h>
  26. #include <linux/i2c.h>
  27. #include <linux/slab.h>
  28. #include "dvb_frontend.h"
  29. #include "max2165.h"
  30. #include "max2165_priv.h"
  31. #include "tuner-i2c.h"
  32. #define dprintk(args...) \
  33. do { \
  34. if (debug) \
  35. printk(KERN_DEBUG "max2165: " args); \
  36. } while (0)
  37. static int debug;
  38. module_param(debug, int, 0644);
  39. MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
  40. static int max2165_write_reg(struct max2165_priv *priv, u8 reg, u8 data)
  41. {
  42. int ret;
  43. u8 buf[] = { reg, data };
  44. struct i2c_msg msg = { .flags = 0, .buf = buf, .len = 2 };
  45. msg.addr = priv->config->i2c_address;
  46. if (debug >= 2)
  47. dprintk("%s: reg=0x%02X, data=0x%02X\n", __func__, reg, data);
  48. ret = i2c_transfer(priv->i2c, &msg, 1);
  49. if (ret != 1)
  50. dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
  51. __func__, reg, data, ret);
  52. return (ret != 1) ? -EIO : 0;
  53. }
  54. static int max2165_read_reg(struct max2165_priv *priv, u8 reg, u8 *p_data)
  55. {
  56. int ret;
  57. u8 dev_addr = priv->config->i2c_address;
  58. u8 b0[] = { reg };
  59. u8 b1[] = { 0 };
  60. struct i2c_msg msg[] = {
  61. { .addr = dev_addr, .flags = 0, .buf = b0, .len = 1 },
  62. { .addr = dev_addr, .flags = I2C_M_RD, .buf = b1, .len = 1 },
  63. };
  64. ret = i2c_transfer(priv->i2c, msg, 2);
  65. if (ret != 2) {
  66. dprintk("%s: error reg=0x%x, ret=%i\n", __func__, reg, ret);
  67. return -EIO;
  68. }
  69. *p_data = b1[0];
  70. if (debug >= 2)
  71. dprintk("%s: reg=0x%02X, data=0x%02X\n",
  72. __func__, reg, b1[0]);
  73. return 0;
  74. }
  75. static int max2165_mask_write_reg(struct max2165_priv *priv, u8 reg,
  76. u8 mask, u8 data)
  77. {
  78. int ret;
  79. u8 v;
  80. data &= mask;
  81. ret = max2165_read_reg(priv, reg, &v);
  82. if (ret != 0)
  83. return ret;
  84. v &= ~mask;
  85. v |= data;
  86. ret = max2165_write_reg(priv, reg, v);
  87. return ret;
  88. }
  89. static int max2165_read_rom_table(struct max2165_priv *priv)
  90. {
  91. u8 dat[3];
  92. int i;
  93. for (i = 0; i < 3; i++) {
  94. max2165_write_reg(priv, REG_ROM_TABLE_ADDR, i + 1);
  95. max2165_read_reg(priv, REG_ROM_TABLE_DATA, &dat[i]);
  96. }
  97. priv->tf_ntch_low_cfg = dat[0] >> 4;
  98. priv->tf_ntch_hi_cfg = dat[0] & 0x0F;
  99. priv->tf_balun_low_ref = dat[1] & 0x0F;
  100. priv->tf_balun_hi_ref = dat[1] >> 4;
  101. priv->bb_filter_7mhz_cfg = dat[2] & 0x0F;
  102. priv->bb_filter_8mhz_cfg = dat[2] >> 4;
  103. dprintk("tf_ntch_low_cfg = 0x%X\n", priv->tf_ntch_low_cfg);
  104. dprintk("tf_ntch_hi_cfg = 0x%X\n", priv->tf_ntch_hi_cfg);
  105. dprintk("tf_balun_low_ref = 0x%X\n", priv->tf_balun_low_ref);
  106. dprintk("tf_balun_hi_ref = 0x%X\n", priv->tf_balun_hi_ref);
  107. dprintk("bb_filter_7mhz_cfg = 0x%X\n", priv->bb_filter_7mhz_cfg);
  108. dprintk("bb_filter_8mhz_cfg = 0x%X\n", priv->bb_filter_8mhz_cfg);
  109. return 0;
  110. }
  111. static int max2165_set_osc(struct max2165_priv *priv, u8 osc /*MHz*/)
  112. {
  113. u8 v;
  114. v = (osc / 2);
  115. if (v == 2)
  116. v = 0x7;
  117. else
  118. v -= 8;
  119. max2165_mask_write_reg(priv, REG_PLL_CFG, 0x07, v);
  120. return 0;
  121. }
  122. static int max2165_set_bandwidth(struct max2165_priv *priv, u32 bw)
  123. {
  124. u8 val;
  125. if (bw == 8000000)
  126. val = priv->bb_filter_8mhz_cfg;
  127. else
  128. val = priv->bb_filter_7mhz_cfg;
  129. max2165_mask_write_reg(priv, REG_BASEBAND_CTRL, 0xF0, val << 4);
  130. return 0;
  131. }
  132. static int fixpt_div32(u32 dividend, u32 divisor, u32 *quotient, u32 *fraction)
  133. {
  134. u32 remainder;
  135. u32 q, f = 0;
  136. int i;
  137. if (0 == divisor)
  138. return -EINVAL;
  139. q = dividend / divisor;
  140. remainder = dividend - q * divisor;
  141. for (i = 0; i < 31; i++) {
  142. remainder <<= 1;
  143. if (remainder >= divisor) {
  144. f += 1;
  145. remainder -= divisor;
  146. }
  147. f <<= 1;
  148. }
  149. *quotient = q;
  150. *fraction = f;
  151. return 0;
  152. }
  153. static int max2165_set_rf(struct max2165_priv *priv, u32 freq)
  154. {
  155. u8 tf;
  156. u8 tf_ntch;
  157. u32 t;
  158. u32 quotient, fraction;
  159. int ret;
  160. /* Set PLL divider according to RF frequency */
  161. ret = fixpt_div32(freq / 1000, priv->config->osc_clk * 1000,
  162. &quotient, &fraction);
  163. if (ret != 0)
  164. return ret;
  165. /* 20-bit fraction */
  166. fraction >>= 12;
  167. max2165_write_reg(priv, REG_NDIV_INT, quotient);
  168. max2165_mask_write_reg(priv, REG_NDIV_FRAC2, 0x0F, fraction >> 16);
  169. max2165_write_reg(priv, REG_NDIV_FRAC1, fraction >> 8);
  170. max2165_write_reg(priv, REG_NDIV_FRAC0, fraction);
  171. /* Norch Filter */
  172. tf_ntch = (freq < 725000000) ?
  173. priv->tf_ntch_low_cfg : priv->tf_ntch_hi_cfg;
  174. /* Tracking filter balun */
  175. t = priv->tf_balun_low_ref;
  176. t += (priv->tf_balun_hi_ref - priv->tf_balun_low_ref)
  177. * (freq / 1000 - 470000) / (780000 - 470000);
  178. tf = t;
  179. dprintk("tf = %X\n", tf);
  180. tf |= tf_ntch << 4;
  181. max2165_write_reg(priv, REG_TRACK_FILTER, tf);
  182. return 0;
  183. }
  184. static void max2165_debug_status(struct max2165_priv *priv)
  185. {
  186. u8 status, autotune;
  187. u8 auto_vco_success, auto_vco_active;
  188. u8 pll_locked;
  189. u8 dc_offset_low, dc_offset_hi;
  190. u8 signal_lv_over_threshold;
  191. u8 vco, vco_sub_band, adc;
  192. max2165_read_reg(priv, REG_STATUS, &status);
  193. max2165_read_reg(priv, REG_AUTOTUNE, &autotune);
  194. auto_vco_success = (status >> 6) & 0x01;
  195. auto_vco_active = (status >> 5) & 0x01;
  196. pll_locked = (status >> 4) & 0x01;
  197. dc_offset_low = (status >> 3) & 0x01;
  198. dc_offset_hi = (status >> 2) & 0x01;
  199. signal_lv_over_threshold = status & 0x01;
  200. vco = autotune >> 6;
  201. vco_sub_band = (autotune >> 3) & 0x7;
  202. adc = autotune & 0x7;
  203. dprintk("auto VCO active: %d, auto VCO success: %d\n",
  204. auto_vco_active, auto_vco_success);
  205. dprintk("PLL locked: %d\n", pll_locked);
  206. dprintk("DC offset low: %d, DC offset high: %d\n",
  207. dc_offset_low, dc_offset_hi);
  208. dprintk("Signal lvl over threshold: %d\n", signal_lv_over_threshold);
  209. dprintk("VCO: %d, VCO Sub-band: %d, ADC: %d\n", vco, vco_sub_band, adc);
  210. }
  211. static int max2165_set_params(struct dvb_frontend *fe)
  212. {
  213. struct max2165_priv *priv = fe->tuner_priv;
  214. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  215. int ret;
  216. switch (c->bandwidth_hz) {
  217. case 7000000:
  218. case 8000000:
  219. priv->frequency = c->frequency;
  220. break;
  221. default:
  222. printk(KERN_INFO "MAX2165: bandwidth %d Hz not supported.\n",
  223. c->bandwidth_hz);
  224. return -EINVAL;
  225. }
  226. dprintk("%s() frequency=%d\n", __func__, c->frequency);
  227. if (fe->ops.i2c_gate_ctrl)
  228. fe->ops.i2c_gate_ctrl(fe, 1);
  229. max2165_set_bandwidth(priv, c->bandwidth_hz);
  230. ret = max2165_set_rf(priv, priv->frequency);
  231. mdelay(50);
  232. max2165_debug_status(priv);
  233. if (fe->ops.i2c_gate_ctrl)
  234. fe->ops.i2c_gate_ctrl(fe, 0);
  235. if (ret != 0)
  236. return -EREMOTEIO;
  237. return 0;
  238. }
  239. static int max2165_get_frequency(struct dvb_frontend *fe, u32 *freq)
  240. {
  241. struct max2165_priv *priv = fe->tuner_priv;
  242. dprintk("%s()\n", __func__);
  243. *freq = priv->frequency;
  244. return 0;
  245. }
  246. static int max2165_get_bandwidth(struct dvb_frontend *fe, u32 *bw)
  247. {
  248. struct max2165_priv *priv = fe->tuner_priv;
  249. dprintk("%s()\n", __func__);
  250. *bw = priv->bandwidth;
  251. return 0;
  252. }
  253. static int max2165_get_status(struct dvb_frontend *fe, u32 *status)
  254. {
  255. struct max2165_priv *priv = fe->tuner_priv;
  256. u16 lock_status = 0;
  257. dprintk("%s()\n", __func__);
  258. if (fe->ops.i2c_gate_ctrl)
  259. fe->ops.i2c_gate_ctrl(fe, 1);
  260. max2165_debug_status(priv);
  261. *status = lock_status;
  262. if (fe->ops.i2c_gate_ctrl)
  263. fe->ops.i2c_gate_ctrl(fe, 0);
  264. return 0;
  265. }
  266. static int max2165_sleep(struct dvb_frontend *fe)
  267. {
  268. dprintk("%s()\n", __func__);
  269. return 0;
  270. }
  271. static int max2165_init(struct dvb_frontend *fe)
  272. {
  273. struct max2165_priv *priv = fe->tuner_priv;
  274. dprintk("%s()\n", __func__);
  275. if (fe->ops.i2c_gate_ctrl)
  276. fe->ops.i2c_gate_ctrl(fe, 1);
  277. /* Setup initial values */
  278. /* Fractional Mode on */
  279. max2165_write_reg(priv, REG_NDIV_FRAC2, 0x18);
  280. /* LNA on */
  281. max2165_write_reg(priv, REG_LNA, 0x01);
  282. max2165_write_reg(priv, REG_PLL_CFG, 0x7A);
  283. max2165_write_reg(priv, REG_TEST, 0x08);
  284. max2165_write_reg(priv, REG_SHUTDOWN, 0x40);
  285. max2165_write_reg(priv, REG_VCO_CTRL, 0x84);
  286. max2165_write_reg(priv, REG_BASEBAND_CTRL, 0xC3);
  287. max2165_write_reg(priv, REG_DC_OFFSET_CTRL, 0x75);
  288. max2165_write_reg(priv, REG_DC_OFFSET_DAC, 0x00);
  289. max2165_write_reg(priv, REG_ROM_TABLE_ADDR, 0x00);
  290. max2165_set_osc(priv, priv->config->osc_clk);
  291. max2165_read_rom_table(priv);
  292. max2165_set_bandwidth(priv, 8000000);
  293. if (fe->ops.i2c_gate_ctrl)
  294. fe->ops.i2c_gate_ctrl(fe, 0);
  295. return 0;
  296. }
  297. static int max2165_release(struct dvb_frontend *fe)
  298. {
  299. struct max2165_priv *priv = fe->tuner_priv;
  300. dprintk("%s()\n", __func__);
  301. kfree(priv);
  302. fe->tuner_priv = NULL;
  303. return 0;
  304. }
  305. static const struct dvb_tuner_ops max2165_tuner_ops = {
  306. .info = {
  307. .name = "Maxim MAX2165",
  308. .frequency_min = 470000000,
  309. .frequency_max = 780000000,
  310. .frequency_step = 50000,
  311. },
  312. .release = max2165_release,
  313. .init = max2165_init,
  314. .sleep = max2165_sleep,
  315. .set_params = max2165_set_params,
  316. .set_analog_params = NULL,
  317. .get_frequency = max2165_get_frequency,
  318. .get_bandwidth = max2165_get_bandwidth,
  319. .get_status = max2165_get_status
  320. };
  321. struct dvb_frontend *max2165_attach(struct dvb_frontend *fe,
  322. struct i2c_adapter *i2c,
  323. struct max2165_config *cfg)
  324. {
  325. struct max2165_priv *priv = NULL;
  326. dprintk("%s(%d-%04x)\n", __func__,
  327. i2c ? i2c_adapter_id(i2c) : -1,
  328. cfg ? cfg->i2c_address : -1);
  329. priv = kzalloc(sizeof(struct max2165_priv), GFP_KERNEL);
  330. if (priv == NULL)
  331. return NULL;
  332. memcpy(&fe->ops.tuner_ops, &max2165_tuner_ops,
  333. sizeof(struct dvb_tuner_ops));
  334. priv->config = cfg;
  335. priv->i2c = i2c;
  336. fe->tuner_priv = priv;
  337. max2165_init(fe);
  338. max2165_debug_status(priv);
  339. return fe;
  340. }
  341. EXPORT_SYMBOL(max2165_attach);
  342. MODULE_AUTHOR("David T. L. Wong <davidtlwong@gmail.com>");
  343. MODULE_DESCRIPTION("Maxim MAX2165 silicon tuner driver");
  344. MODULE_LICENSE("GPL");