em28xx-core.c 28 KB

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  1. /*
  2. em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
  3. Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
  4. Markus Rechberger <mrechberger@gmail.com>
  5. Mauro Carvalho Chehab <mchehab@infradead.org>
  6. Sascha Sommer <saschasommer@freenet.de>
  7. Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/init.h>
  21. #include <linux/jiffies.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/slab.h>
  25. #include <linux/usb.h>
  26. #include <linux/vmalloc.h>
  27. #include <sound/ac97_codec.h>
  28. #include <media/v4l2-common.h>
  29. #include "em28xx.h"
  30. #define DRIVER_AUTHOR "Ludovico Cavedon <cavedon@sssup.it>, " \
  31. "Markus Rechberger <mrechberger@gmail.com>, " \
  32. "Mauro Carvalho Chehab <mchehab@infradead.org>, " \
  33. "Sascha Sommer <saschasommer@freenet.de>"
  34. MODULE_AUTHOR(DRIVER_AUTHOR);
  35. MODULE_DESCRIPTION(DRIVER_DESC);
  36. MODULE_LICENSE("GPL");
  37. MODULE_VERSION(EM28XX_VERSION);
  38. /* #define ENABLE_DEBUG_ISOC_FRAMES */
  39. static unsigned int core_debug;
  40. module_param(core_debug, int, 0644);
  41. MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
  42. #define em28xx_coredbg(fmt, arg...) do {\
  43. if (core_debug) \
  44. printk(KERN_INFO "%s %s :"fmt, \
  45. dev->name, __func__ , ##arg); } while (0)
  46. static unsigned int reg_debug;
  47. module_param(reg_debug, int, 0644);
  48. MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
  49. #define em28xx_regdbg(fmt, arg...) do {\
  50. if (reg_debug) \
  51. printk(KERN_INFO "%s %s :"fmt, \
  52. dev->name, __func__ , ##arg); } while (0)
  53. /* FIXME */
  54. #define em28xx_isocdbg(fmt, arg...) do {\
  55. if (core_debug) \
  56. printk(KERN_INFO "%s %s :"fmt, \
  57. dev->name, __func__ , ##arg); } while (0)
  58. /*
  59. * em28xx_read_reg_req()
  60. * reads data from the usb device specifying bRequest
  61. */
  62. int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
  63. char *buf, int len)
  64. {
  65. int ret;
  66. int pipe = usb_rcvctrlpipe(dev->udev, 0);
  67. if (dev->disconnected)
  68. return -ENODEV;
  69. if (len > URB_MAX_CTRL_SIZE)
  70. return -EINVAL;
  71. if (reg_debug) {
  72. printk(KERN_DEBUG "(pipe 0x%08x): "
  73. "IN: %02x %02x %02x %02x %02x %02x %02x %02x ",
  74. pipe,
  75. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  76. req, 0, 0,
  77. reg & 0xff, reg >> 8,
  78. len & 0xff, len >> 8);
  79. }
  80. mutex_lock(&dev->ctrl_urb_lock);
  81. ret = usb_control_msg(dev->udev, pipe, req,
  82. USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  83. 0x0000, reg, dev->urb_buf, len, HZ);
  84. if (ret < 0) {
  85. if (reg_debug)
  86. printk(" failed!\n");
  87. mutex_unlock(&dev->ctrl_urb_lock);
  88. return usb_translate_errors(ret);
  89. }
  90. if (len)
  91. memcpy(buf, dev->urb_buf, len);
  92. mutex_unlock(&dev->ctrl_urb_lock);
  93. if (reg_debug) {
  94. int byte;
  95. printk("<<<");
  96. for (byte = 0; byte < len; byte++)
  97. printk(" %02x", (unsigned char)buf[byte]);
  98. printk("\n");
  99. }
  100. return ret;
  101. }
  102. /*
  103. * em28xx_read_reg_req()
  104. * reads data from the usb device specifying bRequest
  105. */
  106. int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg)
  107. {
  108. int ret;
  109. u8 val;
  110. ret = em28xx_read_reg_req_len(dev, req, reg, &val, 1);
  111. if (ret < 0)
  112. return ret;
  113. return val;
  114. }
  115. int em28xx_read_reg(struct em28xx *dev, u16 reg)
  116. {
  117. return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg);
  118. }
  119. EXPORT_SYMBOL_GPL(em28xx_read_reg);
  120. /*
  121. * em28xx_write_regs_req()
  122. * sends data to the usb device, specifying bRequest
  123. */
  124. int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
  125. int len)
  126. {
  127. int ret;
  128. int pipe = usb_sndctrlpipe(dev->udev, 0);
  129. if (dev->disconnected)
  130. return -ENODEV;
  131. if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
  132. return -EINVAL;
  133. if (reg_debug) {
  134. int byte;
  135. printk(KERN_DEBUG "(pipe 0x%08x): "
  136. "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
  137. pipe,
  138. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  139. req, 0, 0,
  140. reg & 0xff, reg >> 8,
  141. len & 0xff, len >> 8);
  142. for (byte = 0; byte < len; byte++)
  143. printk(" %02x", (unsigned char)buf[byte]);
  144. printk("\n");
  145. }
  146. mutex_lock(&dev->ctrl_urb_lock);
  147. memcpy(dev->urb_buf, buf, len);
  148. ret = usb_control_msg(dev->udev, pipe, req,
  149. USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
  150. 0x0000, reg, dev->urb_buf, len, HZ);
  151. mutex_unlock(&dev->ctrl_urb_lock);
  152. if (ret < 0)
  153. return usb_translate_errors(ret);
  154. if (dev->wait_after_write)
  155. msleep(dev->wait_after_write);
  156. return ret;
  157. }
  158. int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len)
  159. {
  160. return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len);
  161. }
  162. EXPORT_SYMBOL_GPL(em28xx_write_regs);
  163. /* Write a single register */
  164. int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val)
  165. {
  166. return em28xx_write_regs(dev, reg, &val, 1);
  167. }
  168. EXPORT_SYMBOL_GPL(em28xx_write_reg);
  169. /*
  170. * em28xx_write_reg_bits()
  171. * sets only some bits (specified by bitmask) of a register, by first reading
  172. * the actual value
  173. */
  174. int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
  175. u8 bitmask)
  176. {
  177. int oldval;
  178. u8 newval;
  179. oldval = em28xx_read_reg(dev, reg);
  180. if (oldval < 0)
  181. return oldval;
  182. newval = (((u8)oldval) & ~bitmask) | (val & bitmask);
  183. return em28xx_write_regs(dev, reg, &newval, 1);
  184. }
  185. EXPORT_SYMBOL_GPL(em28xx_write_reg_bits);
  186. /*
  187. * em28xx_toggle_reg_bits()
  188. * toggles/inverts the bits (specified by bitmask) of a register
  189. */
  190. int em28xx_toggle_reg_bits(struct em28xx *dev, u16 reg, u8 bitmask)
  191. {
  192. int oldval;
  193. u8 newval;
  194. oldval = em28xx_read_reg(dev, reg);
  195. if (oldval < 0)
  196. return oldval;
  197. newval = (~oldval & bitmask) | (oldval & ~bitmask);
  198. return em28xx_write_reg(dev, reg, newval);
  199. }
  200. EXPORT_SYMBOL_GPL(em28xx_toggle_reg_bits);
  201. /*
  202. * em28xx_is_ac97_ready()
  203. * Checks if ac97 is ready
  204. */
  205. static int em28xx_is_ac97_ready(struct em28xx *dev)
  206. {
  207. unsigned long timeout = jiffies + msecs_to_jiffies(EM28XX_AC97_XFER_TIMEOUT);
  208. int ret;
  209. /* Wait up to 50 ms for AC97 command to complete */
  210. while (time_is_after_jiffies(timeout)) {
  211. ret = em28xx_read_reg(dev, EM28XX_R43_AC97BUSY);
  212. if (ret < 0)
  213. return ret;
  214. if (!(ret & 0x01))
  215. return 0;
  216. msleep(5);
  217. }
  218. em28xx_warn("AC97 command still being executed: not handled properly!\n");
  219. return -EBUSY;
  220. }
  221. /*
  222. * em28xx_read_ac97()
  223. * write a 16 bit value to the specified AC97 address (LSB first!)
  224. */
  225. int em28xx_read_ac97(struct em28xx *dev, u8 reg)
  226. {
  227. int ret;
  228. u8 addr = (reg & 0x7f) | 0x80;
  229. __le16 val;
  230. ret = em28xx_is_ac97_ready(dev);
  231. if (ret < 0)
  232. return ret;
  233. ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
  234. if (ret < 0)
  235. return ret;
  236. ret = dev->em28xx_read_reg_req_len(dev, 0, EM28XX_R40_AC97LSB,
  237. (u8 *)&val, sizeof(val));
  238. if (ret < 0)
  239. return ret;
  240. return le16_to_cpu(val);
  241. }
  242. EXPORT_SYMBOL_GPL(em28xx_read_ac97);
  243. /*
  244. * em28xx_write_ac97()
  245. * write a 16 bit value to the specified AC97 address (LSB first!)
  246. */
  247. int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val)
  248. {
  249. int ret;
  250. u8 addr = reg & 0x7f;
  251. __le16 value;
  252. value = cpu_to_le16(val);
  253. ret = em28xx_is_ac97_ready(dev);
  254. if (ret < 0)
  255. return ret;
  256. ret = em28xx_write_regs(dev, EM28XX_R40_AC97LSB, (u8 *)&value, 2);
  257. if (ret < 0)
  258. return ret;
  259. ret = em28xx_write_regs(dev, EM28XX_R42_AC97ADDR, &addr, 1);
  260. if (ret < 0)
  261. return ret;
  262. return 0;
  263. }
  264. EXPORT_SYMBOL_GPL(em28xx_write_ac97);
  265. struct em28xx_vol_itable {
  266. enum em28xx_amux mux;
  267. u8 reg;
  268. };
  269. static struct em28xx_vol_itable inputs[] = {
  270. { EM28XX_AMUX_VIDEO, AC97_VIDEO },
  271. { EM28XX_AMUX_LINE_IN, AC97_LINE },
  272. { EM28XX_AMUX_PHONE, AC97_PHONE },
  273. { EM28XX_AMUX_MIC, AC97_MIC },
  274. { EM28XX_AMUX_CD, AC97_CD },
  275. { EM28XX_AMUX_AUX, AC97_AUX },
  276. { EM28XX_AMUX_PCM_OUT, AC97_PCM },
  277. };
  278. static int set_ac97_input(struct em28xx *dev)
  279. {
  280. int ret, i;
  281. enum em28xx_amux amux = dev->ctl_ainput;
  282. /* EM28XX_AMUX_VIDEO2 is a special case used to indicate that
  283. em28xx should point to LINE IN, while AC97 should use VIDEO
  284. */
  285. if (amux == EM28XX_AMUX_VIDEO2)
  286. amux = EM28XX_AMUX_VIDEO;
  287. /* Mute all entres but the one that were selected */
  288. for (i = 0; i < ARRAY_SIZE(inputs); i++) {
  289. if (amux == inputs[i].mux)
  290. ret = em28xx_write_ac97(dev, inputs[i].reg, 0x0808);
  291. else
  292. ret = em28xx_write_ac97(dev, inputs[i].reg, 0x8000);
  293. if (ret < 0)
  294. em28xx_warn("couldn't setup AC97 register %d\n",
  295. inputs[i].reg);
  296. }
  297. return 0;
  298. }
  299. static int em28xx_set_audio_source(struct em28xx *dev)
  300. {
  301. int ret;
  302. u8 input;
  303. if (dev->board.is_em2800) {
  304. if (dev->ctl_ainput == EM28XX_AMUX_VIDEO)
  305. input = EM2800_AUDIO_SRC_TUNER;
  306. else
  307. input = EM2800_AUDIO_SRC_LINE;
  308. ret = em28xx_write_regs(dev, EM2800_R08_AUDIOSRC, &input, 1);
  309. if (ret < 0)
  310. return ret;
  311. }
  312. if (dev->board.has_msp34xx)
  313. input = EM28XX_AUDIO_SRC_TUNER;
  314. else {
  315. switch (dev->ctl_ainput) {
  316. case EM28XX_AMUX_VIDEO:
  317. input = EM28XX_AUDIO_SRC_TUNER;
  318. break;
  319. default:
  320. input = EM28XX_AUDIO_SRC_LINE;
  321. break;
  322. }
  323. }
  324. if (dev->board.mute_gpio && dev->mute)
  325. em28xx_gpio_set(dev, dev->board.mute_gpio);
  326. else
  327. em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
  328. ret = em28xx_write_reg_bits(dev, EM28XX_R0E_AUDIOSRC, input, 0xc0);
  329. if (ret < 0)
  330. return ret;
  331. msleep(5);
  332. switch (dev->audio_mode.ac97) {
  333. case EM28XX_NO_AC97:
  334. break;
  335. default:
  336. ret = set_ac97_input(dev);
  337. }
  338. return ret;
  339. }
  340. struct em28xx_vol_otable {
  341. enum em28xx_aout mux;
  342. u8 reg;
  343. };
  344. static const struct em28xx_vol_otable outputs[] = {
  345. { EM28XX_AOUT_MASTER, AC97_MASTER },
  346. { EM28XX_AOUT_LINE, AC97_HEADPHONE },
  347. { EM28XX_AOUT_MONO, AC97_MASTER_MONO },
  348. { EM28XX_AOUT_LFE, AC97_CENTER_LFE_MASTER },
  349. { EM28XX_AOUT_SURR, AC97_SURROUND_MASTER },
  350. };
  351. int em28xx_audio_analog_set(struct em28xx *dev)
  352. {
  353. int ret, i;
  354. u8 xclk;
  355. if (dev->int_audio_type == EM28XX_INT_AUDIO_NONE)
  356. return 0;
  357. /* It is assumed that all devices use master volume for output.
  358. It would be possible to use also line output.
  359. */
  360. if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
  361. /* Mute all outputs */
  362. for (i = 0; i < ARRAY_SIZE(outputs); i++) {
  363. ret = em28xx_write_ac97(dev, outputs[i].reg, 0x8000);
  364. if (ret < 0)
  365. em28xx_warn("couldn't setup AC97 register %d\n",
  366. outputs[i].reg);
  367. }
  368. }
  369. xclk = dev->board.xclk & 0x7f;
  370. if (!dev->mute)
  371. xclk |= EM28XX_XCLK_AUDIO_UNMUTE;
  372. ret = em28xx_write_reg(dev, EM28XX_R0F_XCLK, xclk);
  373. if (ret < 0)
  374. return ret;
  375. msleep(10);
  376. /* Selects the proper audio input */
  377. ret = em28xx_set_audio_source(dev);
  378. /* Sets volume */
  379. if (dev->audio_mode.ac97 != EM28XX_NO_AC97) {
  380. int vol;
  381. em28xx_write_ac97(dev, AC97_POWERDOWN, 0x4200);
  382. em28xx_write_ac97(dev, AC97_EXTENDED_STATUS, 0x0031);
  383. em28xx_write_ac97(dev, AC97_PCM_LR_ADC_RATE, 0xbb80);
  384. /* LSB: left channel - both channels with the same level */
  385. vol = (0x1f - dev->volume) | ((0x1f - dev->volume) << 8);
  386. /* Mute device, if needed */
  387. if (dev->mute)
  388. vol |= 0x8000;
  389. /* Sets volume */
  390. for (i = 0; i < ARRAY_SIZE(outputs); i++) {
  391. if (dev->ctl_aoutput & outputs[i].mux)
  392. ret = em28xx_write_ac97(dev, outputs[i].reg,
  393. vol);
  394. if (ret < 0)
  395. em28xx_warn("couldn't setup AC97 register %d\n",
  396. outputs[i].reg);
  397. }
  398. if (dev->ctl_aoutput & EM28XX_AOUT_PCM_IN) {
  399. int sel = ac97_return_record_select(dev->ctl_aoutput);
  400. /* Use the same input for both left and right
  401. channels */
  402. sel |= (sel << 8);
  403. em28xx_write_ac97(dev, AC97_REC_SEL, sel);
  404. }
  405. }
  406. return ret;
  407. }
  408. EXPORT_SYMBOL_GPL(em28xx_audio_analog_set);
  409. int em28xx_audio_setup(struct em28xx *dev)
  410. {
  411. int vid1, vid2, feat, cfg;
  412. u32 vid = 0;
  413. u8 i2s_samplerates;
  414. if (dev->chip_id == CHIP_ID_EM2870 ||
  415. dev->chip_id == CHIP_ID_EM2874 ||
  416. dev->chip_id == CHIP_ID_EM28174 ||
  417. dev->chip_id == CHIP_ID_EM28178) {
  418. /* Digital only device - don't load any alsa module */
  419. dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
  420. dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
  421. return 0;
  422. }
  423. /* See how this device is configured */
  424. cfg = em28xx_read_reg(dev, EM28XX_R00_CHIPCFG);
  425. em28xx_info("Config register raw data: 0x%02x\n", cfg);
  426. if (cfg < 0) { /* Register read error */
  427. /* Be conservative */
  428. dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
  429. } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) == 0x00) {
  430. /* The device doesn't have vendor audio at all */
  431. dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
  432. dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
  433. return 0;
  434. } else if ((cfg & EM28XX_CHIPCFG_AUDIOMASK) != EM28XX_CHIPCFG_AC97) {
  435. dev->int_audio_type = EM28XX_INT_AUDIO_I2S;
  436. if (dev->chip_id < CHIP_ID_EM2860 &&
  437. (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
  438. EM2820_CHIPCFG_I2S_1_SAMPRATE)
  439. i2s_samplerates = 1;
  440. else if (dev->chip_id >= CHIP_ID_EM2860 &&
  441. (cfg & EM28XX_CHIPCFG_AUDIOMASK) ==
  442. EM2860_CHIPCFG_I2S_5_SAMPRATES)
  443. i2s_samplerates = 5;
  444. else
  445. i2s_samplerates = 3;
  446. em28xx_info("I2S Audio (%d sample rate(s))\n",
  447. i2s_samplerates);
  448. /* Skip the code that does AC97 vendor detection */
  449. dev->audio_mode.ac97 = EM28XX_NO_AC97;
  450. goto init_audio;
  451. } else {
  452. dev->int_audio_type = EM28XX_INT_AUDIO_AC97;
  453. }
  454. dev->audio_mode.ac97 = EM28XX_AC97_OTHER;
  455. vid1 = em28xx_read_ac97(dev, AC97_VENDOR_ID1);
  456. if (vid1 < 0) {
  457. /*
  458. * Device likely doesn't support AC97
  459. * Note: (some) em2800 devices without eeprom reports 0x91 on
  460. * CHIPCFG register, even not having an AC97 chip
  461. */
  462. em28xx_warn("AC97 chip type couldn't be determined\n");
  463. dev->audio_mode.ac97 = EM28XX_NO_AC97;
  464. if (dev->usb_audio_type == EM28XX_USB_AUDIO_VENDOR)
  465. dev->usb_audio_type = EM28XX_USB_AUDIO_NONE;
  466. dev->int_audio_type = EM28XX_INT_AUDIO_NONE;
  467. goto init_audio;
  468. }
  469. vid2 = em28xx_read_ac97(dev, AC97_VENDOR_ID2);
  470. if (vid2 < 0)
  471. goto init_audio;
  472. vid = vid1 << 16 | vid2;
  473. em28xx_warn("AC97 vendor ID = 0x%08x\n", vid);
  474. feat = em28xx_read_ac97(dev, AC97_RESET);
  475. if (feat < 0)
  476. goto init_audio;
  477. em28xx_warn("AC97 features = 0x%04x\n", feat);
  478. /* Try to identify what audio processor we have */
  479. if (((vid == 0xffffffff) || (vid == 0x83847650)) && (feat == 0x6a90))
  480. dev->audio_mode.ac97 = EM28XX_AC97_EM202;
  481. else if ((vid >> 8) == 0x838476)
  482. dev->audio_mode.ac97 = EM28XX_AC97_SIGMATEL;
  483. init_audio:
  484. /* Reports detected AC97 processor */
  485. switch (dev->audio_mode.ac97) {
  486. case EM28XX_NO_AC97:
  487. em28xx_info("No AC97 audio processor\n");
  488. break;
  489. case EM28XX_AC97_EM202:
  490. em28xx_info("Empia 202 AC97 audio processor detected\n");
  491. break;
  492. case EM28XX_AC97_SIGMATEL:
  493. em28xx_info("Sigmatel audio processor detected (stac 97%02x)\n",
  494. vid & 0xff);
  495. break;
  496. case EM28XX_AC97_OTHER:
  497. em28xx_warn("Unknown AC97 audio processor detected!\n");
  498. break;
  499. default:
  500. break;
  501. }
  502. return em28xx_audio_analog_set(dev);
  503. }
  504. EXPORT_SYMBOL_GPL(em28xx_audio_setup);
  505. const struct em28xx_led *em28xx_find_led(struct em28xx *dev,
  506. enum em28xx_led_role role)
  507. {
  508. if (dev->board.leds) {
  509. u8 k = 0;
  510. while (dev->board.leds[k].role >= 0 &&
  511. dev->board.leds[k].role < EM28XX_NUM_LED_ROLES) {
  512. if (dev->board.leds[k].role == role)
  513. return &dev->board.leds[k];
  514. k++;
  515. }
  516. }
  517. return NULL;
  518. }
  519. EXPORT_SYMBOL_GPL(em28xx_find_led);
  520. int em28xx_capture_start(struct em28xx *dev, int start)
  521. {
  522. int rc;
  523. const struct em28xx_led *led = NULL;
  524. if (dev->chip_id == CHIP_ID_EM2874 ||
  525. dev->chip_id == CHIP_ID_EM2884 ||
  526. dev->chip_id == CHIP_ID_EM28174 ||
  527. dev->chip_id == CHIP_ID_EM28178) {
  528. /* The Transport Stream Enable Register moved in em2874 */
  529. rc = em28xx_write_reg_bits(dev, EM2874_R5F_TS_ENABLE,
  530. start ?
  531. EM2874_TS1_CAPTURE_ENABLE : 0x00,
  532. EM2874_TS1_CAPTURE_ENABLE);
  533. } else {
  534. /* FIXME: which is the best order? */
  535. /* video registers are sampled by VREF */
  536. rc = em28xx_write_reg_bits(dev, EM28XX_R0C_USBSUSP,
  537. start ? 0x10 : 0x00, 0x10);
  538. if (rc < 0)
  539. return rc;
  540. if (start) {
  541. if (dev->board.is_webcam)
  542. rc = em28xx_write_reg(dev, 0x13, 0x0c);
  543. /* Enable video capture */
  544. rc = em28xx_write_reg(dev, 0x48, 0x00);
  545. if (rc < 0)
  546. return rc;
  547. if (dev->mode == EM28XX_ANALOG_MODE)
  548. rc = em28xx_write_reg(dev,
  549. EM28XX_R12_VINENABLE,
  550. 0x67);
  551. else
  552. rc = em28xx_write_reg(dev,
  553. EM28XX_R12_VINENABLE,
  554. 0x37);
  555. if (rc < 0)
  556. return rc;
  557. msleep(6);
  558. } else {
  559. /* disable video capture */
  560. rc = em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x27);
  561. }
  562. }
  563. if (dev->mode == EM28XX_ANALOG_MODE)
  564. led = em28xx_find_led(dev, EM28XX_LED_ANALOG_CAPTURING);
  565. else
  566. led = em28xx_find_led(dev, EM28XX_LED_DIGITAL_CAPTURING);
  567. if (led)
  568. em28xx_write_reg_bits(dev, led->gpio_reg,
  569. (!start ^ led->inverted) ?
  570. ~led->gpio_mask : led->gpio_mask,
  571. led->gpio_mask);
  572. return rc;
  573. }
  574. int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio)
  575. {
  576. int rc = 0;
  577. if (!gpio)
  578. return rc;
  579. if (dev->mode != EM28XX_SUSPEND) {
  580. em28xx_write_reg(dev, 0x48, 0x00);
  581. if (dev->mode == EM28XX_ANALOG_MODE)
  582. em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x67);
  583. else
  584. em28xx_write_reg(dev, EM28XX_R12_VINENABLE, 0x37);
  585. msleep(6);
  586. }
  587. /* Send GPIO reset sequences specified at board entry */
  588. while (gpio->sleep >= 0) {
  589. if (gpio->reg >= 0) {
  590. rc = em28xx_write_reg_bits(dev,
  591. gpio->reg,
  592. gpio->val,
  593. gpio->mask);
  594. if (rc < 0)
  595. return rc;
  596. }
  597. if (gpio->sleep > 0)
  598. msleep(gpio->sleep);
  599. gpio++;
  600. }
  601. return rc;
  602. }
  603. EXPORT_SYMBOL_GPL(em28xx_gpio_set);
  604. int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode)
  605. {
  606. if (dev->mode == set_mode)
  607. return 0;
  608. if (set_mode == EM28XX_SUSPEND) {
  609. dev->mode = set_mode;
  610. /* FIXME: add suspend support for ac97 */
  611. return em28xx_gpio_set(dev, dev->board.suspend_gpio);
  612. }
  613. dev->mode = set_mode;
  614. if (dev->mode == EM28XX_DIGITAL_MODE)
  615. return em28xx_gpio_set(dev, dev->board.dvb_gpio);
  616. else
  617. return em28xx_gpio_set(dev, INPUT(dev->ctl_input)->gpio);
  618. }
  619. EXPORT_SYMBOL_GPL(em28xx_set_mode);
  620. /* ------------------------------------------------------------------
  621. URB control
  622. ------------------------------------------------------------------*/
  623. /*
  624. * URB completion handler for isoc/bulk transfers
  625. */
  626. static void em28xx_irq_callback(struct urb *urb)
  627. {
  628. struct em28xx *dev = urb->context;
  629. int i;
  630. switch (urb->status) {
  631. case 0: /* success */
  632. case -ETIMEDOUT: /* NAK */
  633. break;
  634. case -ECONNRESET: /* kill */
  635. case -ENOENT:
  636. case -ESHUTDOWN:
  637. return;
  638. default: /* error */
  639. em28xx_isocdbg("urb completition error %d.\n", urb->status);
  640. break;
  641. }
  642. /* Copy data from URB */
  643. spin_lock(&dev->slock);
  644. dev->usb_ctl.urb_data_copy(dev, urb);
  645. spin_unlock(&dev->slock);
  646. /* Reset urb buffers */
  647. for (i = 0; i < urb->number_of_packets; i++) {
  648. /* isoc only (bulk: number_of_packets = 0) */
  649. urb->iso_frame_desc[i].status = 0;
  650. urb->iso_frame_desc[i].actual_length = 0;
  651. }
  652. urb->status = 0;
  653. urb->status = usb_submit_urb(urb, GFP_ATOMIC);
  654. if (urb->status) {
  655. em28xx_isocdbg("urb resubmit failed (error=%i)\n",
  656. urb->status);
  657. }
  658. }
  659. /*
  660. * Stop and Deallocate URBs
  661. */
  662. void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode)
  663. {
  664. struct urb *urb;
  665. struct em28xx_usb_bufs *usb_bufs;
  666. int i;
  667. em28xx_isocdbg("em28xx: called em28xx_uninit_usb_xfer in mode %d\n",
  668. mode);
  669. if (mode == EM28XX_DIGITAL_MODE)
  670. usb_bufs = &dev->usb_ctl.digital_bufs;
  671. else
  672. usb_bufs = &dev->usb_ctl.analog_bufs;
  673. for (i = 0; i < usb_bufs->num_bufs; i++) {
  674. urb = usb_bufs->urb[i];
  675. if (urb) {
  676. if (!irqs_disabled())
  677. usb_kill_urb(urb);
  678. else
  679. usb_unlink_urb(urb);
  680. if (usb_bufs->transfer_buffer[i]) {
  681. usb_free_coherent(dev->udev,
  682. urb->transfer_buffer_length,
  683. usb_bufs->transfer_buffer[i],
  684. urb->transfer_dma);
  685. }
  686. usb_free_urb(urb);
  687. usb_bufs->urb[i] = NULL;
  688. }
  689. usb_bufs->transfer_buffer[i] = NULL;
  690. }
  691. kfree(usb_bufs->urb);
  692. kfree(usb_bufs->transfer_buffer);
  693. usb_bufs->urb = NULL;
  694. usb_bufs->transfer_buffer = NULL;
  695. usb_bufs->num_bufs = 0;
  696. em28xx_capture_start(dev, 0);
  697. }
  698. EXPORT_SYMBOL_GPL(em28xx_uninit_usb_xfer);
  699. /*
  700. * Stop URBs
  701. */
  702. void em28xx_stop_urbs(struct em28xx *dev)
  703. {
  704. int i;
  705. struct urb *urb;
  706. struct em28xx_usb_bufs *isoc_bufs = &dev->usb_ctl.digital_bufs;
  707. em28xx_isocdbg("em28xx: called em28xx_stop_urbs\n");
  708. for (i = 0; i < isoc_bufs->num_bufs; i++) {
  709. urb = isoc_bufs->urb[i];
  710. if (urb) {
  711. if (!irqs_disabled())
  712. usb_kill_urb(urb);
  713. else
  714. usb_unlink_urb(urb);
  715. }
  716. }
  717. em28xx_capture_start(dev, 0);
  718. }
  719. EXPORT_SYMBOL_GPL(em28xx_stop_urbs);
  720. /*
  721. * Allocate URBs
  722. */
  723. int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
  724. int num_bufs, int max_pkt_size, int packet_multiplier)
  725. {
  726. struct em28xx_usb_bufs *usb_bufs;
  727. int i;
  728. int sb_size, pipe;
  729. struct urb *urb;
  730. int j, k;
  731. em28xx_isocdbg("em28xx: called em28xx_alloc_isoc in mode %d\n", mode);
  732. /* Check mode and if we have an endpoint for the selected
  733. transfer type, select buffer */
  734. if (mode == EM28XX_DIGITAL_MODE) {
  735. if ((xfer_bulk && !dev->dvb_ep_bulk) ||
  736. (!xfer_bulk && !dev->dvb_ep_isoc)) {
  737. em28xx_errdev("no endpoint for DVB mode and transfer type %d\n",
  738. xfer_bulk > 0);
  739. return -EINVAL;
  740. }
  741. usb_bufs = &dev->usb_ctl.digital_bufs;
  742. } else if (mode == EM28XX_ANALOG_MODE) {
  743. if ((xfer_bulk && !dev->analog_ep_bulk) ||
  744. (!xfer_bulk && !dev->analog_ep_isoc)) {
  745. em28xx_errdev("no endpoint for analog mode and transfer type %d\n",
  746. xfer_bulk > 0);
  747. return -EINVAL;
  748. }
  749. usb_bufs = &dev->usb_ctl.analog_bufs;
  750. } else {
  751. em28xx_errdev("invalid mode selected\n");
  752. return -EINVAL;
  753. }
  754. /* De-allocates all pending stuff */
  755. em28xx_uninit_usb_xfer(dev, mode);
  756. usb_bufs->num_bufs = num_bufs;
  757. usb_bufs->urb = kzalloc(sizeof(void *)*num_bufs, GFP_KERNEL);
  758. if (!usb_bufs->urb) {
  759. em28xx_errdev("cannot alloc memory for usb buffers\n");
  760. return -ENOMEM;
  761. }
  762. usb_bufs->transfer_buffer = kzalloc(sizeof(void *)*num_bufs,
  763. GFP_KERNEL);
  764. if (!usb_bufs->transfer_buffer) {
  765. em28xx_errdev("cannot allocate memory for usb transfer\n");
  766. kfree(usb_bufs->urb);
  767. return -ENOMEM;
  768. }
  769. usb_bufs->max_pkt_size = max_pkt_size;
  770. if (xfer_bulk)
  771. usb_bufs->num_packets = 0;
  772. else
  773. usb_bufs->num_packets = packet_multiplier;
  774. dev->usb_ctl.vid_buf = NULL;
  775. dev->usb_ctl.vbi_buf = NULL;
  776. sb_size = packet_multiplier * usb_bufs->max_pkt_size;
  777. /* allocate urbs and transfer buffers */
  778. for (i = 0; i < usb_bufs->num_bufs; i++) {
  779. urb = usb_alloc_urb(usb_bufs->num_packets, GFP_KERNEL);
  780. if (!urb) {
  781. em28xx_err("cannot alloc usb_ctl.urb %i\n", i);
  782. em28xx_uninit_usb_xfer(dev, mode);
  783. return -ENOMEM;
  784. }
  785. usb_bufs->urb[i] = urb;
  786. usb_bufs->transfer_buffer[i] = usb_alloc_coherent(dev->udev,
  787. sb_size, GFP_KERNEL, &urb->transfer_dma);
  788. if (!usb_bufs->transfer_buffer[i]) {
  789. em28xx_err("unable to allocate %i bytes for transfer"
  790. " buffer %i%s\n",
  791. sb_size, i,
  792. in_interrupt() ? " while in int" : "");
  793. em28xx_uninit_usb_xfer(dev, mode);
  794. return -ENOMEM;
  795. }
  796. memset(usb_bufs->transfer_buffer[i], 0, sb_size);
  797. if (xfer_bulk) { /* bulk */
  798. pipe = usb_rcvbulkpipe(dev->udev,
  799. mode == EM28XX_ANALOG_MODE ?
  800. dev->analog_ep_bulk :
  801. dev->dvb_ep_bulk);
  802. usb_fill_bulk_urb(urb, dev->udev, pipe,
  803. usb_bufs->transfer_buffer[i], sb_size,
  804. em28xx_irq_callback, dev);
  805. urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
  806. } else { /* isoc */
  807. pipe = usb_rcvisocpipe(dev->udev,
  808. mode == EM28XX_ANALOG_MODE ?
  809. dev->analog_ep_isoc :
  810. dev->dvb_ep_isoc);
  811. usb_fill_int_urb(urb, dev->udev, pipe,
  812. usb_bufs->transfer_buffer[i], sb_size,
  813. em28xx_irq_callback, dev, 1);
  814. urb->transfer_flags = URB_ISO_ASAP |
  815. URB_NO_TRANSFER_DMA_MAP;
  816. k = 0;
  817. for (j = 0; j < usb_bufs->num_packets; j++) {
  818. urb->iso_frame_desc[j].offset = k;
  819. urb->iso_frame_desc[j].length =
  820. usb_bufs->max_pkt_size;
  821. k += usb_bufs->max_pkt_size;
  822. }
  823. }
  824. urb->number_of_packets = usb_bufs->num_packets;
  825. }
  826. return 0;
  827. }
  828. EXPORT_SYMBOL_GPL(em28xx_alloc_urbs);
  829. /*
  830. * Allocate URBs and start IRQ
  831. */
  832. int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
  833. int xfer_bulk, int num_bufs, int max_pkt_size,
  834. int packet_multiplier,
  835. int (*urb_data_copy)(struct em28xx *dev, struct urb *urb))
  836. {
  837. struct em28xx_dmaqueue *dma_q = &dev->vidq;
  838. struct em28xx_dmaqueue *vbi_dma_q = &dev->vbiq;
  839. struct em28xx_usb_bufs *usb_bufs;
  840. int i;
  841. int rc;
  842. int alloc;
  843. em28xx_isocdbg("em28xx: called em28xx_init_usb_xfer in mode %d\n",
  844. mode);
  845. dev->usb_ctl.urb_data_copy = urb_data_copy;
  846. if (mode == EM28XX_DIGITAL_MODE) {
  847. usb_bufs = &dev->usb_ctl.digital_bufs;
  848. /* no need to free/alloc usb buffers in digital mode */
  849. alloc = 0;
  850. } else {
  851. usb_bufs = &dev->usb_ctl.analog_bufs;
  852. alloc = 1;
  853. }
  854. if (alloc) {
  855. rc = em28xx_alloc_urbs(dev, mode, xfer_bulk, num_bufs,
  856. max_pkt_size, packet_multiplier);
  857. if (rc)
  858. return rc;
  859. }
  860. if (xfer_bulk) {
  861. rc = usb_clear_halt(dev->udev, usb_bufs->urb[0]->pipe);
  862. if (rc < 0) {
  863. em28xx_err("failed to clear USB bulk endpoint stall/halt condition (error=%i)\n",
  864. rc);
  865. em28xx_uninit_usb_xfer(dev, mode);
  866. return rc;
  867. }
  868. }
  869. init_waitqueue_head(&dma_q->wq);
  870. init_waitqueue_head(&vbi_dma_q->wq);
  871. em28xx_capture_start(dev, 1);
  872. /* submit urbs and enables IRQ */
  873. for (i = 0; i < usb_bufs->num_bufs; i++) {
  874. rc = usb_submit_urb(usb_bufs->urb[i], GFP_ATOMIC);
  875. if (rc) {
  876. em28xx_err("submit of urb %i failed (error=%i)\n", i,
  877. rc);
  878. em28xx_uninit_usb_xfer(dev, mode);
  879. return rc;
  880. }
  881. }
  882. return 0;
  883. }
  884. EXPORT_SYMBOL_GPL(em28xx_init_usb_xfer);
  885. /*
  886. * Device control list
  887. */
  888. static LIST_HEAD(em28xx_devlist);
  889. static DEFINE_MUTEX(em28xx_devlist_mutex);
  890. /*
  891. * Extension interface
  892. */
  893. static LIST_HEAD(em28xx_extension_devlist);
  894. int em28xx_register_extension(struct em28xx_ops *ops)
  895. {
  896. struct em28xx *dev = NULL;
  897. mutex_lock(&em28xx_devlist_mutex);
  898. list_add_tail(&ops->next, &em28xx_extension_devlist);
  899. list_for_each_entry(dev, &em28xx_devlist, devlist) {
  900. ops->init(dev);
  901. }
  902. mutex_unlock(&em28xx_devlist_mutex);
  903. printk(KERN_INFO "em28xx: Registered (%s) extension\n", ops->name);
  904. return 0;
  905. }
  906. EXPORT_SYMBOL(em28xx_register_extension);
  907. void em28xx_unregister_extension(struct em28xx_ops *ops)
  908. {
  909. struct em28xx *dev = NULL;
  910. mutex_lock(&em28xx_devlist_mutex);
  911. list_for_each_entry(dev, &em28xx_devlist, devlist) {
  912. ops->fini(dev);
  913. }
  914. list_del(&ops->next);
  915. mutex_unlock(&em28xx_devlist_mutex);
  916. printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name);
  917. }
  918. EXPORT_SYMBOL(em28xx_unregister_extension);
  919. void em28xx_init_extension(struct em28xx *dev)
  920. {
  921. const struct em28xx_ops *ops = NULL;
  922. mutex_lock(&em28xx_devlist_mutex);
  923. list_add_tail(&dev->devlist, &em28xx_devlist);
  924. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  925. if (ops->init)
  926. ops->init(dev);
  927. }
  928. mutex_unlock(&em28xx_devlist_mutex);
  929. }
  930. void em28xx_close_extension(struct em28xx *dev)
  931. {
  932. const struct em28xx_ops *ops = NULL;
  933. mutex_lock(&em28xx_devlist_mutex);
  934. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  935. if (ops->fini)
  936. ops->fini(dev);
  937. }
  938. list_del(&dev->devlist);
  939. mutex_unlock(&em28xx_devlist_mutex);
  940. }
  941. int em28xx_suspend_extension(struct em28xx *dev)
  942. {
  943. const struct em28xx_ops *ops = NULL;
  944. em28xx_info("Suspending extensions\n");
  945. mutex_lock(&em28xx_devlist_mutex);
  946. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  947. if (ops->suspend)
  948. ops->suspend(dev);
  949. }
  950. mutex_unlock(&em28xx_devlist_mutex);
  951. return 0;
  952. }
  953. int em28xx_resume_extension(struct em28xx *dev)
  954. {
  955. const struct em28xx_ops *ops = NULL;
  956. em28xx_info("Resuming extensions\n");
  957. mutex_lock(&em28xx_devlist_mutex);
  958. list_for_each_entry(ops, &em28xx_extension_devlist, next) {
  959. if (ops->resume)
  960. ops->resume(dev);
  961. }
  962. mutex_unlock(&em28xx_devlist_mutex);
  963. return 0;
  964. }