eeprom_93xx46.c 8.0 KB

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  1. /*
  2. * Driver for 93xx46 EEPROMs
  3. *
  4. * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/delay.h>
  11. #include <linux/device.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/mutex.h>
  15. #include <linux/slab.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/sysfs.h>
  18. #include <linux/eeprom_93xx46.h>
  19. #define OP_START 0x4
  20. #define OP_WRITE (OP_START | 0x1)
  21. #define OP_READ (OP_START | 0x2)
  22. #define ADDR_EWDS 0x00
  23. #define ADDR_ERAL 0x20
  24. #define ADDR_EWEN 0x30
  25. struct eeprom_93xx46_dev {
  26. struct spi_device *spi;
  27. struct eeprom_93xx46_platform_data *pdata;
  28. struct bin_attribute bin;
  29. struct mutex lock;
  30. int addrlen;
  31. };
  32. static ssize_t
  33. eeprom_93xx46_bin_read(struct file *filp, struct kobject *kobj,
  34. struct bin_attribute *bin_attr,
  35. char *buf, loff_t off, size_t count)
  36. {
  37. struct eeprom_93xx46_dev *edev;
  38. struct device *dev;
  39. struct spi_message m;
  40. struct spi_transfer t[2];
  41. int bits, ret;
  42. u16 cmd_addr;
  43. dev = container_of(kobj, struct device, kobj);
  44. edev = dev_get_drvdata(dev);
  45. cmd_addr = OP_READ << edev->addrlen;
  46. if (edev->addrlen == 7) {
  47. cmd_addr |= off & 0x7f;
  48. bits = 10;
  49. } else {
  50. cmd_addr |= off & 0x3f;
  51. bits = 9;
  52. }
  53. dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
  54. cmd_addr, edev->spi->max_speed_hz);
  55. spi_message_init(&m);
  56. memset(t, 0, sizeof(t));
  57. t[0].tx_buf = (char *)&cmd_addr;
  58. t[0].len = 2;
  59. t[0].bits_per_word = bits;
  60. spi_message_add_tail(&t[0], &m);
  61. t[1].rx_buf = buf;
  62. t[1].len = count;
  63. t[1].bits_per_word = 8;
  64. spi_message_add_tail(&t[1], &m);
  65. mutex_lock(&edev->lock);
  66. if (edev->pdata->prepare)
  67. edev->pdata->prepare(edev);
  68. ret = spi_sync(edev->spi, &m);
  69. /* have to wait at least Tcsl ns */
  70. ndelay(250);
  71. if (ret) {
  72. dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
  73. count, (int)off, ret);
  74. }
  75. if (edev->pdata->finish)
  76. edev->pdata->finish(edev);
  77. mutex_unlock(&edev->lock);
  78. return ret ? : count;
  79. }
  80. static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
  81. {
  82. struct spi_message m;
  83. struct spi_transfer t;
  84. int bits, ret;
  85. u16 cmd_addr;
  86. cmd_addr = OP_START << edev->addrlen;
  87. if (edev->addrlen == 7) {
  88. cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
  89. bits = 10;
  90. } else {
  91. cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
  92. bits = 9;
  93. }
  94. dev_dbg(&edev->spi->dev, "ew cmd 0x%04x\n", cmd_addr);
  95. spi_message_init(&m);
  96. memset(&t, 0, sizeof(t));
  97. t.tx_buf = &cmd_addr;
  98. t.len = 2;
  99. t.bits_per_word = bits;
  100. spi_message_add_tail(&t, &m);
  101. mutex_lock(&edev->lock);
  102. if (edev->pdata->prepare)
  103. edev->pdata->prepare(edev);
  104. ret = spi_sync(edev->spi, &m);
  105. /* have to wait at least Tcsl ns */
  106. ndelay(250);
  107. if (ret)
  108. dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
  109. is_on ? "en" : "dis", ret);
  110. if (edev->pdata->finish)
  111. edev->pdata->finish(edev);
  112. mutex_unlock(&edev->lock);
  113. return ret;
  114. }
  115. static ssize_t
  116. eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
  117. const char *buf, unsigned off)
  118. {
  119. struct spi_message m;
  120. struct spi_transfer t[2];
  121. int bits, data_len, ret;
  122. u16 cmd_addr;
  123. cmd_addr = OP_WRITE << edev->addrlen;
  124. if (edev->addrlen == 7) {
  125. cmd_addr |= off & 0x7f;
  126. bits = 10;
  127. data_len = 1;
  128. } else {
  129. cmd_addr |= off & 0x3f;
  130. bits = 9;
  131. data_len = 2;
  132. }
  133. dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
  134. spi_message_init(&m);
  135. memset(t, 0, sizeof(t));
  136. t[0].tx_buf = (char *)&cmd_addr;
  137. t[0].len = 2;
  138. t[0].bits_per_word = bits;
  139. spi_message_add_tail(&t[0], &m);
  140. t[1].tx_buf = buf;
  141. t[1].len = data_len;
  142. t[1].bits_per_word = 8;
  143. spi_message_add_tail(&t[1], &m);
  144. ret = spi_sync(edev->spi, &m);
  145. /* have to wait program cycle time Twc ms */
  146. mdelay(6);
  147. return ret;
  148. }
  149. static ssize_t
  150. eeprom_93xx46_bin_write(struct file *filp, struct kobject *kobj,
  151. struct bin_attribute *bin_attr,
  152. char *buf, loff_t off, size_t count)
  153. {
  154. struct eeprom_93xx46_dev *edev;
  155. struct device *dev;
  156. int i, ret, step = 1;
  157. dev = container_of(kobj, struct device, kobj);
  158. edev = dev_get_drvdata(dev);
  159. /* only write even number of bytes on 16-bit devices */
  160. if (edev->addrlen == 6) {
  161. step = 2;
  162. count &= ~1;
  163. }
  164. /* erase/write enable */
  165. ret = eeprom_93xx46_ew(edev, 1);
  166. if (ret)
  167. return ret;
  168. mutex_lock(&edev->lock);
  169. if (edev->pdata->prepare)
  170. edev->pdata->prepare(edev);
  171. for (i = 0; i < count; i += step) {
  172. ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
  173. if (ret) {
  174. dev_err(&edev->spi->dev, "write failed at %d: %d\n",
  175. (int)off + i, ret);
  176. break;
  177. }
  178. }
  179. if (edev->pdata->finish)
  180. edev->pdata->finish(edev);
  181. mutex_unlock(&edev->lock);
  182. /* erase/write disable */
  183. eeprom_93xx46_ew(edev, 0);
  184. return ret ? : count;
  185. }
  186. static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
  187. {
  188. struct eeprom_93xx46_platform_data *pd = edev->pdata;
  189. struct spi_message m;
  190. struct spi_transfer t;
  191. int bits, ret;
  192. u16 cmd_addr;
  193. cmd_addr = OP_START << edev->addrlen;
  194. if (edev->addrlen == 7) {
  195. cmd_addr |= ADDR_ERAL << 1;
  196. bits = 10;
  197. } else {
  198. cmd_addr |= ADDR_ERAL;
  199. bits = 9;
  200. }
  201. spi_message_init(&m);
  202. memset(&t, 0, sizeof(t));
  203. t.tx_buf = &cmd_addr;
  204. t.len = 2;
  205. t.bits_per_word = bits;
  206. spi_message_add_tail(&t, &m);
  207. mutex_lock(&edev->lock);
  208. if (edev->pdata->prepare)
  209. edev->pdata->prepare(edev);
  210. ret = spi_sync(edev->spi, &m);
  211. if (ret)
  212. dev_err(&edev->spi->dev, "erase error %d\n", ret);
  213. /* have to wait erase cycle time Tec ms */
  214. mdelay(6);
  215. if (pd->finish)
  216. pd->finish(edev);
  217. mutex_unlock(&edev->lock);
  218. return ret;
  219. }
  220. static ssize_t eeprom_93xx46_store_erase(struct device *dev,
  221. struct device_attribute *attr,
  222. const char *buf, size_t count)
  223. {
  224. struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
  225. int erase = 0, ret;
  226. sscanf(buf, "%d", &erase);
  227. if (erase) {
  228. ret = eeprom_93xx46_ew(edev, 1);
  229. if (ret)
  230. return ret;
  231. ret = eeprom_93xx46_eral(edev);
  232. if (ret)
  233. return ret;
  234. ret = eeprom_93xx46_ew(edev, 0);
  235. if (ret)
  236. return ret;
  237. }
  238. return count;
  239. }
  240. static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
  241. static int eeprom_93xx46_probe(struct spi_device *spi)
  242. {
  243. struct eeprom_93xx46_platform_data *pd;
  244. struct eeprom_93xx46_dev *edev;
  245. int err;
  246. pd = spi->dev.platform_data;
  247. if (!pd) {
  248. dev_err(&spi->dev, "missing platform data\n");
  249. return -ENODEV;
  250. }
  251. edev = kzalloc(sizeof(*edev), GFP_KERNEL);
  252. if (!edev)
  253. return -ENOMEM;
  254. if (pd->flags & EE_ADDR8)
  255. edev->addrlen = 7;
  256. else if (pd->flags & EE_ADDR16)
  257. edev->addrlen = 6;
  258. else {
  259. dev_err(&spi->dev, "unspecified address type\n");
  260. err = -EINVAL;
  261. goto fail;
  262. }
  263. mutex_init(&edev->lock);
  264. edev->spi = spi_dev_get(spi);
  265. edev->pdata = pd;
  266. sysfs_bin_attr_init(&edev->bin);
  267. edev->bin.attr.name = "eeprom";
  268. edev->bin.attr.mode = S_IRUSR;
  269. edev->bin.read = eeprom_93xx46_bin_read;
  270. edev->bin.size = 128;
  271. if (!(pd->flags & EE_READONLY)) {
  272. edev->bin.write = eeprom_93xx46_bin_write;
  273. edev->bin.attr.mode |= S_IWUSR;
  274. }
  275. err = sysfs_create_bin_file(&spi->dev.kobj, &edev->bin);
  276. if (err)
  277. goto fail;
  278. dev_info(&spi->dev, "%d-bit eeprom %s\n",
  279. (pd->flags & EE_ADDR8) ? 8 : 16,
  280. (pd->flags & EE_READONLY) ? "(readonly)" : "");
  281. if (!(pd->flags & EE_READONLY)) {
  282. if (device_create_file(&spi->dev, &dev_attr_erase))
  283. dev_err(&spi->dev, "can't create erase interface\n");
  284. }
  285. spi_set_drvdata(spi, edev);
  286. return 0;
  287. fail:
  288. kfree(edev);
  289. return err;
  290. }
  291. static int eeprom_93xx46_remove(struct spi_device *spi)
  292. {
  293. struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
  294. if (!(edev->pdata->flags & EE_READONLY))
  295. device_remove_file(&spi->dev, &dev_attr_erase);
  296. sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
  297. kfree(edev);
  298. return 0;
  299. }
  300. static struct spi_driver eeprom_93xx46_driver = {
  301. .driver = {
  302. .name = "93xx46",
  303. },
  304. .probe = eeprom_93xx46_probe,
  305. .remove = eeprom_93xx46_remove,
  306. };
  307. module_spi_driver(eeprom_93xx46_driver);
  308. MODULE_LICENSE("GPL");
  309. MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
  310. MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
  311. MODULE_ALIAS("spi:93xx46");