l440gx.c 4.0 KB

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  1. /*
  2. * BIOS Flash chip on Intel 440GX board.
  3. *
  4. * Bugs this currently does not work under linuxBIOS.
  5. */
  6. #include <linux/module.h>
  7. #include <linux/pci.h>
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <asm/io.h>
  11. #include <linux/mtd/mtd.h>
  12. #include <linux/mtd/map.h>
  13. #define PIIXE_IOBASE_RESOURCE 11
  14. #define WINDOW_ADDR 0xfff00000
  15. #define WINDOW_SIZE 0x00100000
  16. #define BUSWIDTH 1
  17. static u32 iobase;
  18. #define IOBASE iobase
  19. #define TRIBUF_PORT (IOBASE+0x37)
  20. #define VPP_PORT (IOBASE+0x28)
  21. static struct mtd_info *mymtd;
  22. /* Is this really the vpp port? */
  23. static DEFINE_SPINLOCK(l440gx_vpp_lock);
  24. static int l440gx_vpp_refcnt;
  25. static void l440gx_set_vpp(struct map_info *map, int vpp)
  26. {
  27. unsigned long flags;
  28. spin_lock_irqsave(&l440gx_vpp_lock, flags);
  29. if (vpp) {
  30. if (++l440gx_vpp_refcnt == 1) /* first nested 'on' */
  31. outl(inl(VPP_PORT) | 1, VPP_PORT);
  32. } else {
  33. if (--l440gx_vpp_refcnt == 0) /* last nested 'off' */
  34. outl(inl(VPP_PORT) & ~1, VPP_PORT);
  35. }
  36. spin_unlock_irqrestore(&l440gx_vpp_lock, flags);
  37. }
  38. static struct map_info l440gx_map = {
  39. .name = "L440GX BIOS",
  40. .size = WINDOW_SIZE,
  41. .bankwidth = BUSWIDTH,
  42. .phys = WINDOW_ADDR,
  43. #if 0
  44. /* FIXME verify that this is the
  45. * appripriate code for vpp enable/disable
  46. */
  47. .set_vpp = l440gx_set_vpp
  48. #endif
  49. };
  50. static int __init init_l440gx(void)
  51. {
  52. struct pci_dev *dev, *pm_dev;
  53. struct resource *pm_iobase;
  54. __u16 word;
  55. dev = pci_get_device(PCI_VENDOR_ID_INTEL,
  56. PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
  57. pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
  58. PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
  59. pci_dev_put(dev);
  60. if (!dev || !pm_dev) {
  61. printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
  62. pci_dev_put(pm_dev);
  63. return -ENODEV;
  64. }
  65. l440gx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
  66. if (!l440gx_map.virt) {
  67. printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
  68. pci_dev_put(pm_dev);
  69. return -ENOMEM;
  70. }
  71. simple_map_init(&l440gx_map);
  72. printk(KERN_NOTICE "window_addr = 0x%08lx\n", (unsigned long)l440gx_map.virt);
  73. /* Setup the pm iobase resource
  74. * This code should move into some kind of generic bridge
  75. * driver but for the moment I'm content with getting the
  76. * allocation correct.
  77. */
  78. pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
  79. if (!(pm_iobase->flags & IORESOURCE_IO)) {
  80. pm_iobase->name = "pm iobase";
  81. pm_iobase->start = 0;
  82. pm_iobase->end = 63;
  83. pm_iobase->flags = IORESOURCE_IO;
  84. /* Put the current value in the resource */
  85. pci_read_config_dword(pm_dev, 0x40, &iobase);
  86. iobase &= ~1;
  87. pm_iobase->start += iobase & ~1;
  88. pm_iobase->end += iobase & ~1;
  89. pci_dev_put(pm_dev);
  90. /* Allocate the resource region */
  91. if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
  92. pci_dev_put(dev);
  93. pci_dev_put(pm_dev);
  94. printk(KERN_WARNING "Could not allocate pm iobase resource\n");
  95. iounmap(l440gx_map.virt);
  96. return -ENXIO;
  97. }
  98. }
  99. /* Set the iobase */
  100. iobase = pm_iobase->start;
  101. pci_write_config_dword(pm_dev, 0x40, iobase | 1);
  102. /* Set XBCS# */
  103. pci_read_config_word(dev, 0x4e, &word);
  104. word |= 0x4;
  105. pci_write_config_word(dev, 0x4e, word);
  106. /* Supply write voltage to the chip */
  107. l440gx_set_vpp(&l440gx_map, 1);
  108. /* Enable the gate on the WE line */
  109. outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
  110. printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
  111. mymtd = do_map_probe("jedec_probe", &l440gx_map);
  112. if (!mymtd) {
  113. printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
  114. mymtd = do_map_probe("map_rom", &l440gx_map);
  115. }
  116. if (mymtd) {
  117. mymtd->owner = THIS_MODULE;
  118. mtd_device_register(mymtd, NULL, 0);
  119. return 0;
  120. }
  121. iounmap(l440gx_map.virt);
  122. return -ENXIO;
  123. }
  124. static void __exit cleanup_l440gx(void)
  125. {
  126. mtd_device_unregister(mymtd);
  127. map_destroy(mymtd);
  128. iounmap(l440gx_map.virt);
  129. }
  130. module_init(init_l440gx);
  131. module_exit(cleanup_l440gx);
  132. MODULE_LICENSE("GPL");
  133. MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
  134. MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");