am79c961a.c 18 KB

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  1. /*
  2. * linux/drivers/net/ethernet/amd/am79c961a.c
  3. *
  4. * by Russell King <rmk@arm.linux.org.uk> 1995-2001.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Derived from various things including skeleton.c
  11. *
  12. * This is a special driver for the am79c961A Lance chip used in the
  13. * Intel (formally Digital Equipment Corp) EBSA110 platform. Please
  14. * note that this can not be built as a module (it doesn't make sense).
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/types.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/ioport.h>
  20. #include <linux/slab.h>
  21. #include <linux/string.h>
  22. #include <linux/errno.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/delay.h>
  26. #include <linux/init.h>
  27. #include <linux/crc32.h>
  28. #include <linux/bitops.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/io.h>
  31. #include <mach/hardware.h>
  32. #define TX_BUFFERS 15
  33. #define RX_BUFFERS 25
  34. #include "am79c961a.h"
  35. static irqreturn_t
  36. am79c961_interrupt (int irq, void *dev_id);
  37. static unsigned int net_debug = NET_DEBUG;
  38. static const char version[] =
  39. "am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n";
  40. /* --------------------------------------------------------------------------- */
  41. #ifdef __arm__
  42. static void write_rreg(u_long base, u_int reg, u_int val)
  43. {
  44. asm volatile(
  45. "str%?h %1, [%2] @ NET_RAP\n\t"
  46. "str%?h %0, [%2, #-4] @ NET_RDP"
  47. :
  48. : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
  49. }
  50. static inline unsigned short read_rreg(u_long base_addr, u_int reg)
  51. {
  52. unsigned short v;
  53. asm volatile(
  54. "str%?h %1, [%2] @ NET_RAP\n\t"
  55. "ldr%?h %0, [%2, #-4] @ NET_RDP"
  56. : "=r" (v)
  57. : "r" (reg), "r" (ISAIO_BASE + 0x0464));
  58. return v;
  59. }
  60. static inline void write_ireg(u_long base, u_int reg, u_int val)
  61. {
  62. asm volatile(
  63. "str%?h %1, [%2] @ NET_RAP\n\t"
  64. "str%?h %0, [%2, #8] @ NET_IDP"
  65. :
  66. : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
  67. }
  68. static inline unsigned short read_ireg(u_long base_addr, u_int reg)
  69. {
  70. u_short v;
  71. asm volatile(
  72. "str%?h %1, [%2] @ NAT_RAP\n\t"
  73. "ldr%?h %0, [%2, #8] @ NET_IDP\n\t"
  74. : "=r" (v)
  75. : "r" (reg), "r" (ISAIO_BASE + 0x0464));
  76. return v;
  77. }
  78. #define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1))
  79. #define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1))
  80. static void
  81. am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
  82. {
  83. offset = ISAMEM_BASE + (offset << 1);
  84. length = (length + 1) & ~1;
  85. if ((int)buf & 2) {
  86. asm volatile("str%?h %2, [%0], #4"
  87. : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
  88. buf += 2;
  89. length -= 2;
  90. }
  91. while (length > 8) {
  92. register unsigned int tmp asm("r2"), tmp2 asm("r3");
  93. asm volatile(
  94. "ldm%?ia %0!, {%1, %2}"
  95. : "+r" (buf), "=&r" (tmp), "=&r" (tmp2));
  96. length -= 8;
  97. asm volatile(
  98. "str%?h %1, [%0], #4\n\t"
  99. "mov%? %1, %1, lsr #16\n\t"
  100. "str%?h %1, [%0], #4\n\t"
  101. "str%?h %2, [%0], #4\n\t"
  102. "mov%? %2, %2, lsr #16\n\t"
  103. "str%?h %2, [%0], #4"
  104. : "+r" (offset), "=&r" (tmp), "=&r" (tmp2));
  105. }
  106. while (length > 0) {
  107. asm volatile("str%?h %2, [%0], #4"
  108. : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
  109. buf += 2;
  110. length -= 2;
  111. }
  112. }
  113. static void
  114. am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
  115. {
  116. offset = ISAMEM_BASE + (offset << 1);
  117. length = (length + 1) & ~1;
  118. if ((int)buf & 2) {
  119. unsigned int tmp;
  120. asm volatile(
  121. "ldr%?h %2, [%0], #4\n\t"
  122. "str%?b %2, [%1], #1\n\t"
  123. "mov%? %2, %2, lsr #8\n\t"
  124. "str%?b %2, [%1], #1"
  125. : "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
  126. length -= 2;
  127. }
  128. while (length > 8) {
  129. register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3;
  130. asm volatile(
  131. "ldr%?h %2, [%0], #4\n\t"
  132. "ldr%?h %4, [%0], #4\n\t"
  133. "ldr%?h %3, [%0], #4\n\t"
  134. "orr%? %2, %2, %4, lsl #16\n\t"
  135. "ldr%?h %4, [%0], #4\n\t"
  136. "orr%? %3, %3, %4, lsl #16\n\t"
  137. "stm%?ia %1!, {%2, %3}"
  138. : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
  139. : "0" (offset), "1" (buf));
  140. length -= 8;
  141. }
  142. while (length > 0) {
  143. unsigned int tmp;
  144. asm volatile(
  145. "ldr%?h %2, [%0], #4\n\t"
  146. "str%?b %2, [%1], #1\n\t"
  147. "mov%? %2, %2, lsr #8\n\t"
  148. "str%?b %2, [%1], #1"
  149. : "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
  150. length -= 2;
  151. }
  152. }
  153. #else
  154. #error Not compatible
  155. #endif
  156. static int
  157. am79c961_ramtest(struct net_device *dev, unsigned int val)
  158. {
  159. unsigned char *buffer = kmalloc (65536, GFP_KERNEL);
  160. int i, error = 0, errorcount = 0;
  161. if (!buffer)
  162. return 0;
  163. memset (buffer, val, 65536);
  164. am_writebuffer(dev, 0, buffer, 65536);
  165. memset (buffer, val ^ 255, 65536);
  166. am_readbuffer(dev, 0, buffer, 65536);
  167. for (i = 0; i < 65536; i++) {
  168. if (buffer[i] != val && !error) {
  169. printk ("%s: buffer error (%02X %02X) %05X - ", dev->name, val, buffer[i], i);
  170. error = 1;
  171. errorcount ++;
  172. } else if (error && buffer[i] == val) {
  173. printk ("%05X\n", i);
  174. error = 0;
  175. }
  176. }
  177. if (error)
  178. printk ("10000\n");
  179. kfree (buffer);
  180. return errorcount;
  181. }
  182. static void am79c961_mc_hash(char *addr, u16 *hash)
  183. {
  184. int idx, bit;
  185. u32 crc;
  186. crc = ether_crc_le(ETH_ALEN, addr);
  187. idx = crc >> 30;
  188. bit = (crc >> 26) & 15;
  189. hash[idx] |= 1 << bit;
  190. }
  191. static unsigned int am79c961_get_rx_mode(struct net_device *dev, u16 *hash)
  192. {
  193. unsigned int mode = MODE_PORT_10BT;
  194. if (dev->flags & IFF_PROMISC) {
  195. mode |= MODE_PROMISC;
  196. memset(hash, 0xff, 4 * sizeof(*hash));
  197. } else if (dev->flags & IFF_ALLMULTI) {
  198. memset(hash, 0xff, 4 * sizeof(*hash));
  199. } else {
  200. struct netdev_hw_addr *ha;
  201. memset(hash, 0, 4 * sizeof(*hash));
  202. netdev_for_each_mc_addr(ha, dev)
  203. am79c961_mc_hash(ha->addr, hash);
  204. }
  205. return mode;
  206. }
  207. static void
  208. am79c961_init_for_open(struct net_device *dev)
  209. {
  210. struct dev_priv *priv = netdev_priv(dev);
  211. unsigned long flags;
  212. unsigned char *p;
  213. u_int hdr_addr, first_free_addr;
  214. u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);
  215. int i;
  216. /*
  217. * Stop the chip.
  218. */
  219. spin_lock_irqsave(&priv->chip_lock, flags);
  220. write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
  221. spin_unlock_irqrestore(&priv->chip_lock, flags);
  222. write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */
  223. write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */
  224. write_ireg (dev->base_addr, 7, 0x0090); /* XMIT LED */
  225. write_ireg (dev->base_addr, 2, 0x0000); /* MODE register selects media */
  226. for (i = LADRL; i <= LADRH; i++)
  227. write_rreg (dev->base_addr, i, multi_hash[i - LADRL]);
  228. for (i = PADRL, p = dev->dev_addr; i <= PADRH; i++, p += 2)
  229. write_rreg (dev->base_addr, i, p[0] | (p[1] << 8));
  230. write_rreg (dev->base_addr, MODE, mode);
  231. write_rreg (dev->base_addr, POLLINT, 0);
  232. write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS);
  233. write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS);
  234. first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16;
  235. hdr_addr = 0;
  236. priv->rxhead = 0;
  237. priv->rxtail = 0;
  238. priv->rxhdr = hdr_addr;
  239. for (i = 0; i < RX_BUFFERS; i++) {
  240. priv->rxbuffer[i] = first_free_addr;
  241. am_writeword (dev, hdr_addr, first_free_addr);
  242. am_writeword (dev, hdr_addr + 2, RMD_OWN);
  243. am_writeword (dev, hdr_addr + 4, (-1600));
  244. am_writeword (dev, hdr_addr + 6, 0);
  245. first_free_addr += 1600;
  246. hdr_addr += 8;
  247. }
  248. priv->txhead = 0;
  249. priv->txtail = 0;
  250. priv->txhdr = hdr_addr;
  251. for (i = 0; i < TX_BUFFERS; i++) {
  252. priv->txbuffer[i] = first_free_addr;
  253. am_writeword (dev, hdr_addr, first_free_addr);
  254. am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP);
  255. am_writeword (dev, hdr_addr + 4, 0xf000);
  256. am_writeword (dev, hdr_addr + 6, 0);
  257. first_free_addr += 1600;
  258. hdr_addr += 8;
  259. }
  260. write_rreg (dev->base_addr, BASERXL, priv->rxhdr);
  261. write_rreg (dev->base_addr, BASERXH, 0);
  262. write_rreg (dev->base_addr, BASETXL, priv->txhdr);
  263. write_rreg (dev->base_addr, BASERXH, 0);
  264. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  265. write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);
  266. write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);
  267. write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);
  268. }
  269. static void am79c961_timer(unsigned long data)
  270. {
  271. struct net_device *dev = (struct net_device *)data;
  272. struct dev_priv *priv = netdev_priv(dev);
  273. unsigned int lnkstat, carrier;
  274. unsigned long flags;
  275. spin_lock_irqsave(&priv->chip_lock, flags);
  276. lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST;
  277. spin_unlock_irqrestore(&priv->chip_lock, flags);
  278. carrier = netif_carrier_ok(dev);
  279. if (lnkstat && !carrier) {
  280. netif_carrier_on(dev);
  281. printk("%s: link up\n", dev->name);
  282. } else if (!lnkstat && carrier) {
  283. netif_carrier_off(dev);
  284. printk("%s: link down\n", dev->name);
  285. }
  286. mod_timer(&priv->timer, jiffies + msecs_to_jiffies(500));
  287. }
  288. /*
  289. * Open/initialize the board.
  290. */
  291. static int
  292. am79c961_open(struct net_device *dev)
  293. {
  294. struct dev_priv *priv = netdev_priv(dev);
  295. int ret;
  296. ret = request_irq(dev->irq, am79c961_interrupt, 0, dev->name, dev);
  297. if (ret)
  298. return ret;
  299. am79c961_init_for_open(dev);
  300. netif_carrier_off(dev);
  301. priv->timer.expires = jiffies;
  302. add_timer(&priv->timer);
  303. netif_start_queue(dev);
  304. return 0;
  305. }
  306. /*
  307. * The inverse routine to am79c961_open().
  308. */
  309. static int
  310. am79c961_close(struct net_device *dev)
  311. {
  312. struct dev_priv *priv = netdev_priv(dev);
  313. unsigned long flags;
  314. del_timer_sync(&priv->timer);
  315. netif_stop_queue(dev);
  316. netif_carrier_off(dev);
  317. spin_lock_irqsave(&priv->chip_lock, flags);
  318. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  319. write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
  320. spin_unlock_irqrestore(&priv->chip_lock, flags);
  321. free_irq (dev->irq, dev);
  322. return 0;
  323. }
  324. /*
  325. * Set or clear promiscuous/multicast mode filter for this adapter.
  326. */
  327. static void am79c961_setmulticastlist (struct net_device *dev)
  328. {
  329. struct dev_priv *priv = netdev_priv(dev);
  330. unsigned long flags;
  331. u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);
  332. int i, stopped;
  333. spin_lock_irqsave(&priv->chip_lock, flags);
  334. stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
  335. if (!stopped) {
  336. /*
  337. * Put the chip into suspend mode
  338. */
  339. write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
  340. /*
  341. * Spin waiting for chip to report suspend mode
  342. */
  343. while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
  344. spin_unlock_irqrestore(&priv->chip_lock, flags);
  345. nop();
  346. spin_lock_irqsave(&priv->chip_lock, flags);
  347. }
  348. }
  349. /*
  350. * Update the multicast hash table
  351. */
  352. for (i = 0; i < ARRAY_SIZE(multi_hash); i++)
  353. write_rreg(dev->base_addr, i + LADRL, multi_hash[i]);
  354. /*
  355. * Write the mode register
  356. */
  357. write_rreg(dev->base_addr, MODE, mode);
  358. if (!stopped) {
  359. /*
  360. * Put the chip back into running mode
  361. */
  362. write_rreg(dev->base_addr, CTRL1, 0);
  363. }
  364. spin_unlock_irqrestore(&priv->chip_lock, flags);
  365. }
  366. static void am79c961_timeout(struct net_device *dev)
  367. {
  368. printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n",
  369. dev->name);
  370. /*
  371. * ought to do some setup of the tx side here
  372. */
  373. netif_wake_queue(dev);
  374. }
  375. /*
  376. * Transmit a packet
  377. */
  378. static int
  379. am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)
  380. {
  381. struct dev_priv *priv = netdev_priv(dev);
  382. unsigned int hdraddr, bufaddr;
  383. unsigned int head;
  384. unsigned long flags;
  385. head = priv->txhead;
  386. hdraddr = priv->txhdr + (head << 3);
  387. bufaddr = priv->txbuffer[head];
  388. head += 1;
  389. if (head >= TX_BUFFERS)
  390. head = 0;
  391. am_writebuffer (dev, bufaddr, skb->data, skb->len);
  392. am_writeword (dev, hdraddr + 4, -skb->len);
  393. am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);
  394. priv->txhead = head;
  395. spin_lock_irqsave(&priv->chip_lock, flags);
  396. write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
  397. spin_unlock_irqrestore(&priv->chip_lock, flags);
  398. /*
  399. * If the next packet is owned by the ethernet device,
  400. * then the tx ring is full and we can't add another
  401. * packet.
  402. */
  403. if (am_readword(dev, priv->txhdr + (priv->txhead << 3) + 2) & TMD_OWN)
  404. netif_stop_queue(dev);
  405. dev_consume_skb_any(skb);
  406. return NETDEV_TX_OK;
  407. }
  408. /*
  409. * If we have a good packet(s), get it/them out of the buffers.
  410. */
  411. static void
  412. am79c961_rx(struct net_device *dev, struct dev_priv *priv)
  413. {
  414. do {
  415. struct sk_buff *skb;
  416. u_int hdraddr;
  417. u_int pktaddr;
  418. u_int status;
  419. int len;
  420. hdraddr = priv->rxhdr + (priv->rxtail << 3);
  421. pktaddr = priv->rxbuffer[priv->rxtail];
  422. status = am_readword (dev, hdraddr + 2);
  423. if (status & RMD_OWN) /* do we own it? */
  424. break;
  425. priv->rxtail ++;
  426. if (priv->rxtail >= RX_BUFFERS)
  427. priv->rxtail = 0;
  428. if ((status & (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) {
  429. am_writeword (dev, hdraddr + 2, RMD_OWN);
  430. dev->stats.rx_errors++;
  431. if (status & RMD_ERR) {
  432. if (status & RMD_FRAM)
  433. dev->stats.rx_frame_errors++;
  434. if (status & RMD_CRC)
  435. dev->stats.rx_crc_errors++;
  436. } else if (status & RMD_STP)
  437. dev->stats.rx_length_errors++;
  438. continue;
  439. }
  440. len = am_readword(dev, hdraddr + 6);
  441. skb = netdev_alloc_skb(dev, len + 2);
  442. if (skb) {
  443. skb_reserve(skb, 2);
  444. am_readbuffer(dev, pktaddr, skb_put(skb, len), len);
  445. am_writeword(dev, hdraddr + 2, RMD_OWN);
  446. skb->protocol = eth_type_trans(skb, dev);
  447. netif_rx(skb);
  448. dev->stats.rx_bytes += len;
  449. dev->stats.rx_packets++;
  450. } else {
  451. am_writeword (dev, hdraddr + 2, RMD_OWN);
  452. dev->stats.rx_dropped++;
  453. break;
  454. }
  455. } while (1);
  456. }
  457. /*
  458. * Update stats for the transmitted packet
  459. */
  460. static void
  461. am79c961_tx(struct net_device *dev, struct dev_priv *priv)
  462. {
  463. do {
  464. short len;
  465. u_int hdraddr;
  466. u_int status;
  467. hdraddr = priv->txhdr + (priv->txtail << 3);
  468. status = am_readword (dev, hdraddr + 2);
  469. if (status & TMD_OWN)
  470. break;
  471. priv->txtail ++;
  472. if (priv->txtail >= TX_BUFFERS)
  473. priv->txtail = 0;
  474. if (status & TMD_ERR) {
  475. u_int status2;
  476. dev->stats.tx_errors++;
  477. status2 = am_readword (dev, hdraddr + 6);
  478. /*
  479. * Clear the error byte
  480. */
  481. am_writeword (dev, hdraddr + 6, 0);
  482. if (status2 & TST_RTRY)
  483. dev->stats.collisions += 16;
  484. if (status2 & TST_LCOL)
  485. dev->stats.tx_window_errors++;
  486. if (status2 & TST_LCAR)
  487. dev->stats.tx_carrier_errors++;
  488. if (status2 & TST_UFLO)
  489. dev->stats.tx_fifo_errors++;
  490. continue;
  491. }
  492. dev->stats.tx_packets++;
  493. len = am_readword (dev, hdraddr + 4);
  494. dev->stats.tx_bytes += -len;
  495. } while (priv->txtail != priv->txhead);
  496. netif_wake_queue(dev);
  497. }
  498. static irqreturn_t
  499. am79c961_interrupt(int irq, void *dev_id)
  500. {
  501. struct net_device *dev = (struct net_device *)dev_id;
  502. struct dev_priv *priv = netdev_priv(dev);
  503. u_int status, n = 100;
  504. int handled = 0;
  505. do {
  506. status = read_rreg(dev->base_addr, CSR0);
  507. write_rreg(dev->base_addr, CSR0, status &
  508. (CSR0_IENA|CSR0_TINT|CSR0_RINT|
  509. CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL));
  510. if (status & CSR0_RINT) {
  511. handled = 1;
  512. am79c961_rx(dev, priv);
  513. }
  514. if (status & CSR0_TINT) {
  515. handled = 1;
  516. am79c961_tx(dev, priv);
  517. }
  518. if (status & CSR0_MISS) {
  519. handled = 1;
  520. dev->stats.rx_dropped++;
  521. }
  522. if (status & CSR0_CERR) {
  523. handled = 1;
  524. mod_timer(&priv->timer, jiffies);
  525. }
  526. } while (--n && status & (CSR0_RINT | CSR0_TINT));
  527. return IRQ_RETVAL(handled);
  528. }
  529. #ifdef CONFIG_NET_POLL_CONTROLLER
  530. static void am79c961_poll_controller(struct net_device *dev)
  531. {
  532. unsigned long flags;
  533. local_irq_save(flags);
  534. am79c961_interrupt(dev->irq, dev);
  535. local_irq_restore(flags);
  536. }
  537. #endif
  538. /*
  539. * Initialise the chip. Note that we always expect
  540. * to be entered with interrupts enabled.
  541. */
  542. static int
  543. am79c961_hw_init(struct net_device *dev)
  544. {
  545. struct dev_priv *priv = netdev_priv(dev);
  546. spin_lock_irq(&priv->chip_lock);
  547. write_rreg (dev->base_addr, CSR0, CSR0_STOP);
  548. write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
  549. spin_unlock_irq(&priv->chip_lock);
  550. am79c961_ramtest(dev, 0x66);
  551. am79c961_ramtest(dev, 0x99);
  552. return 0;
  553. }
  554. static void __init am79c961_banner(void)
  555. {
  556. static unsigned version_printed;
  557. if (net_debug && version_printed++ == 0)
  558. printk(KERN_INFO "%s", version);
  559. }
  560. static const struct net_device_ops am79c961_netdev_ops = {
  561. .ndo_open = am79c961_open,
  562. .ndo_stop = am79c961_close,
  563. .ndo_start_xmit = am79c961_sendpacket,
  564. .ndo_set_rx_mode = am79c961_setmulticastlist,
  565. .ndo_tx_timeout = am79c961_timeout,
  566. .ndo_validate_addr = eth_validate_addr,
  567. .ndo_change_mtu = eth_change_mtu,
  568. .ndo_set_mac_address = eth_mac_addr,
  569. #ifdef CONFIG_NET_POLL_CONTROLLER
  570. .ndo_poll_controller = am79c961_poll_controller,
  571. #endif
  572. };
  573. static int am79c961_probe(struct platform_device *pdev)
  574. {
  575. struct resource *res;
  576. struct net_device *dev;
  577. struct dev_priv *priv;
  578. int i, ret;
  579. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  580. if (!res)
  581. return -ENODEV;
  582. dev = alloc_etherdev(sizeof(struct dev_priv));
  583. ret = -ENOMEM;
  584. if (!dev)
  585. goto out;
  586. SET_NETDEV_DEV(dev, &pdev->dev);
  587. priv = netdev_priv(dev);
  588. /*
  589. * Fixed address and IRQ lines here.
  590. * The PNP initialisation should have been
  591. * done by the ether bootp loader.
  592. */
  593. dev->base_addr = res->start;
  594. ret = platform_get_irq(pdev, 0);
  595. if (ret < 0) {
  596. ret = -ENODEV;
  597. goto nodev;
  598. }
  599. dev->irq = ret;
  600. ret = -ENODEV;
  601. if (!request_region(dev->base_addr, 0x18, dev->name))
  602. goto nodev;
  603. /*
  604. * Reset the device.
  605. */
  606. inb(dev->base_addr + NET_RESET);
  607. udelay(5);
  608. /*
  609. * Check the manufacturer part of the
  610. * ether address.
  611. */
  612. if (inb(dev->base_addr) != 0x08 ||
  613. inb(dev->base_addr + 2) != 0x00 ||
  614. inb(dev->base_addr + 4) != 0x2b)
  615. goto release;
  616. for (i = 0; i < 6; i++)
  617. dev->dev_addr[i] = inb(dev->base_addr + i * 2) & 0xff;
  618. am79c961_banner();
  619. spin_lock_init(&priv->chip_lock);
  620. init_timer(&priv->timer);
  621. priv->timer.data = (unsigned long)dev;
  622. priv->timer.function = am79c961_timer;
  623. if (am79c961_hw_init(dev))
  624. goto release;
  625. dev->netdev_ops = &am79c961_netdev_ops;
  626. ret = register_netdev(dev);
  627. if (ret == 0) {
  628. printk(KERN_INFO "%s: ether address %pM\n",
  629. dev->name, dev->dev_addr);
  630. return 0;
  631. }
  632. release:
  633. release_region(dev->base_addr, 0x18);
  634. nodev:
  635. free_netdev(dev);
  636. out:
  637. return ret;
  638. }
  639. static struct platform_driver am79c961_driver = {
  640. .probe = am79c961_probe,
  641. .driver = {
  642. .name = "am79c961",
  643. },
  644. };
  645. static int __init am79c961_init(void)
  646. {
  647. return platform_driver_register(&am79c961_driver);
  648. }
  649. __initcall(am79c961_init);