mdio_10g.c 8.5 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare network controllers and boards
  3. * Copyright 2006-2011 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. /*
  10. * Useful functions for working with MDIO clause 45 PHYs
  11. */
  12. #include <linux/types.h>
  13. #include <linux/ethtool.h>
  14. #include <linux/delay.h>
  15. #include "net_driver.h"
  16. #include "mdio_10g.h"
  17. #include "workarounds.h"
  18. unsigned efx_mdio_id_oui(u32 id)
  19. {
  20. unsigned oui = 0;
  21. int i;
  22. /* The bits of the OUI are designated a..x, with a=0 and b variable.
  23. * In the id register c is the MSB but the OUI is conventionally
  24. * written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */
  25. for (i = 0; i < 22; ++i)
  26. if (id & (1 << (i + 10)))
  27. oui |= 1 << (i ^ 7);
  28. return oui;
  29. }
  30. int efx_mdio_reset_mmd(struct efx_nic *port, int mmd,
  31. int spins, int spintime)
  32. {
  33. u32 ctrl;
  34. /* Catch callers passing values in the wrong units (or just silly) */
  35. EFX_BUG_ON_PARANOID(spins * spintime >= 5000);
  36. efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
  37. /* Wait for the reset bit to clear. */
  38. do {
  39. msleep(spintime);
  40. ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1);
  41. spins--;
  42. } while (spins && (ctrl & MDIO_CTRL1_RESET));
  43. return spins ? spins : -ETIMEDOUT;
  44. }
  45. static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd)
  46. {
  47. int status;
  48. if (mmd != MDIO_MMD_AN) {
  49. /* Read MMD STATUS2 to check it is responding. */
  50. status = efx_mdio_read(efx, mmd, MDIO_STAT2);
  51. if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
  52. netif_err(efx, hw, efx->net_dev,
  53. "PHY MMD %d not responding.\n", mmd);
  54. return -EIO;
  55. }
  56. }
  57. return 0;
  58. }
  59. /* This ought to be ridiculous overkill. We expect it to fail rarely */
  60. #define MDIO45_RESET_TIME 1000 /* ms */
  61. #define MDIO45_RESET_ITERS 100
  62. int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask)
  63. {
  64. const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
  65. int tries = MDIO45_RESET_ITERS;
  66. int rc = 0;
  67. int in_reset;
  68. while (tries) {
  69. int mask = mmd_mask;
  70. int mmd = 0;
  71. int stat;
  72. in_reset = 0;
  73. while (mask) {
  74. if (mask & 1) {
  75. stat = efx_mdio_read(efx, mmd, MDIO_CTRL1);
  76. if (stat < 0) {
  77. netif_err(efx, hw, efx->net_dev,
  78. "failed to read status of"
  79. " MMD %d\n", mmd);
  80. return -EIO;
  81. }
  82. if (stat & MDIO_CTRL1_RESET)
  83. in_reset |= (1 << mmd);
  84. }
  85. mask = mask >> 1;
  86. mmd++;
  87. }
  88. if (!in_reset)
  89. break;
  90. tries--;
  91. msleep(spintime);
  92. }
  93. if (in_reset != 0) {
  94. netif_err(efx, hw, efx->net_dev,
  95. "not all MMDs came out of reset in time."
  96. " MMDs still in reset: %x\n", in_reset);
  97. rc = -ETIMEDOUT;
  98. }
  99. return rc;
  100. }
  101. int efx_mdio_check_mmds(struct efx_nic *efx, unsigned int mmd_mask)
  102. {
  103. int mmd = 0, probe_mmd, devs1, devs2;
  104. u32 devices;
  105. /* Historically we have probed the PHYXS to find out what devices are
  106. * present,but that doesn't work so well if the PHYXS isn't expected
  107. * to exist, if so just find the first item in the list supplied. */
  108. probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
  109. __ffs(mmd_mask);
  110. /* Check all the expected MMDs are present */
  111. devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1);
  112. devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2);
  113. if (devs1 < 0 || devs2 < 0) {
  114. netif_err(efx, hw, efx->net_dev,
  115. "failed to read devices present\n");
  116. return -EIO;
  117. }
  118. devices = devs1 | (devs2 << 16);
  119. if ((devices & mmd_mask) != mmd_mask) {
  120. netif_err(efx, hw, efx->net_dev,
  121. "required MMDs not present: got %x, wanted %x\n",
  122. devices, mmd_mask);
  123. return -ENODEV;
  124. }
  125. netif_vdbg(efx, hw, efx->net_dev, "Devices present: %x\n", devices);
  126. /* Check all required MMDs are responding and happy. */
  127. while (mmd_mask) {
  128. if ((mmd_mask & 1) && efx_mdio_check_mmd(efx, mmd))
  129. return -EIO;
  130. mmd_mask = mmd_mask >> 1;
  131. mmd++;
  132. }
  133. return 0;
  134. }
  135. bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
  136. {
  137. /* If the port is in loopback, then we should only consider a subset
  138. * of mmd's */
  139. if (LOOPBACK_INTERNAL(efx))
  140. return true;
  141. else if (LOOPBACK_MASK(efx) & LOOPBACKS_WS)
  142. return false;
  143. else if (efx_phy_mode_disabled(efx->phy_mode))
  144. return false;
  145. else if (efx->loopback_mode == LOOPBACK_PHYXS)
  146. mmd_mask &= ~(MDIO_DEVS_PHYXS |
  147. MDIO_DEVS_PCS |
  148. MDIO_DEVS_PMAPMD |
  149. MDIO_DEVS_AN);
  150. else if (efx->loopback_mode == LOOPBACK_PCS)
  151. mmd_mask &= ~(MDIO_DEVS_PCS |
  152. MDIO_DEVS_PMAPMD |
  153. MDIO_DEVS_AN);
  154. else if (efx->loopback_mode == LOOPBACK_PMAPMD)
  155. mmd_mask &= ~(MDIO_DEVS_PMAPMD |
  156. MDIO_DEVS_AN);
  157. return mdio45_links_ok(&efx->mdio, mmd_mask);
  158. }
  159. void efx_mdio_transmit_disable(struct efx_nic *efx)
  160. {
  161. efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
  162. MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
  163. efx->phy_mode & PHY_MODE_TX_DISABLED);
  164. }
  165. void efx_mdio_phy_reconfigure(struct efx_nic *efx)
  166. {
  167. efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
  168. MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
  169. efx->loopback_mode == LOOPBACK_PMAPMD);
  170. efx_mdio_set_flag(efx, MDIO_MMD_PCS,
  171. MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
  172. efx->loopback_mode == LOOPBACK_PCS);
  173. efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
  174. MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
  175. efx->loopback_mode == LOOPBACK_PHYXS_WS);
  176. }
  177. static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
  178. int lpower, int mmd)
  179. {
  180. int stat = efx_mdio_read(efx, mmd, MDIO_STAT1);
  181. netif_vdbg(efx, drv, efx->net_dev, "Setting low power mode for MMD %d to %d\n",
  182. mmd, lpower);
  183. if (stat & MDIO_STAT1_LPOWERABLE) {
  184. efx_mdio_set_flag(efx, mmd, MDIO_CTRL1,
  185. MDIO_CTRL1_LPOWER, lpower);
  186. }
  187. }
  188. void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
  189. int low_power, unsigned int mmd_mask)
  190. {
  191. int mmd = 0;
  192. mmd_mask &= ~MDIO_DEVS_AN;
  193. while (mmd_mask) {
  194. if (mmd_mask & 1)
  195. efx_mdio_set_mmd_lpower(efx, low_power, mmd);
  196. mmd_mask = (mmd_mask >> 1);
  197. mmd++;
  198. }
  199. }
  200. /**
  201. * efx_mdio_set_settings - Set (some of) the PHY settings over MDIO.
  202. * @efx: Efx NIC
  203. * @ecmd: New settings
  204. */
  205. int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
  206. {
  207. struct ethtool_cmd prev = { .cmd = ETHTOOL_GSET };
  208. efx->phy_op->get_settings(efx, &prev);
  209. if (ecmd->advertising == prev.advertising &&
  210. ethtool_cmd_speed(ecmd) == ethtool_cmd_speed(&prev) &&
  211. ecmd->duplex == prev.duplex &&
  212. ecmd->port == prev.port &&
  213. ecmd->autoneg == prev.autoneg)
  214. return 0;
  215. /* We can only change these settings for -T PHYs */
  216. if (prev.port != PORT_TP || ecmd->port != PORT_TP)
  217. return -EINVAL;
  218. /* Check that PHY supports these settings */
  219. if (!ecmd->autoneg ||
  220. (ecmd->advertising | SUPPORTED_Autoneg) & ~prev.supported)
  221. return -EINVAL;
  222. efx_link_set_advertising(efx, ecmd->advertising | ADVERTISED_Autoneg);
  223. efx_mdio_an_reconfigure(efx);
  224. return 0;
  225. }
  226. /**
  227. * efx_mdio_an_reconfigure - Push advertising flags and restart autonegotiation
  228. * @efx: Efx NIC
  229. */
  230. void efx_mdio_an_reconfigure(struct efx_nic *efx)
  231. {
  232. int reg;
  233. WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
  234. /* Set up the base page */
  235. reg = ADVERTISE_CSMA | ADVERTISE_RESV;
  236. if (efx->link_advertising & ADVERTISED_Pause)
  237. reg |= ADVERTISE_PAUSE_CAP;
  238. if (efx->link_advertising & ADVERTISED_Asym_Pause)
  239. reg |= ADVERTISE_PAUSE_ASYM;
  240. efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
  241. /* Set up the (extended) next page */
  242. efx->phy_op->set_npage_adv(efx, efx->link_advertising);
  243. /* Enable and restart AN */
  244. reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
  245. reg |= MDIO_AN_CTRL1_ENABLE | MDIO_AN_CTRL1_RESTART | MDIO_AN_CTRL1_XNP;
  246. efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
  247. }
  248. u8 efx_mdio_get_pause(struct efx_nic *efx)
  249. {
  250. BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX));
  251. if (!(efx->wanted_fc & EFX_FC_AUTO))
  252. return efx->wanted_fc;
  253. WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
  254. return mii_resolve_flowctrl_fdx(
  255. mii_advertise_flowctrl(efx->wanted_fc),
  256. efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA));
  257. }
  258. int efx_mdio_test_alive(struct efx_nic *efx)
  259. {
  260. int rc;
  261. int devad = __ffs(efx->mdio.mmds);
  262. u16 physid1, physid2;
  263. mutex_lock(&efx->mac_lock);
  264. physid1 = efx_mdio_read(efx, devad, MDIO_DEVID1);
  265. physid2 = efx_mdio_read(efx, devad, MDIO_DEVID2);
  266. if ((physid1 == 0x0000) || (physid1 == 0xffff) ||
  267. (physid2 == 0x0000) || (physid2 == 0xffff)) {
  268. netif_err(efx, hw, efx->net_dev,
  269. "no MDIO PHY present with ID %d\n", efx->mdio.prtad);
  270. rc = -EINVAL;
  271. } else {
  272. rc = efx_mdio_check_mmds(efx, efx->mdio.mmds);
  273. }
  274. mutex_unlock(&efx->mac_lock);
  275. return rc;
  276. }