smsc-sio.h 2.8 KB

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  1. #ifndef SMSC_SIO_H
  2. #define SMSC_SIO_H
  3. /******************************************
  4. Keys. They should work with every SMsC SIO
  5. ******************************************/
  6. #define SMSCSIO_CFGACCESSKEY 0x55
  7. #define SMSCSIO_CFGEXITKEY 0xaa
  8. /*****************************
  9. * Generic SIO Flat (!?) *
  10. *****************************/
  11. /* Register 0x0d */
  12. #define SMSCSIOFLAT_DEVICEID_REG 0x0d
  13. /* Register 0x0c */
  14. #define SMSCSIOFLAT_UARTMODE0C_REG 0x0c
  15. #define SMSCSIOFLAT_UART2MODE_MASK 0x38
  16. #define SMSCSIOFLAT_UART2MODE_VAL_COM 0x00
  17. #define SMSCSIOFLAT_UART2MODE_VAL_IRDA 0x08
  18. #define SMSCSIOFLAT_UART2MODE_VAL_ASKIR 0x10
  19. /* Register 0x25 */
  20. #define SMSCSIOFLAT_UART2BASEADDR_REG 0x25
  21. /* Register 0x2b */
  22. #define SMSCSIOFLAT_FIRBASEADDR_REG 0x2b
  23. /* Register 0x2c */
  24. #define SMSCSIOFLAT_FIRDMASELECT_REG 0x2c
  25. #define SMSCSIOFLAT_FIRDMASELECT_MASK 0x0f
  26. /* Register 0x28 */
  27. #define SMSCSIOFLAT_UARTIRQSELECT_REG 0x28
  28. #define SMSCSIOFLAT_UART2IRQSELECT_MASK 0x0f
  29. #define SMSCSIOFLAT_UART1IRQSELECT_MASK 0xf0
  30. #define SMSCSIOFLAT_UARTIRQSELECT_VAL_NONE 0x00
  31. /*********************
  32. * LPC47N227 *
  33. *********************/
  34. #define LPC47N227_CFGACCESSKEY 0x55
  35. #define LPC47N227_CFGEXITKEY 0xaa
  36. /* Register 0x00 */
  37. #define LPC47N227_FDCPOWERVALIDCONF_REG 0x00
  38. #define LPC47N227_FDCPOWER_MASK 0x08
  39. #define LPC47N227_VALID_MASK 0x80
  40. /* Register 0x02 */
  41. #define LPC47N227_UART12POWER_REG 0x02
  42. #define LPC47N227_UART1POWERDOWN_MASK 0x08
  43. #define LPC47N227_UART2POWERDOWN_MASK 0x80
  44. /* Register 0x07 */
  45. #define LPC47N227_APMBOOTDRIVE_REG 0x07
  46. #define LPC47N227_PARPORT2AUTOPWRDOWN_MASK 0x10 /* auto power down on if set */
  47. #define LPC47N227_UART2AUTOPWRDOWN_MASK 0x20 /* auto power down on if set */
  48. #define LPC47N227_UART1AUTOPWRDOWN_MASK 0x40 /* auto power down on if set */
  49. /* Register 0x0c */
  50. #define LPC47N227_UARTMODE0C_REG 0x0c
  51. #define LPC47N227_UART2MODE_MASK 0x38
  52. #define LPC47N227_UART2MODE_VAL_COM 0x00
  53. #define LPC47N227_UART2MODE_VAL_IRDA 0x08
  54. #define LPC47N227_UART2MODE_VAL_ASKIR 0x10
  55. /* Register 0x0d */
  56. #define LPC47N227_DEVICEID_REG 0x0d
  57. #define LPC47N227_DEVICEID_DEFVAL 0x5a
  58. /* Register 0x0e */
  59. #define LPC47N227_REVISIONID_REG 0x0e
  60. /* Register 0x25 */
  61. #define LPC47N227_UART2BASEADDR_REG 0x25
  62. /* Register 0x28 */
  63. #define LPC47N227_UARTIRQSELECT_REG 0x28
  64. #define LPC47N227_UART2IRQSELECT_MASK 0x0f
  65. #define LPC47N227_UART1IRQSELECT_MASK 0xf0
  66. #define LPC47N227_UARTIRQSELECT_VAL_NONE 0x00
  67. /* Register 0x2b */
  68. #define LPC47N227_FIRBASEADDR_REG 0x2b
  69. /* Register 0x2c */
  70. #define LPC47N227_FIRDMASELECT_REG 0x2c
  71. #define LPC47N227_FIRDMASELECT_MASK 0x0f
  72. #define LPC47N227_FIRDMASELECT_VAL_DMA1 0x01 /* 47n227 has three dma channels */
  73. #define LPC47N227_FIRDMASELECT_VAL_DMA2 0x02
  74. #define LPC47N227_FIRDMASELECT_VAL_DMA3 0x03
  75. #define LPC47N227_FIRDMASELECT_VAL_NONE 0x0f
  76. #endif