vlsi_ir.c 50 KB

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  1. /*********************************************************************
  2. *
  3. * vlsi_ir.c: VLSI82C147 PCI IrDA controller driver for Linux
  4. *
  5. * Copyright (c) 2001-2003 Martin Diehl
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 of
  10. * the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, see <http://www.gnu.org/licenses/>.
  19. *
  20. ********************************************************************/
  21. #include <linux/module.h>
  22. #define DRIVER_NAME "vlsi_ir"
  23. #define DRIVER_VERSION "v0.5"
  24. #define DRIVER_DESCRIPTION "IrDA SIR/MIR/FIR driver for VLSI 82C147"
  25. #define DRIVER_AUTHOR "Martin Diehl <info@mdiehl.de>"
  26. MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
  27. MODULE_AUTHOR(DRIVER_AUTHOR);
  28. MODULE_LICENSE("GPL");
  29. /********************************************************/
  30. #include <linux/kernel.h>
  31. #include <linux/ktime.h>
  32. #include <linux/init.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/pci.h>
  35. #include <linux/slab.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/delay.h>
  39. #include <linux/proc_fs.h>
  40. #include <linux/seq_file.h>
  41. #include <linux/math64.h>
  42. #include <linux/mutex.h>
  43. #include <asm/uaccess.h>
  44. #include <asm/byteorder.h>
  45. #include <net/irda/irda.h>
  46. #include <net/irda/irda_device.h>
  47. #include <net/irda/wrapper.h>
  48. #include <net/irda/crc.h>
  49. #include "vlsi_ir.h"
  50. /********************************************************/
  51. static /* const */ char drivername[] = DRIVER_NAME;
  52. static const struct pci_device_id vlsi_irda_table[] = {
  53. {
  54. .class = PCI_CLASS_WIRELESS_IRDA << 8,
  55. .class_mask = PCI_CLASS_SUBCLASS_MASK << 8,
  56. .vendor = PCI_VENDOR_ID_VLSI,
  57. .device = PCI_DEVICE_ID_VLSI_82C147,
  58. .subvendor = PCI_ANY_ID,
  59. .subdevice = PCI_ANY_ID,
  60. },
  61. { /* all zeroes */ }
  62. };
  63. MODULE_DEVICE_TABLE(pci, vlsi_irda_table);
  64. /********************************************************/
  65. /* clksrc: which clock source to be used
  66. * 0: auto - try PLL, fallback to 40MHz XCLK
  67. * 1: on-chip 48MHz PLL
  68. * 2: external 48MHz XCLK
  69. * 3: external 40MHz XCLK (HP OB-800)
  70. */
  71. static int clksrc = 0; /* default is 0(auto) */
  72. module_param(clksrc, int, 0);
  73. MODULE_PARM_DESC(clksrc, "clock input source selection");
  74. /* ringsize: size of the tx and rx descriptor rings
  75. * independent for tx and rx
  76. * specify as ringsize=tx[,rx]
  77. * allowed values: 4, 8, 16, 32, 64
  78. * Due to the IrDA 1.x max. allowed window size=7,
  79. * there should be no gain when using rings larger than 8
  80. */
  81. static int ringsize[] = {8,8}; /* default is tx=8 / rx=8 */
  82. module_param_array(ringsize, int, NULL, 0);
  83. MODULE_PARM_DESC(ringsize, "TX, RX ring descriptor size");
  84. /* sirpulse: tuning of the SIR pulse width within IrPHY 1.3 limits
  85. * 0: very short, 1.5us (exception: 6us at 2.4 kbaud)
  86. * 1: nominal 3/16 bittime width
  87. * note: IrDA compliant peer devices should be happy regardless
  88. * which one is used. Primary goal is to save some power
  89. * on the sender's side - at 9.6kbaud for example the short
  90. * pulse width saves more than 90% of the transmitted IR power.
  91. */
  92. static int sirpulse = 1; /* default is 3/16 bittime */
  93. module_param(sirpulse, int, 0);
  94. MODULE_PARM_DESC(sirpulse, "SIR pulse width tuning");
  95. /* qos_mtt_bits: encoded min-turn-time value we require the peer device
  96. * to use before transmitting to us. "Type 1" (per-station)
  97. * bitfield according to IrLAP definition (section 6.6.8)
  98. * Don't know which transceiver is used by my OB800 - the
  99. * pretty common HP HDLS-1100 requires 1 msec - so lets use this.
  100. */
  101. static int qos_mtt_bits = 0x07; /* default is 1 ms or more */
  102. module_param(qos_mtt_bits, int, 0);
  103. MODULE_PARM_DESC(qos_mtt_bits, "IrLAP bitfield representing min-turn-time");
  104. /********************************************************/
  105. static void vlsi_reg_debug(unsigned iobase, const char *s)
  106. {
  107. int i;
  108. printk(KERN_DEBUG "%s: ", s);
  109. for (i = 0; i < 0x20; i++)
  110. printk("%02x", (unsigned)inb((iobase+i)));
  111. printk("\n");
  112. }
  113. static void vlsi_ring_debug(struct vlsi_ring *r)
  114. {
  115. struct ring_descr *rd;
  116. unsigned i;
  117. printk(KERN_DEBUG "%s - ring %p / size %u / mask 0x%04x / len %u / dir %d / hw %p\n",
  118. __func__, r, r->size, r->mask, r->len, r->dir, r->rd[0].hw);
  119. printk(KERN_DEBUG "%s - head = %d / tail = %d\n", __func__,
  120. atomic_read(&r->head) & r->mask, atomic_read(&r->tail) & r->mask);
  121. for (i = 0; i < r->size; i++) {
  122. rd = &r->rd[i];
  123. printk(KERN_DEBUG "%s - ring descr %u: ", __func__, i);
  124. printk("skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw);
  125. printk(KERN_DEBUG "%s - hw: status=%02x count=%u addr=0x%08x\n",
  126. __func__, (unsigned) rd_get_status(rd),
  127. (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd));
  128. }
  129. }
  130. /********************************************************/
  131. /* needed regardless of CONFIG_PROC_FS */
  132. static struct proc_dir_entry *vlsi_proc_root = NULL;
  133. #ifdef CONFIG_PROC_FS
  134. static void vlsi_proc_pdev(struct seq_file *seq, struct pci_dev *pdev)
  135. {
  136. unsigned iobase = pci_resource_start(pdev, 0);
  137. unsigned i;
  138. seq_printf(seq, "\n%s (vid/did: [%04x:%04x])\n",
  139. pci_name(pdev), (int)pdev->vendor, (int)pdev->device);
  140. seq_printf(seq, "pci-power-state: %u\n", (unsigned) pdev->current_state);
  141. seq_printf(seq, "resources: irq=%u / io=0x%04x / dma_mask=0x%016Lx\n",
  142. pdev->irq, (unsigned)pci_resource_start(pdev, 0), (unsigned long long)pdev->dma_mask);
  143. seq_printf(seq, "hw registers: ");
  144. for (i = 0; i < 0x20; i++)
  145. seq_printf(seq, "%02x", (unsigned)inb((iobase+i)));
  146. seq_printf(seq, "\n");
  147. }
  148. static void vlsi_proc_ndev(struct seq_file *seq, struct net_device *ndev)
  149. {
  150. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  151. u8 byte;
  152. u16 word;
  153. s32 sec, usec;
  154. unsigned iobase = ndev->base_addr;
  155. seq_printf(seq, "\n%s link state: %s / %s / %s / %s\n", ndev->name,
  156. netif_device_present(ndev) ? "attached" : "detached",
  157. netif_running(ndev) ? "running" : "not running",
  158. netif_carrier_ok(ndev) ? "carrier ok" : "no carrier",
  159. netif_queue_stopped(ndev) ? "queue stopped" : "queue running");
  160. if (!netif_running(ndev))
  161. return;
  162. seq_printf(seq, "\nhw-state:\n");
  163. pci_read_config_byte(idev->pdev, VLSI_PCI_IRMISC, &byte);
  164. seq_printf(seq, "IRMISC:%s%s%s uart%s",
  165. (byte&IRMISC_IRRAIL) ? " irrail" : "",
  166. (byte&IRMISC_IRPD) ? " irpd" : "",
  167. (byte&IRMISC_UARTTST) ? " uarttest" : "",
  168. (byte&IRMISC_UARTEN) ? "@" : " disabled\n");
  169. if (byte&IRMISC_UARTEN) {
  170. seq_printf(seq, "0x%s\n",
  171. (byte&2) ? ((byte&1) ? "3e8" : "2e8")
  172. : ((byte&1) ? "3f8" : "2f8"));
  173. }
  174. pci_read_config_byte(idev->pdev, VLSI_PCI_CLKCTL, &byte);
  175. seq_printf(seq, "CLKCTL: PLL %s%s%s / clock %s / wakeup %s\n",
  176. (byte&CLKCTL_PD_INV) ? "powered" : "down",
  177. (byte&CLKCTL_LOCK) ? " locked" : "",
  178. (byte&CLKCTL_EXTCLK) ? ((byte&CLKCTL_XCKSEL)?" / 40 MHz XCLK":" / 48 MHz XCLK") : "",
  179. (byte&CLKCTL_CLKSTP) ? "stopped" : "running",
  180. (byte&CLKCTL_WAKE) ? "enabled" : "disabled");
  181. pci_read_config_byte(idev->pdev, VLSI_PCI_MSTRPAGE, &byte);
  182. seq_printf(seq, "MSTRPAGE: 0x%02x\n", (unsigned)byte);
  183. byte = inb(iobase+VLSI_PIO_IRINTR);
  184. seq_printf(seq, "IRINTR:%s%s%s%s%s%s%s%s\n",
  185. (byte&IRINTR_ACTEN) ? " ACTEN" : "",
  186. (byte&IRINTR_RPKTEN) ? " RPKTEN" : "",
  187. (byte&IRINTR_TPKTEN) ? " TPKTEN" : "",
  188. (byte&IRINTR_OE_EN) ? " OE_EN" : "",
  189. (byte&IRINTR_ACTIVITY) ? " ACTIVITY" : "",
  190. (byte&IRINTR_RPKTINT) ? " RPKTINT" : "",
  191. (byte&IRINTR_TPKTINT) ? " TPKTINT" : "",
  192. (byte&IRINTR_OE_INT) ? " OE_INT" : "");
  193. word = inw(iobase+VLSI_PIO_RINGPTR);
  194. seq_printf(seq, "RINGPTR: rx=%u / tx=%u\n", RINGPTR_GET_RX(word), RINGPTR_GET_TX(word));
  195. word = inw(iobase+VLSI_PIO_RINGBASE);
  196. seq_printf(seq, "RINGBASE: busmap=0x%08x\n",
  197. ((unsigned)word << 10)|(MSTRPAGE_VALUE<<24));
  198. word = inw(iobase+VLSI_PIO_RINGSIZE);
  199. seq_printf(seq, "RINGSIZE: rx=%u / tx=%u\n", RINGSIZE_TO_RXSIZE(word),
  200. RINGSIZE_TO_TXSIZE(word));
  201. word = inw(iobase+VLSI_PIO_IRCFG);
  202. seq_printf(seq, "IRCFG:%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
  203. (word&IRCFG_LOOP) ? " LOOP" : "",
  204. (word&IRCFG_ENTX) ? " ENTX" : "",
  205. (word&IRCFG_ENRX) ? " ENRX" : "",
  206. (word&IRCFG_MSTR) ? " MSTR" : "",
  207. (word&IRCFG_RXANY) ? " RXANY" : "",
  208. (word&IRCFG_CRC16) ? " CRC16" : "",
  209. (word&IRCFG_FIR) ? " FIR" : "",
  210. (word&IRCFG_MIR) ? " MIR" : "",
  211. (word&IRCFG_SIR) ? " SIR" : "",
  212. (word&IRCFG_SIRFILT) ? " SIRFILT" : "",
  213. (word&IRCFG_SIRTEST) ? " SIRTEST" : "",
  214. (word&IRCFG_TXPOL) ? " TXPOL" : "",
  215. (word&IRCFG_RXPOL) ? " RXPOL" : "");
  216. word = inw(iobase+VLSI_PIO_IRENABLE);
  217. seq_printf(seq, "IRENABLE:%s%s%s%s%s%s%s%s\n",
  218. (word&IRENABLE_PHYANDCLOCK) ? " PHYANDCLOCK" : "",
  219. (word&IRENABLE_CFGER) ? " CFGERR" : "",
  220. (word&IRENABLE_FIR_ON) ? " FIR_ON" : "",
  221. (word&IRENABLE_MIR_ON) ? " MIR_ON" : "",
  222. (word&IRENABLE_SIR_ON) ? " SIR_ON" : "",
  223. (word&IRENABLE_ENTXST) ? " ENTXST" : "",
  224. (word&IRENABLE_ENRXST) ? " ENRXST" : "",
  225. (word&IRENABLE_CRC16_ON) ? " CRC16_ON" : "");
  226. word = inw(iobase+VLSI_PIO_PHYCTL);
  227. seq_printf(seq, "PHYCTL: baud-divisor=%u / pulsewidth=%u / preamble=%u\n",
  228. (unsigned)PHYCTL_TO_BAUD(word),
  229. (unsigned)PHYCTL_TO_PLSWID(word),
  230. (unsigned)PHYCTL_TO_PREAMB(word));
  231. word = inw(iobase+VLSI_PIO_NPHYCTL);
  232. seq_printf(seq, "NPHYCTL: baud-divisor=%u / pulsewidth=%u / preamble=%u\n",
  233. (unsigned)PHYCTL_TO_BAUD(word),
  234. (unsigned)PHYCTL_TO_PLSWID(word),
  235. (unsigned)PHYCTL_TO_PREAMB(word));
  236. word = inw(iobase+VLSI_PIO_MAXPKT);
  237. seq_printf(seq, "MAXPKT: max. rx packet size = %u\n", word);
  238. word = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
  239. seq_printf(seq, "RCVBCNT: rx-fifo filling level = %u\n", word);
  240. seq_printf(seq, "\nsw-state:\n");
  241. seq_printf(seq, "IrPHY setup: %d baud - %s encoding\n", idev->baud,
  242. (idev->mode==IFF_SIR)?"SIR":((idev->mode==IFF_MIR)?"MIR":"FIR"));
  243. sec = div_s64_rem(ktime_us_delta(ktime_get(), idev->last_rx),
  244. USEC_PER_SEC, &usec);
  245. seq_printf(seq, "last rx: %ul.%06u sec\n", sec, usec);
  246. seq_printf(seq, "RX: packets=%lu / bytes=%lu / errors=%lu / dropped=%lu",
  247. ndev->stats.rx_packets, ndev->stats.rx_bytes, ndev->stats.rx_errors,
  248. ndev->stats.rx_dropped);
  249. seq_printf(seq, " / overrun=%lu / length=%lu / frame=%lu / crc=%lu\n",
  250. ndev->stats.rx_over_errors, ndev->stats.rx_length_errors,
  251. ndev->stats.rx_frame_errors, ndev->stats.rx_crc_errors);
  252. seq_printf(seq, "TX: packets=%lu / bytes=%lu / errors=%lu / dropped=%lu / fifo=%lu\n",
  253. ndev->stats.tx_packets, ndev->stats.tx_bytes, ndev->stats.tx_errors,
  254. ndev->stats.tx_dropped, ndev->stats.tx_fifo_errors);
  255. }
  256. static void vlsi_proc_ring(struct seq_file *seq, struct vlsi_ring *r)
  257. {
  258. struct ring_descr *rd;
  259. unsigned i, j;
  260. int h, t;
  261. seq_printf(seq, "size %u / mask 0x%04x / len %u / dir %d / hw %p\n",
  262. r->size, r->mask, r->len, r->dir, r->rd[0].hw);
  263. h = atomic_read(&r->head) & r->mask;
  264. t = atomic_read(&r->tail) & r->mask;
  265. seq_printf(seq, "head = %d / tail = %d ", h, t);
  266. if (h == t)
  267. seq_printf(seq, "(empty)\n");
  268. else {
  269. if (((t+1)&r->mask) == h)
  270. seq_printf(seq, "(full)\n");
  271. else
  272. seq_printf(seq, "(level = %d)\n", ((unsigned)(t-h) & r->mask));
  273. rd = &r->rd[h];
  274. j = (unsigned) rd_get_count(rd);
  275. seq_printf(seq, "current: rd = %d / status = %02x / len = %u\n",
  276. h, (unsigned)rd_get_status(rd), j);
  277. if (j > 0) {
  278. seq_printf(seq, " data: %*ph\n",
  279. min_t(unsigned, j, 20), rd->buf);
  280. }
  281. }
  282. for (i = 0; i < r->size; i++) {
  283. rd = &r->rd[i];
  284. seq_printf(seq, "> ring descr %u: ", i);
  285. seq_printf(seq, "skb=%p data=%p hw=%p\n", rd->skb, rd->buf, rd->hw);
  286. seq_printf(seq, " hw: status=%02x count=%u busaddr=0x%08x\n",
  287. (unsigned) rd_get_status(rd),
  288. (unsigned) rd_get_count(rd), (unsigned) rd_get_addr(rd));
  289. }
  290. }
  291. static int vlsi_seq_show(struct seq_file *seq, void *v)
  292. {
  293. struct net_device *ndev = seq->private;
  294. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  295. unsigned long flags;
  296. seq_printf(seq, "\n%s %s\n\n", DRIVER_NAME, DRIVER_VERSION);
  297. seq_printf(seq, "clksrc: %s\n",
  298. (clksrc>=2) ? ((clksrc==3)?"40MHz XCLK":"48MHz XCLK")
  299. : ((clksrc==1)?"48MHz PLL":"autodetect"));
  300. seq_printf(seq, "ringsize: tx=%d / rx=%d\n",
  301. ringsize[0], ringsize[1]);
  302. seq_printf(seq, "sirpulse: %s\n", (sirpulse)?"3/16 bittime":"short");
  303. seq_printf(seq, "qos_mtt_bits: 0x%02x\n", (unsigned)qos_mtt_bits);
  304. spin_lock_irqsave(&idev->lock, flags);
  305. if (idev->pdev != NULL) {
  306. vlsi_proc_pdev(seq, idev->pdev);
  307. if (idev->pdev->current_state == 0)
  308. vlsi_proc_ndev(seq, ndev);
  309. else
  310. seq_printf(seq, "\nPCI controller down - resume_ok = %d\n",
  311. idev->resume_ok);
  312. if (netif_running(ndev) && idev->rx_ring && idev->tx_ring) {
  313. seq_printf(seq, "\n--------- RX ring -----------\n\n");
  314. vlsi_proc_ring(seq, idev->rx_ring);
  315. seq_printf(seq, "\n--------- TX ring -----------\n\n");
  316. vlsi_proc_ring(seq, idev->tx_ring);
  317. }
  318. }
  319. seq_printf(seq, "\n");
  320. spin_unlock_irqrestore(&idev->lock, flags);
  321. return 0;
  322. }
  323. static int vlsi_seq_open(struct inode *inode, struct file *file)
  324. {
  325. return single_open(file, vlsi_seq_show, PDE_DATA(inode));
  326. }
  327. static const struct file_operations vlsi_proc_fops = {
  328. .owner = THIS_MODULE,
  329. .open = vlsi_seq_open,
  330. .read = seq_read,
  331. .llseek = seq_lseek,
  332. .release = single_release,
  333. };
  334. #define VLSI_PROC_FOPS (&vlsi_proc_fops)
  335. #else /* CONFIG_PROC_FS */
  336. #define VLSI_PROC_FOPS NULL
  337. #endif
  338. /********************************************************/
  339. static struct vlsi_ring *vlsi_alloc_ring(struct pci_dev *pdev, struct ring_descr_hw *hwmap,
  340. unsigned size, unsigned len, int dir)
  341. {
  342. struct vlsi_ring *r;
  343. struct ring_descr *rd;
  344. unsigned i, j;
  345. dma_addr_t busaddr;
  346. if (!size || ((size-1)&size)!=0) /* must be >0 and power of 2 */
  347. return NULL;
  348. r = kmalloc(sizeof(*r) + size * sizeof(struct ring_descr), GFP_KERNEL);
  349. if (!r)
  350. return NULL;
  351. memset(r, 0, sizeof(*r));
  352. r->pdev = pdev;
  353. r->dir = dir;
  354. r->len = len;
  355. r->rd = (struct ring_descr *)(r+1);
  356. r->mask = size - 1;
  357. r->size = size;
  358. atomic_set(&r->head, 0);
  359. atomic_set(&r->tail, 0);
  360. for (i = 0; i < size; i++) {
  361. rd = r->rd + i;
  362. memset(rd, 0, sizeof(*rd));
  363. rd->hw = hwmap + i;
  364. rd->buf = kmalloc(len, GFP_KERNEL|GFP_DMA);
  365. if (rd->buf)
  366. busaddr = pci_map_single(pdev, rd->buf, len, dir);
  367. if (rd->buf == NULL || pci_dma_mapping_error(pdev, busaddr)) {
  368. if (rd->buf) {
  369. net_err_ratelimited("%s: failed to create PCI-MAP for %p\n",
  370. __func__, rd->buf);
  371. kfree(rd->buf);
  372. rd->buf = NULL;
  373. }
  374. for (j = 0; j < i; j++) {
  375. rd = r->rd + j;
  376. busaddr = rd_get_addr(rd);
  377. rd_set_addr_status(rd, 0, 0);
  378. pci_unmap_single(pdev, busaddr, len, dir);
  379. kfree(rd->buf);
  380. rd->buf = NULL;
  381. }
  382. kfree(r);
  383. return NULL;
  384. }
  385. rd_set_addr_status(rd, busaddr, 0);
  386. /* initially, the dma buffer is owned by the CPU */
  387. rd->skb = NULL;
  388. }
  389. return r;
  390. }
  391. static int vlsi_free_ring(struct vlsi_ring *r)
  392. {
  393. struct ring_descr *rd;
  394. unsigned i;
  395. dma_addr_t busaddr;
  396. for (i = 0; i < r->size; i++) {
  397. rd = r->rd + i;
  398. if (rd->skb)
  399. dev_kfree_skb_any(rd->skb);
  400. busaddr = rd_get_addr(rd);
  401. rd_set_addr_status(rd, 0, 0);
  402. if (busaddr)
  403. pci_unmap_single(r->pdev, busaddr, r->len, r->dir);
  404. kfree(rd->buf);
  405. }
  406. kfree(r);
  407. return 0;
  408. }
  409. static int vlsi_create_hwif(vlsi_irda_dev_t *idev)
  410. {
  411. char *ringarea;
  412. struct ring_descr_hw *hwmap;
  413. idev->virtaddr = NULL;
  414. idev->busaddr = 0;
  415. ringarea = pci_zalloc_consistent(idev->pdev, HW_RING_AREA_SIZE,
  416. &idev->busaddr);
  417. if (!ringarea)
  418. goto out;
  419. hwmap = (struct ring_descr_hw *)ringarea;
  420. idev->rx_ring = vlsi_alloc_ring(idev->pdev, hwmap, ringsize[1],
  421. XFER_BUF_SIZE, PCI_DMA_FROMDEVICE);
  422. if (idev->rx_ring == NULL)
  423. goto out_unmap;
  424. hwmap += MAX_RING_DESCR;
  425. idev->tx_ring = vlsi_alloc_ring(idev->pdev, hwmap, ringsize[0],
  426. XFER_BUF_SIZE, PCI_DMA_TODEVICE);
  427. if (idev->tx_ring == NULL)
  428. goto out_free_rx;
  429. idev->virtaddr = ringarea;
  430. return 0;
  431. out_free_rx:
  432. vlsi_free_ring(idev->rx_ring);
  433. out_unmap:
  434. idev->rx_ring = idev->tx_ring = NULL;
  435. pci_free_consistent(idev->pdev, HW_RING_AREA_SIZE, ringarea, idev->busaddr);
  436. idev->busaddr = 0;
  437. out:
  438. return -ENOMEM;
  439. }
  440. static int vlsi_destroy_hwif(vlsi_irda_dev_t *idev)
  441. {
  442. vlsi_free_ring(idev->rx_ring);
  443. vlsi_free_ring(idev->tx_ring);
  444. idev->rx_ring = idev->tx_ring = NULL;
  445. if (idev->busaddr)
  446. pci_free_consistent(idev->pdev,HW_RING_AREA_SIZE,idev->virtaddr,idev->busaddr);
  447. idev->virtaddr = NULL;
  448. idev->busaddr = 0;
  449. return 0;
  450. }
  451. /********************************************************/
  452. static int vlsi_process_rx(struct vlsi_ring *r, struct ring_descr *rd)
  453. {
  454. u16 status;
  455. int crclen, len = 0;
  456. struct sk_buff *skb;
  457. int ret = 0;
  458. struct net_device *ndev = pci_get_drvdata(r->pdev);
  459. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  460. pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
  461. /* dma buffer now owned by the CPU */
  462. status = rd_get_status(rd);
  463. if (status & RD_RX_ERROR) {
  464. if (status & RD_RX_OVER)
  465. ret |= VLSI_RX_OVER;
  466. if (status & RD_RX_LENGTH)
  467. ret |= VLSI_RX_LENGTH;
  468. if (status & RD_RX_PHYERR)
  469. ret |= VLSI_RX_FRAME;
  470. if (status & RD_RX_CRCERR)
  471. ret |= VLSI_RX_CRC;
  472. goto done;
  473. }
  474. len = rd_get_count(rd);
  475. crclen = (idev->mode==IFF_FIR) ? sizeof(u32) : sizeof(u16);
  476. len -= crclen; /* remove trailing CRC */
  477. if (len <= 0) {
  478. pr_debug("%s: strange frame (len=%d)\n", __func__, len);
  479. ret |= VLSI_RX_DROP;
  480. goto done;
  481. }
  482. if (idev->mode == IFF_SIR) { /* hw checks CRC in MIR, FIR mode */
  483. /* rd->buf is a streaming PCI_DMA_FROMDEVICE map. Doing the
  484. * endian-adjustment there just in place will dirty a cache line
  485. * which belongs to the map and thus we must be sure it will
  486. * get flushed before giving the buffer back to hardware.
  487. * vlsi_fill_rx() will do this anyway - but here we rely on.
  488. */
  489. le16_to_cpus(rd->buf+len);
  490. if (irda_calc_crc16(INIT_FCS,rd->buf,len+crclen) != GOOD_FCS) {
  491. pr_debug("%s: crc error\n", __func__);
  492. ret |= VLSI_RX_CRC;
  493. goto done;
  494. }
  495. }
  496. if (!rd->skb) {
  497. net_warn_ratelimited("%s: rx packet lost\n", __func__);
  498. ret |= VLSI_RX_DROP;
  499. goto done;
  500. }
  501. skb = rd->skb;
  502. rd->skb = NULL;
  503. skb->dev = ndev;
  504. memcpy(skb_put(skb,len), rd->buf, len);
  505. skb_reset_mac_header(skb);
  506. if (in_interrupt())
  507. netif_rx(skb);
  508. else
  509. netif_rx_ni(skb);
  510. done:
  511. rd_set_status(rd, 0);
  512. rd_set_count(rd, 0);
  513. /* buffer still owned by CPU */
  514. return (ret) ? -ret : len;
  515. }
  516. static void vlsi_fill_rx(struct vlsi_ring *r)
  517. {
  518. struct ring_descr *rd;
  519. for (rd = ring_last(r); rd != NULL; rd = ring_put(r)) {
  520. if (rd_is_active(rd)) {
  521. net_warn_ratelimited("%s: driver bug: rx descr race with hw\n",
  522. __func__);
  523. vlsi_ring_debug(r);
  524. break;
  525. }
  526. if (!rd->skb) {
  527. rd->skb = dev_alloc_skb(IRLAP_SKB_ALLOCSIZE);
  528. if (rd->skb) {
  529. skb_reserve(rd->skb,1);
  530. rd->skb->protocol = htons(ETH_P_IRDA);
  531. }
  532. else
  533. break; /* probably not worth logging? */
  534. }
  535. /* give dma buffer back to busmaster */
  536. pci_dma_sync_single_for_device(r->pdev, rd_get_addr(rd), r->len, r->dir);
  537. rd_activate(rd);
  538. }
  539. }
  540. static void vlsi_rx_interrupt(struct net_device *ndev)
  541. {
  542. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  543. struct vlsi_ring *r = idev->rx_ring;
  544. struct ring_descr *rd;
  545. int ret;
  546. for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
  547. if (rd_is_active(rd))
  548. break;
  549. ret = vlsi_process_rx(r, rd);
  550. if (ret < 0) {
  551. ret = -ret;
  552. ndev->stats.rx_errors++;
  553. if (ret & VLSI_RX_DROP)
  554. ndev->stats.rx_dropped++;
  555. if (ret & VLSI_RX_OVER)
  556. ndev->stats.rx_over_errors++;
  557. if (ret & VLSI_RX_LENGTH)
  558. ndev->stats.rx_length_errors++;
  559. if (ret & VLSI_RX_FRAME)
  560. ndev->stats.rx_frame_errors++;
  561. if (ret & VLSI_RX_CRC)
  562. ndev->stats.rx_crc_errors++;
  563. }
  564. else if (ret > 0) {
  565. ndev->stats.rx_packets++;
  566. ndev->stats.rx_bytes += ret;
  567. }
  568. }
  569. idev->last_rx = ktime_get(); /* remember "now" for later mtt delay */
  570. vlsi_fill_rx(r);
  571. if (ring_first(r) == NULL) {
  572. /* we are in big trouble, if this should ever happen */
  573. net_err_ratelimited("%s: rx ring exhausted!\n", __func__);
  574. vlsi_ring_debug(r);
  575. }
  576. else
  577. outw(0, ndev->base_addr+VLSI_PIO_PROMPT);
  578. }
  579. /* caller must have stopped the controller from busmastering */
  580. static void vlsi_unarm_rx(vlsi_irda_dev_t *idev)
  581. {
  582. struct net_device *ndev = pci_get_drvdata(idev->pdev);
  583. struct vlsi_ring *r = idev->rx_ring;
  584. struct ring_descr *rd;
  585. int ret;
  586. for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
  587. ret = 0;
  588. if (rd_is_active(rd)) {
  589. rd_set_status(rd, 0);
  590. if (rd_get_count(rd)) {
  591. pr_debug("%s - dropping rx packet\n", __func__);
  592. ret = -VLSI_RX_DROP;
  593. }
  594. rd_set_count(rd, 0);
  595. pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
  596. if (rd->skb) {
  597. dev_kfree_skb_any(rd->skb);
  598. rd->skb = NULL;
  599. }
  600. }
  601. else
  602. ret = vlsi_process_rx(r, rd);
  603. if (ret < 0) {
  604. ret = -ret;
  605. ndev->stats.rx_errors++;
  606. if (ret & VLSI_RX_DROP)
  607. ndev->stats.rx_dropped++;
  608. if (ret & VLSI_RX_OVER)
  609. ndev->stats.rx_over_errors++;
  610. if (ret & VLSI_RX_LENGTH)
  611. ndev->stats.rx_length_errors++;
  612. if (ret & VLSI_RX_FRAME)
  613. ndev->stats.rx_frame_errors++;
  614. if (ret & VLSI_RX_CRC)
  615. ndev->stats.rx_crc_errors++;
  616. }
  617. else if (ret > 0) {
  618. ndev->stats.rx_packets++;
  619. ndev->stats.rx_bytes += ret;
  620. }
  621. }
  622. }
  623. /********************************************************/
  624. static int vlsi_process_tx(struct vlsi_ring *r, struct ring_descr *rd)
  625. {
  626. u16 status;
  627. int len;
  628. int ret;
  629. pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
  630. /* dma buffer now owned by the CPU */
  631. status = rd_get_status(rd);
  632. if (status & RD_TX_UNDRN)
  633. ret = VLSI_TX_FIFO;
  634. else
  635. ret = 0;
  636. rd_set_status(rd, 0);
  637. if (rd->skb) {
  638. len = rd->skb->len;
  639. dev_kfree_skb_any(rd->skb);
  640. rd->skb = NULL;
  641. }
  642. else /* tx-skb already freed? - should never happen */
  643. len = rd_get_count(rd); /* incorrect for SIR! (due to wrapping) */
  644. rd_set_count(rd, 0);
  645. /* dma buffer still owned by the CPU */
  646. return (ret) ? -ret : len;
  647. }
  648. static int vlsi_set_baud(vlsi_irda_dev_t *idev, unsigned iobase)
  649. {
  650. u16 nphyctl;
  651. u16 config;
  652. unsigned mode;
  653. int ret;
  654. int baudrate;
  655. int fifocnt;
  656. baudrate = idev->new_baud;
  657. pr_debug("%s: %d -> %d\n", __func__, idev->baud, idev->new_baud);
  658. if (baudrate == 4000000) {
  659. mode = IFF_FIR;
  660. config = IRCFG_FIR;
  661. nphyctl = PHYCTL_FIR;
  662. }
  663. else if (baudrate == 1152000) {
  664. mode = IFF_MIR;
  665. config = IRCFG_MIR | IRCFG_CRC16;
  666. nphyctl = PHYCTL_MIR(clksrc==3);
  667. }
  668. else {
  669. mode = IFF_SIR;
  670. config = IRCFG_SIR | IRCFG_SIRFILT | IRCFG_RXANY;
  671. switch(baudrate) {
  672. default:
  673. net_warn_ratelimited("%s: undefined baudrate %d - fallback to 9600!\n",
  674. __func__, baudrate);
  675. baudrate = 9600;
  676. /* fallthru */
  677. case 2400:
  678. case 9600:
  679. case 19200:
  680. case 38400:
  681. case 57600:
  682. case 115200:
  683. nphyctl = PHYCTL_SIR(baudrate,sirpulse,clksrc==3);
  684. break;
  685. }
  686. }
  687. config |= IRCFG_MSTR | IRCFG_ENRX;
  688. fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
  689. if (fifocnt != 0) {
  690. pr_debug("%s: rx fifo not empty(%d)\n", __func__, fifocnt);
  691. }
  692. outw(0, iobase+VLSI_PIO_IRENABLE);
  693. outw(config, iobase+VLSI_PIO_IRCFG);
  694. outw(nphyctl, iobase+VLSI_PIO_NPHYCTL);
  695. wmb();
  696. outw(IRENABLE_PHYANDCLOCK, iobase+VLSI_PIO_IRENABLE);
  697. mb();
  698. udelay(1); /* chip applies IRCFG on next rising edge of its 8MHz clock */
  699. /* read back settings for validation */
  700. config = inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_MASK;
  701. if (mode == IFF_FIR)
  702. config ^= IRENABLE_FIR_ON;
  703. else if (mode == IFF_MIR)
  704. config ^= (IRENABLE_MIR_ON|IRENABLE_CRC16_ON);
  705. else
  706. config ^= IRENABLE_SIR_ON;
  707. if (config != (IRENABLE_PHYANDCLOCK|IRENABLE_ENRXST)) {
  708. net_warn_ratelimited("%s: failed to set %s mode!\n",
  709. __func__,
  710. mode == IFF_SIR ? "SIR" :
  711. mode == IFF_MIR ? "MIR" : "FIR");
  712. ret = -1;
  713. }
  714. else {
  715. if (inw(iobase+VLSI_PIO_PHYCTL) != nphyctl) {
  716. net_warn_ratelimited("%s: failed to apply baudrate %d\n",
  717. __func__, baudrate);
  718. ret = -1;
  719. }
  720. else {
  721. idev->mode = mode;
  722. idev->baud = baudrate;
  723. idev->new_baud = 0;
  724. ret = 0;
  725. }
  726. }
  727. if (ret)
  728. vlsi_reg_debug(iobase,__func__);
  729. return ret;
  730. }
  731. static netdev_tx_t vlsi_hard_start_xmit(struct sk_buff *skb,
  732. struct net_device *ndev)
  733. {
  734. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  735. struct vlsi_ring *r = idev->tx_ring;
  736. struct ring_descr *rd;
  737. unsigned long flags;
  738. unsigned iobase = ndev->base_addr;
  739. u8 status;
  740. u16 config;
  741. int mtt, diff;
  742. int len, speed;
  743. char *msg = NULL;
  744. speed = irda_get_next_speed(skb);
  745. spin_lock_irqsave(&idev->lock, flags);
  746. if (speed != -1 && speed != idev->baud) {
  747. netif_stop_queue(ndev);
  748. idev->new_baud = speed;
  749. status = RD_TX_CLRENTX; /* stop tx-ring after this frame */
  750. }
  751. else
  752. status = 0;
  753. if (skb->len == 0) {
  754. /* handle zero packets - should be speed change */
  755. if (status == 0) {
  756. msg = "bogus zero-length packet";
  757. goto drop_unlock;
  758. }
  759. /* due to the completely asynch tx operation we might have
  760. * IrLAP racing with the hardware here, f.e. if the controller
  761. * is just sending the last packet with current speed while
  762. * the LAP is already switching the speed using synchronous
  763. * len=0 packet. Immediate execution would lead to hw lockup
  764. * requiring a powercycle to reset. Good candidate to trigger
  765. * this is the final UA:RSP packet after receiving a DISC:CMD
  766. * when getting the LAP down.
  767. * Note that we are not protected by the queue_stop approach
  768. * because the final UA:RSP arrives _without_ request to apply
  769. * new-speed-after-this-packet - hence the driver doesn't know
  770. * this was the last packet and doesn't stop the queue. So the
  771. * forced switch to default speed from LAP gets through as fast
  772. * as only some 10 usec later while the UA:RSP is still processed
  773. * by the hardware and we would get screwed.
  774. */
  775. if (ring_first(idev->tx_ring) == NULL) {
  776. /* no race - tx-ring already empty */
  777. vlsi_set_baud(idev, iobase);
  778. netif_wake_queue(ndev);
  779. }
  780. else
  781. ;
  782. /* keep the speed change pending like it would
  783. * for any len>0 packet. tx completion interrupt
  784. * will apply it when the tx ring becomes empty.
  785. */
  786. spin_unlock_irqrestore(&idev->lock, flags);
  787. dev_kfree_skb_any(skb);
  788. return NETDEV_TX_OK;
  789. }
  790. /* sanity checks - simply drop the packet */
  791. rd = ring_last(r);
  792. if (!rd) {
  793. msg = "ring full, but queue wasn't stopped";
  794. goto drop_unlock;
  795. }
  796. if (rd_is_active(rd)) {
  797. msg = "entry still owned by hw";
  798. goto drop_unlock;
  799. }
  800. if (!rd->buf) {
  801. msg = "tx ring entry without pci buffer";
  802. goto drop_unlock;
  803. }
  804. if (rd->skb) {
  805. msg = "ring entry with old skb still attached";
  806. goto drop_unlock;
  807. }
  808. /* no need for serialization or interrupt disable during mtt */
  809. spin_unlock_irqrestore(&idev->lock, flags);
  810. if ((mtt = irda_get_mtt(skb)) > 0) {
  811. diff = ktime_us_delta(ktime_get(), idev->last_rx);
  812. if (mtt > diff)
  813. udelay(mtt - diff);
  814. /* must not sleep here - called under netif_tx_lock! */
  815. }
  816. /* tx buffer already owned by CPU due to pci_dma_sync_single_for_cpu()
  817. * after subsequent tx-completion
  818. */
  819. if (idev->mode == IFF_SIR) {
  820. status |= RD_TX_DISCRC; /* no hw-crc creation */
  821. len = async_wrap_skb(skb, rd->buf, r->len);
  822. /* Some rare worst case situation in SIR mode might lead to
  823. * potential buffer overflow. The wrapper detects this, returns
  824. * with a shortened frame (without FCS/EOF) but doesn't provide
  825. * any error indication about the invalid packet which we are
  826. * going to transmit.
  827. * Therefore we log if the buffer got filled to the point, where the
  828. * wrapper would abort, i.e. when there are less than 5 bytes left to
  829. * allow appending the FCS/EOF.
  830. */
  831. if (len >= r->len-5)
  832. net_warn_ratelimited("%s: possible buffer overflow with SIR wrapping!\n",
  833. __func__);
  834. }
  835. else {
  836. /* hw deals with MIR/FIR mode wrapping */
  837. status |= RD_TX_PULSE; /* send 2 us highspeed indication pulse */
  838. len = skb->len;
  839. if (len > r->len) {
  840. msg = "frame exceeds tx buffer length";
  841. goto drop;
  842. }
  843. else
  844. skb_copy_from_linear_data(skb, rd->buf, len);
  845. }
  846. rd->skb = skb; /* remember skb for tx-complete stats */
  847. rd_set_count(rd, len);
  848. rd_set_status(rd, status); /* not yet active! */
  849. /* give dma buffer back to busmaster-hw (flush caches to make
  850. * CPU-driven changes visible from the pci bus).
  851. */
  852. pci_dma_sync_single_for_device(r->pdev, rd_get_addr(rd), r->len, r->dir);
  853. /* Switching to TX mode here races with the controller
  854. * which may stop TX at any time when fetching an inactive descriptor
  855. * or one with CLR_ENTX set. So we switch on TX only, if TX was not running
  856. * _after_ the new descriptor was activated on the ring. This ensures
  857. * we will either find TX already stopped or we can be sure, there
  858. * will be a TX-complete interrupt even if the chip stopped doing
  859. * TX just after we found it still running. The ISR will then find
  860. * the non-empty ring and restart TX processing. The enclosing
  861. * spinlock provides the correct serialization to prevent race with isr.
  862. */
  863. spin_lock_irqsave(&idev->lock,flags);
  864. rd_activate(rd);
  865. if (!(inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_ENTXST)) {
  866. int fifocnt;
  867. fifocnt = inw(ndev->base_addr+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
  868. if (fifocnt != 0) {
  869. pr_debug("%s: rx fifo not empty(%d)\n",
  870. __func__, fifocnt);
  871. }
  872. config = inw(iobase+VLSI_PIO_IRCFG);
  873. mb();
  874. outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG);
  875. wmb();
  876. outw(0, iobase+VLSI_PIO_PROMPT);
  877. }
  878. if (ring_put(r) == NULL) {
  879. netif_stop_queue(ndev);
  880. pr_debug("%s: tx ring full - queue stopped\n", __func__);
  881. }
  882. spin_unlock_irqrestore(&idev->lock, flags);
  883. return NETDEV_TX_OK;
  884. drop_unlock:
  885. spin_unlock_irqrestore(&idev->lock, flags);
  886. drop:
  887. net_warn_ratelimited("%s: dropping packet - %s\n", __func__, msg);
  888. dev_kfree_skb_any(skb);
  889. ndev->stats.tx_errors++;
  890. ndev->stats.tx_dropped++;
  891. /* Don't even think about returning NET_XMIT_DROP (=1) here!
  892. * In fact any retval!=0 causes the packet scheduler to requeue the
  893. * packet for later retry of transmission - which isn't exactly
  894. * what we want after we've just called dev_kfree_skb_any ;-)
  895. */
  896. return NETDEV_TX_OK;
  897. }
  898. static void vlsi_tx_interrupt(struct net_device *ndev)
  899. {
  900. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  901. struct vlsi_ring *r = idev->tx_ring;
  902. struct ring_descr *rd;
  903. unsigned iobase;
  904. int ret;
  905. u16 config;
  906. for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
  907. if (rd_is_active(rd))
  908. break;
  909. ret = vlsi_process_tx(r, rd);
  910. if (ret < 0) {
  911. ret = -ret;
  912. ndev->stats.tx_errors++;
  913. if (ret & VLSI_TX_DROP)
  914. ndev->stats.tx_dropped++;
  915. if (ret & VLSI_TX_FIFO)
  916. ndev->stats.tx_fifo_errors++;
  917. }
  918. else if (ret > 0){
  919. ndev->stats.tx_packets++;
  920. ndev->stats.tx_bytes += ret;
  921. }
  922. }
  923. iobase = ndev->base_addr;
  924. if (idev->new_baud && rd == NULL) /* tx ring empty and speed change pending */
  925. vlsi_set_baud(idev, iobase);
  926. config = inw(iobase+VLSI_PIO_IRCFG);
  927. if (rd == NULL) /* tx ring empty: re-enable rx */
  928. outw((config & ~IRCFG_ENTX) | IRCFG_ENRX, iobase+VLSI_PIO_IRCFG);
  929. else if (!(inw(iobase+VLSI_PIO_IRENABLE) & IRENABLE_ENTXST)) {
  930. int fifocnt;
  931. fifocnt = inw(iobase+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
  932. if (fifocnt != 0) {
  933. pr_debug("%s: rx fifo not empty(%d)\n",
  934. __func__, fifocnt);
  935. }
  936. outw(config | IRCFG_ENTX, iobase+VLSI_PIO_IRCFG);
  937. }
  938. outw(0, iobase+VLSI_PIO_PROMPT);
  939. if (netif_queue_stopped(ndev) && !idev->new_baud) {
  940. netif_wake_queue(ndev);
  941. pr_debug("%s: queue awoken\n", __func__);
  942. }
  943. }
  944. /* caller must have stopped the controller from busmastering */
  945. static void vlsi_unarm_tx(vlsi_irda_dev_t *idev)
  946. {
  947. struct net_device *ndev = pci_get_drvdata(idev->pdev);
  948. struct vlsi_ring *r = idev->tx_ring;
  949. struct ring_descr *rd;
  950. int ret;
  951. for (rd = ring_first(r); rd != NULL; rd = ring_get(r)) {
  952. ret = 0;
  953. if (rd_is_active(rd)) {
  954. rd_set_status(rd, 0);
  955. rd_set_count(rd, 0);
  956. pci_dma_sync_single_for_cpu(r->pdev, rd_get_addr(rd), r->len, r->dir);
  957. if (rd->skb) {
  958. dev_kfree_skb_any(rd->skb);
  959. rd->skb = NULL;
  960. }
  961. pr_debug("%s - dropping tx packet\n", __func__);
  962. ret = -VLSI_TX_DROP;
  963. }
  964. else
  965. ret = vlsi_process_tx(r, rd);
  966. if (ret < 0) {
  967. ret = -ret;
  968. ndev->stats.tx_errors++;
  969. if (ret & VLSI_TX_DROP)
  970. ndev->stats.tx_dropped++;
  971. if (ret & VLSI_TX_FIFO)
  972. ndev->stats.tx_fifo_errors++;
  973. }
  974. else if (ret > 0){
  975. ndev->stats.tx_packets++;
  976. ndev->stats.tx_bytes += ret;
  977. }
  978. }
  979. }
  980. /********************************************************/
  981. static int vlsi_start_clock(struct pci_dev *pdev)
  982. {
  983. u8 clkctl, lock;
  984. int i, count;
  985. if (clksrc < 2) { /* auto or PLL: try PLL */
  986. clkctl = CLKCTL_PD_INV | CLKCTL_CLKSTP;
  987. pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
  988. /* procedure to detect PLL lock synchronisation:
  989. * after 0.5 msec initial delay we expect to find 3 PLL lock
  990. * indications within 10 msec for successful PLL detection.
  991. */
  992. udelay(500);
  993. count = 0;
  994. for (i = 500; i <= 10000; i += 50) { /* max 10 msec */
  995. pci_read_config_byte(pdev, VLSI_PCI_CLKCTL, &lock);
  996. if (lock&CLKCTL_LOCK) {
  997. if (++count >= 3)
  998. break;
  999. }
  1000. udelay(50);
  1001. }
  1002. if (count < 3) {
  1003. if (clksrc == 1) { /* explicitly asked for PLL hence bail out */
  1004. net_err_ratelimited("%s: no PLL or failed to lock!\n",
  1005. __func__);
  1006. clkctl = CLKCTL_CLKSTP;
  1007. pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
  1008. return -1;
  1009. }
  1010. else /* was: clksrc=0(auto) */
  1011. clksrc = 3; /* fallback to 40MHz XCLK (OB800) */
  1012. pr_debug("%s: PLL not locked, fallback to clksrc=%d\n",
  1013. __func__, clksrc);
  1014. }
  1015. else
  1016. clksrc = 1; /* got successful PLL lock */
  1017. }
  1018. if (clksrc != 1) {
  1019. /* we get here if either no PLL detected in auto-mode or
  1020. an external clock source was explicitly specified */
  1021. clkctl = CLKCTL_EXTCLK | CLKCTL_CLKSTP;
  1022. if (clksrc == 3)
  1023. clkctl |= CLKCTL_XCKSEL;
  1024. pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
  1025. /* no way to test for working XCLK */
  1026. }
  1027. else
  1028. pci_read_config_byte(pdev, VLSI_PCI_CLKCTL, &clkctl);
  1029. /* ok, now going to connect the chip with the clock source */
  1030. clkctl &= ~CLKCTL_CLKSTP;
  1031. pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
  1032. return 0;
  1033. }
  1034. static void vlsi_stop_clock(struct pci_dev *pdev)
  1035. {
  1036. u8 clkctl;
  1037. /* disconnect chip from clock source */
  1038. pci_read_config_byte(pdev, VLSI_PCI_CLKCTL, &clkctl);
  1039. clkctl |= CLKCTL_CLKSTP;
  1040. pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
  1041. /* disable all clock sources */
  1042. clkctl &= ~(CLKCTL_EXTCLK | CLKCTL_PD_INV);
  1043. pci_write_config_byte(pdev, VLSI_PCI_CLKCTL, clkctl);
  1044. }
  1045. /********************************************************/
  1046. /* writing all-zero to the VLSI PCI IO register area seems to prevent
  1047. * some occasional situations where the hardware fails (symptoms are
  1048. * what appears as stalled tx/rx state machines, i.e. everything ok for
  1049. * receive or transmit but hw makes no progress or is unable to access
  1050. * the bus memory locations).
  1051. * Best place to call this is immediately after/before the internal clock
  1052. * gets started/stopped.
  1053. */
  1054. static inline void vlsi_clear_regs(unsigned iobase)
  1055. {
  1056. unsigned i;
  1057. const unsigned chip_io_extent = 32;
  1058. for (i = 0; i < chip_io_extent; i += sizeof(u16))
  1059. outw(0, iobase + i);
  1060. }
  1061. static int vlsi_init_chip(struct pci_dev *pdev)
  1062. {
  1063. struct net_device *ndev = pci_get_drvdata(pdev);
  1064. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1065. unsigned iobase;
  1066. u16 ptr;
  1067. /* start the clock and clean the registers */
  1068. if (vlsi_start_clock(pdev)) {
  1069. net_err_ratelimited("%s: no valid clock source\n", __func__);
  1070. return -1;
  1071. }
  1072. iobase = ndev->base_addr;
  1073. vlsi_clear_regs(iobase);
  1074. outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR); /* w/c pending IRQ, disable all INT */
  1075. outw(0, iobase+VLSI_PIO_IRENABLE); /* disable IrPHY-interface */
  1076. /* disable everything, particularly IRCFG_MSTR - (also resetting the RING_PTR) */
  1077. outw(0, iobase+VLSI_PIO_IRCFG);
  1078. wmb();
  1079. outw(MAX_PACKET_LENGTH, iobase+VLSI_PIO_MAXPKT); /* max possible value=0x0fff */
  1080. outw(BUS_TO_RINGBASE(idev->busaddr), iobase+VLSI_PIO_RINGBASE);
  1081. outw(TX_RX_TO_RINGSIZE(idev->tx_ring->size, idev->rx_ring->size),
  1082. iobase+VLSI_PIO_RINGSIZE);
  1083. ptr = inw(iobase+VLSI_PIO_RINGPTR);
  1084. atomic_set(&idev->rx_ring->head, RINGPTR_GET_RX(ptr));
  1085. atomic_set(&idev->rx_ring->tail, RINGPTR_GET_RX(ptr));
  1086. atomic_set(&idev->tx_ring->head, RINGPTR_GET_TX(ptr));
  1087. atomic_set(&idev->tx_ring->tail, RINGPTR_GET_TX(ptr));
  1088. vlsi_set_baud(idev, iobase); /* idev->new_baud used as provided by caller */
  1089. outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR); /* just in case - w/c pending IRQ's */
  1090. wmb();
  1091. /* DO NOT BLINDLY ENABLE IRINTR_ACTEN!
  1092. * basically every received pulse fires an ACTIVITY-INT
  1093. * leading to >>1000 INT's per second instead of few 10
  1094. */
  1095. outb(IRINTR_RPKTEN|IRINTR_TPKTEN, iobase+VLSI_PIO_IRINTR);
  1096. return 0;
  1097. }
  1098. static int vlsi_start_hw(vlsi_irda_dev_t *idev)
  1099. {
  1100. struct pci_dev *pdev = idev->pdev;
  1101. struct net_device *ndev = pci_get_drvdata(pdev);
  1102. unsigned iobase = ndev->base_addr;
  1103. u8 byte;
  1104. /* we don't use the legacy UART, disable its address decoding */
  1105. pci_read_config_byte(pdev, VLSI_PCI_IRMISC, &byte);
  1106. byte &= ~(IRMISC_UARTEN | IRMISC_UARTTST);
  1107. pci_write_config_byte(pdev, VLSI_PCI_IRMISC, byte);
  1108. /* enable PCI busmaster access to our 16MB page */
  1109. pci_write_config_byte(pdev, VLSI_PCI_MSTRPAGE, MSTRPAGE_VALUE);
  1110. pci_set_master(pdev);
  1111. if (vlsi_init_chip(pdev) < 0) {
  1112. pci_disable_device(pdev);
  1113. return -1;
  1114. }
  1115. vlsi_fill_rx(idev->rx_ring);
  1116. idev->last_rx = ktime_get(); /* first mtt may start from now on */
  1117. outw(0, iobase+VLSI_PIO_PROMPT); /* kick hw state machine */
  1118. return 0;
  1119. }
  1120. static int vlsi_stop_hw(vlsi_irda_dev_t *idev)
  1121. {
  1122. struct pci_dev *pdev = idev->pdev;
  1123. struct net_device *ndev = pci_get_drvdata(pdev);
  1124. unsigned iobase = ndev->base_addr;
  1125. unsigned long flags;
  1126. spin_lock_irqsave(&idev->lock,flags);
  1127. outw(0, iobase+VLSI_PIO_IRENABLE);
  1128. outw(0, iobase+VLSI_PIO_IRCFG); /* disable everything */
  1129. /* disable and w/c irqs */
  1130. outb(0, iobase+VLSI_PIO_IRINTR);
  1131. wmb();
  1132. outb(IRINTR_INT_MASK, iobase+VLSI_PIO_IRINTR);
  1133. spin_unlock_irqrestore(&idev->lock,flags);
  1134. vlsi_unarm_tx(idev);
  1135. vlsi_unarm_rx(idev);
  1136. vlsi_clear_regs(iobase);
  1137. vlsi_stop_clock(pdev);
  1138. pci_disable_device(pdev);
  1139. return 0;
  1140. }
  1141. /**************************************************************/
  1142. static void vlsi_tx_timeout(struct net_device *ndev)
  1143. {
  1144. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1145. vlsi_reg_debug(ndev->base_addr, __func__);
  1146. vlsi_ring_debug(idev->tx_ring);
  1147. if (netif_running(ndev))
  1148. netif_stop_queue(ndev);
  1149. vlsi_stop_hw(idev);
  1150. /* now simply restart the whole thing */
  1151. if (!idev->new_baud)
  1152. idev->new_baud = idev->baud; /* keep current baudrate */
  1153. if (vlsi_start_hw(idev))
  1154. net_err_ratelimited("%s: failed to restart hw - %s(%s) unusable!\n",
  1155. __func__, pci_name(idev->pdev), ndev->name);
  1156. else
  1157. netif_start_queue(ndev);
  1158. }
  1159. static int vlsi_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
  1160. {
  1161. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1162. struct if_irda_req *irq = (struct if_irda_req *) rq;
  1163. unsigned long flags;
  1164. u16 fifocnt;
  1165. int ret = 0;
  1166. switch (cmd) {
  1167. case SIOCSBANDWIDTH:
  1168. if (!capable(CAP_NET_ADMIN)) {
  1169. ret = -EPERM;
  1170. break;
  1171. }
  1172. spin_lock_irqsave(&idev->lock, flags);
  1173. idev->new_baud = irq->ifr_baudrate;
  1174. /* when called from userland there might be a minor race window here
  1175. * if the stack tries to change speed concurrently - which would be
  1176. * pretty strange anyway with the userland having full control...
  1177. */
  1178. vlsi_set_baud(idev, ndev->base_addr);
  1179. spin_unlock_irqrestore(&idev->lock, flags);
  1180. break;
  1181. case SIOCSMEDIABUSY:
  1182. if (!capable(CAP_NET_ADMIN)) {
  1183. ret = -EPERM;
  1184. break;
  1185. }
  1186. irda_device_set_media_busy(ndev, TRUE);
  1187. break;
  1188. case SIOCGRECEIVING:
  1189. /* the best we can do: check whether there are any bytes in rx fifo.
  1190. * The trustable window (in case some data arrives just afterwards)
  1191. * may be as short as 1usec or so at 4Mbps.
  1192. */
  1193. fifocnt = inw(ndev->base_addr+VLSI_PIO_RCVBCNT) & RCVBCNT_MASK;
  1194. irq->ifr_receiving = (fifocnt!=0) ? 1 : 0;
  1195. break;
  1196. default:
  1197. net_warn_ratelimited("%s: notsupp - cmd=%04x\n",
  1198. __func__, cmd);
  1199. ret = -EOPNOTSUPP;
  1200. }
  1201. return ret;
  1202. }
  1203. /********************************************************/
  1204. static irqreturn_t vlsi_interrupt(int irq, void *dev_instance)
  1205. {
  1206. struct net_device *ndev = dev_instance;
  1207. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1208. unsigned iobase;
  1209. u8 irintr;
  1210. int boguscount = 5;
  1211. unsigned long flags;
  1212. int handled = 0;
  1213. iobase = ndev->base_addr;
  1214. spin_lock_irqsave(&idev->lock,flags);
  1215. do {
  1216. irintr = inb(iobase+VLSI_PIO_IRINTR);
  1217. mb();
  1218. outb(irintr, iobase+VLSI_PIO_IRINTR); /* acknowledge asap */
  1219. if (!(irintr&=IRINTR_INT_MASK)) /* not our INT - probably shared */
  1220. break;
  1221. handled = 1;
  1222. if (unlikely(!(irintr & ~IRINTR_ACTIVITY)))
  1223. break; /* nothing todo if only activity */
  1224. if (irintr&IRINTR_RPKTINT)
  1225. vlsi_rx_interrupt(ndev);
  1226. if (irintr&IRINTR_TPKTINT)
  1227. vlsi_tx_interrupt(ndev);
  1228. } while (--boguscount > 0);
  1229. spin_unlock_irqrestore(&idev->lock,flags);
  1230. if (boguscount <= 0)
  1231. net_info_ratelimited("%s: too much work in interrupt!\n",
  1232. __func__);
  1233. return IRQ_RETVAL(handled);
  1234. }
  1235. /********************************************************/
  1236. static int vlsi_open(struct net_device *ndev)
  1237. {
  1238. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1239. int err = -EAGAIN;
  1240. char hwname[32];
  1241. if (pci_request_regions(idev->pdev, drivername)) {
  1242. net_warn_ratelimited("%s: io resource busy\n", __func__);
  1243. goto errout;
  1244. }
  1245. ndev->base_addr = pci_resource_start(idev->pdev,0);
  1246. ndev->irq = idev->pdev->irq;
  1247. /* under some rare occasions the chip apparently comes up with
  1248. * IRQ's pending. We better w/c pending IRQ and disable them all
  1249. */
  1250. outb(IRINTR_INT_MASK, ndev->base_addr+VLSI_PIO_IRINTR);
  1251. if (request_irq(ndev->irq, vlsi_interrupt, IRQF_SHARED,
  1252. drivername, ndev)) {
  1253. net_warn_ratelimited("%s: couldn't get IRQ: %d\n",
  1254. __func__, ndev->irq);
  1255. goto errout_io;
  1256. }
  1257. if ((err = vlsi_create_hwif(idev)) != 0)
  1258. goto errout_irq;
  1259. sprintf(hwname, "VLSI-FIR @ 0x%04x", (unsigned)ndev->base_addr);
  1260. idev->irlap = irlap_open(ndev,&idev->qos,hwname);
  1261. if (!idev->irlap)
  1262. goto errout_free_ring;
  1263. idev->last_rx = ktime_get(); /* first mtt may start from now on */
  1264. idev->new_baud = 9600; /* start with IrPHY using 9600(SIR) mode */
  1265. if ((err = vlsi_start_hw(idev)) != 0)
  1266. goto errout_close_irlap;
  1267. netif_start_queue(ndev);
  1268. net_info_ratelimited("%s: device %s operational\n",
  1269. __func__, ndev->name);
  1270. return 0;
  1271. errout_close_irlap:
  1272. irlap_close(idev->irlap);
  1273. errout_free_ring:
  1274. vlsi_destroy_hwif(idev);
  1275. errout_irq:
  1276. free_irq(ndev->irq,ndev);
  1277. errout_io:
  1278. pci_release_regions(idev->pdev);
  1279. errout:
  1280. return err;
  1281. }
  1282. static int vlsi_close(struct net_device *ndev)
  1283. {
  1284. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1285. netif_stop_queue(ndev);
  1286. if (idev->irlap)
  1287. irlap_close(idev->irlap);
  1288. idev->irlap = NULL;
  1289. vlsi_stop_hw(idev);
  1290. vlsi_destroy_hwif(idev);
  1291. free_irq(ndev->irq,ndev);
  1292. pci_release_regions(idev->pdev);
  1293. net_info_ratelimited("%s: device %s stopped\n", __func__, ndev->name);
  1294. return 0;
  1295. }
  1296. static const struct net_device_ops vlsi_netdev_ops = {
  1297. .ndo_open = vlsi_open,
  1298. .ndo_stop = vlsi_close,
  1299. .ndo_start_xmit = vlsi_hard_start_xmit,
  1300. .ndo_do_ioctl = vlsi_ioctl,
  1301. .ndo_tx_timeout = vlsi_tx_timeout,
  1302. };
  1303. static int vlsi_irda_init(struct net_device *ndev)
  1304. {
  1305. vlsi_irda_dev_t *idev = netdev_priv(ndev);
  1306. struct pci_dev *pdev = idev->pdev;
  1307. ndev->irq = pdev->irq;
  1308. ndev->base_addr = pci_resource_start(pdev,0);
  1309. /* PCI busmastering
  1310. * see include file for details why we need these 2 masks, in this order!
  1311. */
  1312. if (pci_set_dma_mask(pdev,DMA_MASK_USED_BY_HW) ||
  1313. pci_set_dma_mask(pdev,DMA_MASK_MSTRPAGE)) {
  1314. net_err_ratelimited("%s: aborting due to PCI BM-DMA address limitations\n",
  1315. __func__);
  1316. return -1;
  1317. }
  1318. irda_init_max_qos_capabilies(&idev->qos);
  1319. /* the VLSI82C147 does not support 576000! */
  1320. idev->qos.baud_rate.bits = IR_2400 | IR_9600
  1321. | IR_19200 | IR_38400 | IR_57600 | IR_115200
  1322. | IR_1152000 | (IR_4000000 << 8);
  1323. idev->qos.min_turn_time.bits = qos_mtt_bits;
  1324. irda_qos_bits_to_value(&idev->qos);
  1325. /* currently no public media definitions for IrDA */
  1326. ndev->flags |= IFF_PORTSEL | IFF_AUTOMEDIA;
  1327. ndev->if_port = IF_PORT_UNKNOWN;
  1328. ndev->netdev_ops = &vlsi_netdev_ops;
  1329. ndev->watchdog_timeo = 500*HZ/1000; /* max. allowed turn time for IrLAP */
  1330. SET_NETDEV_DEV(ndev, &pdev->dev);
  1331. return 0;
  1332. }
  1333. /**************************************************************/
  1334. static int
  1335. vlsi_irda_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  1336. {
  1337. struct net_device *ndev;
  1338. vlsi_irda_dev_t *idev;
  1339. if (pci_enable_device(pdev))
  1340. goto out;
  1341. else
  1342. pdev->current_state = 0; /* hw must be running now */
  1343. net_info_ratelimited("%s: IrDA PCI controller %s detected\n",
  1344. drivername, pci_name(pdev));
  1345. if ( !pci_resource_start(pdev,0) ||
  1346. !(pci_resource_flags(pdev,0) & IORESOURCE_IO) ) {
  1347. net_err_ratelimited("%s: bar 0 invalid", __func__);
  1348. goto out_disable;
  1349. }
  1350. ndev = alloc_irdadev(sizeof(*idev));
  1351. if (ndev==NULL) {
  1352. net_err_ratelimited("%s: Unable to allocate device memory.\n",
  1353. __func__);
  1354. goto out_disable;
  1355. }
  1356. idev = netdev_priv(ndev);
  1357. spin_lock_init(&idev->lock);
  1358. mutex_init(&idev->mtx);
  1359. mutex_lock(&idev->mtx);
  1360. idev->pdev = pdev;
  1361. if (vlsi_irda_init(ndev) < 0)
  1362. goto out_freedev;
  1363. if (register_netdev(ndev) < 0) {
  1364. net_err_ratelimited("%s: register_netdev failed\n", __func__);
  1365. goto out_freedev;
  1366. }
  1367. if (vlsi_proc_root != NULL) {
  1368. struct proc_dir_entry *ent;
  1369. ent = proc_create_data(ndev->name, S_IFREG|S_IRUGO,
  1370. vlsi_proc_root, VLSI_PROC_FOPS, ndev);
  1371. if (!ent) {
  1372. net_warn_ratelimited("%s: failed to create proc entry\n",
  1373. __func__);
  1374. } else {
  1375. proc_set_size(ent, 0);
  1376. }
  1377. idev->proc_entry = ent;
  1378. }
  1379. net_info_ratelimited("%s: registered device %s\n",
  1380. drivername, ndev->name);
  1381. pci_set_drvdata(pdev, ndev);
  1382. mutex_unlock(&idev->mtx);
  1383. return 0;
  1384. out_freedev:
  1385. mutex_unlock(&idev->mtx);
  1386. free_netdev(ndev);
  1387. out_disable:
  1388. pci_disable_device(pdev);
  1389. out:
  1390. return -ENODEV;
  1391. }
  1392. static void vlsi_irda_remove(struct pci_dev *pdev)
  1393. {
  1394. struct net_device *ndev = pci_get_drvdata(pdev);
  1395. vlsi_irda_dev_t *idev;
  1396. if (!ndev) {
  1397. net_err_ratelimited("%s: lost netdevice?\n", drivername);
  1398. return;
  1399. }
  1400. unregister_netdev(ndev);
  1401. idev = netdev_priv(ndev);
  1402. mutex_lock(&idev->mtx);
  1403. if (idev->proc_entry) {
  1404. remove_proc_entry(ndev->name, vlsi_proc_root);
  1405. idev->proc_entry = NULL;
  1406. }
  1407. mutex_unlock(&idev->mtx);
  1408. free_netdev(ndev);
  1409. net_info_ratelimited("%s: %s removed\n", drivername, pci_name(pdev));
  1410. }
  1411. #ifdef CONFIG_PM
  1412. /* The Controller doesn't provide PCI PM capabilities as defined by PCI specs.
  1413. * Some of the Linux PCI-PM code however depends on this, for example in
  1414. * pci_set_power_state(). So we have to take care to perform the required
  1415. * operations on our own (particularly reflecting the pdev->current_state)
  1416. * otherwise we might get cheated by pci-pm.
  1417. */
  1418. static int vlsi_irda_suspend(struct pci_dev *pdev, pm_message_t state)
  1419. {
  1420. struct net_device *ndev = pci_get_drvdata(pdev);
  1421. vlsi_irda_dev_t *idev;
  1422. if (!ndev) {
  1423. net_err_ratelimited("%s - %s: no netdevice\n",
  1424. __func__, pci_name(pdev));
  1425. return 0;
  1426. }
  1427. idev = netdev_priv(ndev);
  1428. mutex_lock(&idev->mtx);
  1429. if (pdev->current_state != 0) { /* already suspended */
  1430. if (state.event > pdev->current_state) { /* simply go deeper */
  1431. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1432. pdev->current_state = state.event;
  1433. }
  1434. else
  1435. net_err_ratelimited("%s - %s: invalid suspend request %u -> %u\n",
  1436. __func__, pci_name(pdev),
  1437. pdev->current_state, state.event);
  1438. mutex_unlock(&idev->mtx);
  1439. return 0;
  1440. }
  1441. if (netif_running(ndev)) {
  1442. netif_device_detach(ndev);
  1443. vlsi_stop_hw(idev);
  1444. pci_save_state(pdev);
  1445. if (!idev->new_baud)
  1446. /* remember speed settings to restore on resume */
  1447. idev->new_baud = idev->baud;
  1448. }
  1449. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1450. pdev->current_state = state.event;
  1451. idev->resume_ok = 1;
  1452. mutex_unlock(&idev->mtx);
  1453. return 0;
  1454. }
  1455. static int vlsi_irda_resume(struct pci_dev *pdev)
  1456. {
  1457. struct net_device *ndev = pci_get_drvdata(pdev);
  1458. vlsi_irda_dev_t *idev;
  1459. if (!ndev) {
  1460. net_err_ratelimited("%s - %s: no netdevice\n",
  1461. __func__, pci_name(pdev));
  1462. return 0;
  1463. }
  1464. idev = netdev_priv(ndev);
  1465. mutex_lock(&idev->mtx);
  1466. if (pdev->current_state == 0) {
  1467. mutex_unlock(&idev->mtx);
  1468. net_warn_ratelimited("%s - %s: already resumed\n",
  1469. __func__, pci_name(pdev));
  1470. return 0;
  1471. }
  1472. pci_set_power_state(pdev, PCI_D0);
  1473. pdev->current_state = PM_EVENT_ON;
  1474. if (!idev->resume_ok) {
  1475. /* should be obsolete now - but used to happen due to:
  1476. * - pci layer initially setting pdev->current_state = 4 (unknown)
  1477. * - pci layer did not walk the save_state-tree (might be APM problem)
  1478. * so we could not refuse to suspend from undefined state
  1479. * - vlsi_irda_suspend detected invalid state and refused to save
  1480. * configuration for resume - but was too late to stop suspending
  1481. * - vlsi_irda_resume got screwed when trying to resume from garbage
  1482. *
  1483. * now we explicitly set pdev->current_state = 0 after enabling the
  1484. * device and independently resume_ok should catch any garbage config.
  1485. */
  1486. net_warn_ratelimited("%s - hm, nothing to resume?\n", __func__);
  1487. mutex_unlock(&idev->mtx);
  1488. return 0;
  1489. }
  1490. if (netif_running(ndev)) {
  1491. pci_restore_state(pdev);
  1492. vlsi_start_hw(idev);
  1493. netif_device_attach(ndev);
  1494. }
  1495. idev->resume_ok = 0;
  1496. mutex_unlock(&idev->mtx);
  1497. return 0;
  1498. }
  1499. #endif /* CONFIG_PM */
  1500. /*********************************************************/
  1501. static struct pci_driver vlsi_irda_driver = {
  1502. .name = drivername,
  1503. .id_table = vlsi_irda_table,
  1504. .probe = vlsi_irda_probe,
  1505. .remove = vlsi_irda_remove,
  1506. #ifdef CONFIG_PM
  1507. .suspend = vlsi_irda_suspend,
  1508. .resume = vlsi_irda_resume,
  1509. #endif
  1510. };
  1511. #define PROC_DIR ("driver/" DRIVER_NAME)
  1512. static int __init vlsi_mod_init(void)
  1513. {
  1514. int i, ret;
  1515. if (clksrc < 0 || clksrc > 3) {
  1516. net_err_ratelimited("%s: invalid clksrc=%d\n",
  1517. drivername, clksrc);
  1518. return -1;
  1519. }
  1520. for (i = 0; i < 2; i++) {
  1521. switch(ringsize[i]) {
  1522. case 4:
  1523. case 8:
  1524. case 16:
  1525. case 32:
  1526. case 64:
  1527. break;
  1528. default:
  1529. net_warn_ratelimited("%s: invalid %s ringsize %d, using default=8\n",
  1530. drivername,
  1531. i ? "rx" : "tx",
  1532. ringsize[i]);
  1533. ringsize[i] = 8;
  1534. break;
  1535. }
  1536. }
  1537. sirpulse = !!sirpulse;
  1538. /* proc_mkdir returns NULL if !CONFIG_PROC_FS.
  1539. * Failure to create the procfs entry is handled like running
  1540. * without procfs - it's not required for the driver to work.
  1541. */
  1542. vlsi_proc_root = proc_mkdir(PROC_DIR, NULL);
  1543. ret = pci_register_driver(&vlsi_irda_driver);
  1544. if (ret && vlsi_proc_root)
  1545. remove_proc_entry(PROC_DIR, NULL);
  1546. return ret;
  1547. }
  1548. static void __exit vlsi_mod_exit(void)
  1549. {
  1550. pci_unregister_driver(&vlsi_irda_driver);
  1551. if (vlsi_proc_root)
  1552. remove_proc_entry(PROC_DIR, NULL);
  1553. }
  1554. module_init(vlsi_mod_init);
  1555. module_exit(vlsi_mod_exit);