bcm63xx.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100
  1. /*
  2. * Driver for Broadcom 63xx SOCs integrated PHYs
  3. *
  4. * This program is free software; you can redistribute it and/or
  5. * modify it under the terms of the GNU General Public License
  6. * as published by the Free Software Foundation; either version
  7. * 2 of the License, or (at your option) any later version.
  8. */
  9. #include "bcm-phy-lib.h"
  10. #include <linux/module.h>
  11. #include <linux/phy.h>
  12. #define MII_BCM63XX_IR 0x1a /* interrupt register */
  13. #define MII_BCM63XX_IR_EN 0x4000 /* global interrupt enable */
  14. #define MII_BCM63XX_IR_DUPLEX 0x0800 /* duplex changed */
  15. #define MII_BCM63XX_IR_SPEED 0x0400 /* speed changed */
  16. #define MII_BCM63XX_IR_LINK 0x0200 /* link changed */
  17. #define MII_BCM63XX_IR_GMASK 0x0100 /* global interrupt mask */
  18. MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver");
  19. MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
  20. MODULE_LICENSE("GPL");
  21. static int bcm63xx_config_intr(struct phy_device *phydev)
  22. {
  23. int reg, err;
  24. reg = phy_read(phydev, MII_BCM63XX_IR);
  25. if (reg < 0)
  26. return reg;
  27. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  28. reg &= ~MII_BCM63XX_IR_GMASK;
  29. else
  30. reg |= MII_BCM63XX_IR_GMASK;
  31. err = phy_write(phydev, MII_BCM63XX_IR, reg);
  32. return err;
  33. }
  34. static int bcm63xx_config_init(struct phy_device *phydev)
  35. {
  36. int reg, err;
  37. reg = phy_read(phydev, MII_BCM63XX_IR);
  38. if (reg < 0)
  39. return reg;
  40. /* Mask interrupts globally. */
  41. reg |= MII_BCM63XX_IR_GMASK;
  42. err = phy_write(phydev, MII_BCM63XX_IR, reg);
  43. if (err < 0)
  44. return err;
  45. /* Unmask events we are interested in */
  46. reg = ~(MII_BCM63XX_IR_DUPLEX |
  47. MII_BCM63XX_IR_SPEED |
  48. MII_BCM63XX_IR_LINK) |
  49. MII_BCM63XX_IR_EN;
  50. return phy_write(phydev, MII_BCM63XX_IR, reg);
  51. }
  52. static struct phy_driver bcm63xx_driver[] = {
  53. {
  54. .phy_id = 0x00406000,
  55. .phy_id_mask = 0xfffffc00,
  56. .name = "Broadcom BCM63XX (1)",
  57. /* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
  58. .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
  59. .flags = PHY_HAS_INTERRUPT | PHY_IS_INTERNAL,
  60. .config_init = bcm63xx_config_init,
  61. .config_aneg = genphy_config_aneg,
  62. .read_status = genphy_read_status,
  63. .ack_interrupt = bcm_phy_ack_intr,
  64. .config_intr = bcm63xx_config_intr,
  65. .driver = { .owner = THIS_MODULE },
  66. }, {
  67. /* same phy as above, with just a different OUI */
  68. .phy_id = 0x002bdc00,
  69. .phy_id_mask = 0xfffffc00,
  70. .name = "Broadcom BCM63XX (2)",
  71. .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause),
  72. .flags = PHY_HAS_INTERRUPT | PHY_IS_INTERNAL,
  73. .config_init = bcm63xx_config_init,
  74. .config_aneg = genphy_config_aneg,
  75. .read_status = genphy_read_status,
  76. .ack_interrupt = bcm_phy_ack_intr,
  77. .config_intr = bcm63xx_config_intr,
  78. .driver = { .owner = THIS_MODULE },
  79. } };
  80. module_phy_driver(bcm63xx_driver);
  81. static struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {
  82. { 0x00406000, 0xfffffc00 },
  83. { 0x002bdc00, 0xfffffc00 },
  84. { }
  85. };
  86. MODULE_DEVICE_TABLE(mdio, bcm63xx_tbl);