et1011c.c 2.7 KB

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  1. /*
  2. * drivers/net/phy/et1011c.c
  3. *
  4. * Driver for LSI ET1011C PHYs
  5. *
  6. * Author: Chaithrika U S
  7. *
  8. * Copyright (c) 2008 Texas Instruments
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/mm.h>
  28. #include <linux/module.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/phy.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <asm/irq.h>
  35. #define ET1011C_STATUS_REG (0x1A)
  36. #define ET1011C_CONFIG_REG (0x16)
  37. #define ET1011C_SPEED_MASK (0x0300)
  38. #define ET1011C_GIGABIT_SPEED (0x0200)
  39. #define ET1011C_TX_FIFO_MASK (0x3000)
  40. #define ET1011C_TX_FIFO_DEPTH_8 (0x0000)
  41. #define ET1011C_TX_FIFO_DEPTH_16 (0x1000)
  42. #define ET1011C_INTERFACE_MASK (0x0007)
  43. #define ET1011C_GMII_INTERFACE (0x0002)
  44. #define ET1011C_SYS_CLK_EN (0x01 << 4)
  45. MODULE_DESCRIPTION("LSI ET1011C PHY driver");
  46. MODULE_AUTHOR("Chaithrika U S");
  47. MODULE_LICENSE("GPL");
  48. static int et1011c_config_aneg(struct phy_device *phydev)
  49. {
  50. int ctl = 0;
  51. ctl = phy_read(phydev, MII_BMCR);
  52. if (ctl < 0)
  53. return ctl;
  54. ctl &= ~(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 |
  55. BMCR_ANENABLE);
  56. /* First clear the PHY */
  57. phy_write(phydev, MII_BMCR, ctl | BMCR_RESET);
  58. return genphy_config_aneg(phydev);
  59. }
  60. static int et1011c_read_status(struct phy_device *phydev)
  61. {
  62. int ret;
  63. u32 val;
  64. static int speed;
  65. ret = genphy_read_status(phydev);
  66. if (speed != phydev->speed) {
  67. speed = phydev->speed;
  68. val = phy_read(phydev, ET1011C_STATUS_REG);
  69. if ((val & ET1011C_SPEED_MASK) ==
  70. ET1011C_GIGABIT_SPEED) {
  71. val = phy_read(phydev, ET1011C_CONFIG_REG);
  72. val &= ~ET1011C_TX_FIFO_MASK;
  73. phy_write(phydev, ET1011C_CONFIG_REG, val\
  74. | ET1011C_GMII_INTERFACE\
  75. | ET1011C_SYS_CLK_EN\
  76. | ET1011C_TX_FIFO_DEPTH_16);
  77. }
  78. }
  79. return ret;
  80. }
  81. static struct phy_driver et1011c_driver[] = { {
  82. .phy_id = 0x0282f014,
  83. .name = "ET1011C",
  84. .phy_id_mask = 0xfffffff0,
  85. .features = (PHY_BASIC_FEATURES | SUPPORTED_1000baseT_Full),
  86. .flags = PHY_POLL,
  87. .config_aneg = et1011c_config_aneg,
  88. .read_status = et1011c_read_status,
  89. .driver = { .owner = THIS_MODULE,},
  90. } };
  91. module_phy_driver(et1011c_driver);
  92. static struct mdio_device_id __maybe_unused et1011c_tbl[] = {
  93. { 0x0282f014, 0xfffffff0 },
  94. { }
  95. };
  96. MODULE_DEVICE_TABLE(mdio, et1011c_tbl);