lxt.c 7.1 KB

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  1. /*
  2. * drivers/net/phy/lxt.c
  3. *
  4. * Driver for Intel LXT PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/string.h>
  18. #include <linux/errno.h>
  19. #include <linux/unistd.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/init.h>
  22. #include <linux/delay.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/skbuff.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/mm.h>
  28. #include <linux/module.h>
  29. #include <linux/mii.h>
  30. #include <linux/ethtool.h>
  31. #include <linux/phy.h>
  32. #include <asm/io.h>
  33. #include <asm/irq.h>
  34. #include <asm/uaccess.h>
  35. /* The Level one LXT970 is used by many boards */
  36. #define MII_LXT970_IER 17 /* Interrupt Enable Register */
  37. #define MII_LXT970_IER_IEN 0x0002
  38. #define MII_LXT970_ISR 18 /* Interrupt Status Register */
  39. #define MII_LXT970_CONFIG 19 /* Configuration Register */
  40. /* ------------------------------------------------------------------------- */
  41. /* The Level one LXT971 is used on some of my custom boards */
  42. /* register definitions for the 971 */
  43. #define MII_LXT971_IER 18 /* Interrupt Enable Register */
  44. #define MII_LXT971_IER_IEN 0x00f2
  45. #define MII_LXT971_ISR 19 /* Interrupt Status Register */
  46. /* register definitions for the 973 */
  47. #define MII_LXT973_PCR 16 /* Port Configuration Register */
  48. #define PCR_FIBER_SELECT 1
  49. MODULE_DESCRIPTION("Intel LXT PHY driver");
  50. MODULE_AUTHOR("Andy Fleming");
  51. MODULE_LICENSE("GPL");
  52. static int lxt970_ack_interrupt(struct phy_device *phydev)
  53. {
  54. int err;
  55. err = phy_read(phydev, MII_BMSR);
  56. if (err < 0)
  57. return err;
  58. err = phy_read(phydev, MII_LXT970_ISR);
  59. if (err < 0)
  60. return err;
  61. return 0;
  62. }
  63. static int lxt970_config_intr(struct phy_device *phydev)
  64. {
  65. int err;
  66. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  67. err = phy_write(phydev, MII_LXT970_IER, MII_LXT970_IER_IEN);
  68. else
  69. err = phy_write(phydev, MII_LXT970_IER, 0);
  70. return err;
  71. }
  72. static int lxt970_config_init(struct phy_device *phydev)
  73. {
  74. int err;
  75. err = phy_write(phydev, MII_LXT970_CONFIG, 0);
  76. return err;
  77. }
  78. static int lxt971_ack_interrupt(struct phy_device *phydev)
  79. {
  80. int err = phy_read(phydev, MII_LXT971_ISR);
  81. if (err < 0)
  82. return err;
  83. return 0;
  84. }
  85. static int lxt971_config_intr(struct phy_device *phydev)
  86. {
  87. int err;
  88. if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
  89. err = phy_write(phydev, MII_LXT971_IER, MII_LXT971_IER_IEN);
  90. else
  91. err = phy_write(phydev, MII_LXT971_IER, 0);
  92. return err;
  93. }
  94. /*
  95. * A2 version of LXT973 chip has an ERRATA: it randomly return the contents
  96. * of the previous even register when you read a odd register regularly
  97. */
  98. static int lxt973a2_update_link(struct phy_device *phydev)
  99. {
  100. int status;
  101. int control;
  102. int retry = 8; /* we try 8 times */
  103. /* Do a fake read */
  104. status = phy_read(phydev, MII_BMSR);
  105. if (status < 0)
  106. return status;
  107. control = phy_read(phydev, MII_BMCR);
  108. if (control < 0)
  109. return control;
  110. do {
  111. /* Read link and autonegotiation status */
  112. status = phy_read(phydev, MII_BMSR);
  113. } while (status >= 0 && retry-- && status == control);
  114. if (status < 0)
  115. return status;
  116. if ((status & BMSR_LSTATUS) == 0)
  117. phydev->link = 0;
  118. else
  119. phydev->link = 1;
  120. return 0;
  121. }
  122. static int lxt973a2_read_status(struct phy_device *phydev)
  123. {
  124. int adv;
  125. int err;
  126. int lpa;
  127. int lpagb = 0;
  128. /* Update the link, but return if there was an error */
  129. err = lxt973a2_update_link(phydev);
  130. if (err)
  131. return err;
  132. if (AUTONEG_ENABLE == phydev->autoneg) {
  133. int retry = 1;
  134. adv = phy_read(phydev, MII_ADVERTISE);
  135. if (adv < 0)
  136. return adv;
  137. do {
  138. lpa = phy_read(phydev, MII_LPA);
  139. if (lpa < 0)
  140. return lpa;
  141. /* If both registers are equal, it is suspect but not
  142. * impossible, hence a new try
  143. */
  144. } while (lpa == adv && retry--);
  145. lpa &= adv;
  146. phydev->speed = SPEED_10;
  147. phydev->duplex = DUPLEX_HALF;
  148. phydev->pause = phydev->asym_pause = 0;
  149. if (lpagb & (LPA_1000FULL | LPA_1000HALF)) {
  150. phydev->speed = SPEED_1000;
  151. if (lpagb & LPA_1000FULL)
  152. phydev->duplex = DUPLEX_FULL;
  153. } else if (lpa & (LPA_100FULL | LPA_100HALF)) {
  154. phydev->speed = SPEED_100;
  155. if (lpa & LPA_100FULL)
  156. phydev->duplex = DUPLEX_FULL;
  157. } else {
  158. if (lpa & LPA_10FULL)
  159. phydev->duplex = DUPLEX_FULL;
  160. }
  161. if (phydev->duplex == DUPLEX_FULL) {
  162. phydev->pause = lpa & LPA_PAUSE_CAP ? 1 : 0;
  163. phydev->asym_pause = lpa & LPA_PAUSE_ASYM ? 1 : 0;
  164. }
  165. } else {
  166. int bmcr = phy_read(phydev, MII_BMCR);
  167. if (bmcr < 0)
  168. return bmcr;
  169. if (bmcr & BMCR_FULLDPLX)
  170. phydev->duplex = DUPLEX_FULL;
  171. else
  172. phydev->duplex = DUPLEX_HALF;
  173. if (bmcr & BMCR_SPEED1000)
  174. phydev->speed = SPEED_1000;
  175. else if (bmcr & BMCR_SPEED100)
  176. phydev->speed = SPEED_100;
  177. else
  178. phydev->speed = SPEED_10;
  179. phydev->pause = phydev->asym_pause = 0;
  180. }
  181. return 0;
  182. }
  183. static int lxt973_probe(struct phy_device *phydev)
  184. {
  185. int val = phy_read(phydev, MII_LXT973_PCR);
  186. if (val & PCR_FIBER_SELECT) {
  187. /*
  188. * If fiber is selected, then the only correct setting
  189. * is 100Mbps, full duplex, and auto negotiation off.
  190. */
  191. val = phy_read(phydev, MII_BMCR);
  192. val |= (BMCR_SPEED100 | BMCR_FULLDPLX);
  193. val &= ~BMCR_ANENABLE;
  194. phy_write(phydev, MII_BMCR, val);
  195. /* Remember that the port is in fiber mode. */
  196. phydev->priv = lxt973_probe;
  197. } else {
  198. phydev->priv = NULL;
  199. }
  200. return 0;
  201. }
  202. static int lxt973_config_aneg(struct phy_device *phydev)
  203. {
  204. /* Do nothing if port is in fiber mode. */
  205. return phydev->priv ? 0 : genphy_config_aneg(phydev);
  206. }
  207. static struct phy_driver lxt97x_driver[] = {
  208. {
  209. .phy_id = 0x78100000,
  210. .name = "LXT970",
  211. .phy_id_mask = 0xfffffff0,
  212. .features = PHY_BASIC_FEATURES,
  213. .flags = PHY_HAS_INTERRUPT,
  214. .config_init = lxt970_config_init,
  215. .config_aneg = genphy_config_aneg,
  216. .read_status = genphy_read_status,
  217. .ack_interrupt = lxt970_ack_interrupt,
  218. .config_intr = lxt970_config_intr,
  219. .driver = { .owner = THIS_MODULE,},
  220. }, {
  221. .phy_id = 0x001378e0,
  222. .name = "LXT971",
  223. .phy_id_mask = 0xfffffff0,
  224. .features = PHY_BASIC_FEATURES,
  225. .flags = PHY_HAS_INTERRUPT,
  226. .config_aneg = genphy_config_aneg,
  227. .read_status = genphy_read_status,
  228. .ack_interrupt = lxt971_ack_interrupt,
  229. .config_intr = lxt971_config_intr,
  230. .driver = { .owner = THIS_MODULE,},
  231. }, {
  232. .phy_id = 0x00137a10,
  233. .name = "LXT973-A2",
  234. .phy_id_mask = 0xffffffff,
  235. .features = PHY_BASIC_FEATURES,
  236. .flags = 0,
  237. .probe = lxt973_probe,
  238. .config_aneg = lxt973_config_aneg,
  239. .read_status = lxt973a2_read_status,
  240. .driver = { .owner = THIS_MODULE,},
  241. }, {
  242. .phy_id = 0x00137a10,
  243. .name = "LXT973",
  244. .phy_id_mask = 0xfffffff0,
  245. .features = PHY_BASIC_FEATURES,
  246. .flags = 0,
  247. .probe = lxt973_probe,
  248. .config_aneg = lxt973_config_aneg,
  249. .read_status = genphy_read_status,
  250. .driver = { .owner = THIS_MODULE,},
  251. } };
  252. module_phy_driver(lxt97x_driver);
  253. static struct mdio_device_id __maybe_unused lxt_tbl[] = {
  254. { 0x78100000, 0xfffffff0 },
  255. { 0x001378e0, 0xfffffff0 },
  256. { 0x00137a10, 0xfffffff0 },
  257. { }
  258. };
  259. MODULE_DEVICE_TABLE(mdio, lxt_tbl);