txrx.c 49 KB

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  1. /*
  2. * Copyright (c) 2012-2015 Qualcomm Atheros, Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/etherdevice.h>
  17. #include <net/ieee80211_radiotap.h>
  18. #include <linux/if_arp.h>
  19. #include <linux/moduleparam.h>
  20. #include <linux/ip.h>
  21. #include <linux/ipv6.h>
  22. #include <net/ipv6.h>
  23. #include <linux/prefetch.h>
  24. #include "wil6210.h"
  25. #include "wmi.h"
  26. #include "txrx.h"
  27. #include "trace.h"
  28. static bool rtap_include_phy_info;
  29. module_param(rtap_include_phy_info, bool, S_IRUGO);
  30. MODULE_PARM_DESC(rtap_include_phy_info,
  31. " Include PHY info in the radiotap header, default - no");
  32. bool rx_align_2;
  33. module_param(rx_align_2, bool, S_IRUGO);
  34. MODULE_PARM_DESC(rx_align_2, " align Rx buffers on 4*n+2, default - no");
  35. static inline uint wil_rx_snaplen(void)
  36. {
  37. return rx_align_2 ? 6 : 0;
  38. }
  39. static inline int wil_vring_is_empty(struct vring *vring)
  40. {
  41. return vring->swhead == vring->swtail;
  42. }
  43. static inline u32 wil_vring_next_tail(struct vring *vring)
  44. {
  45. return (vring->swtail + 1) % vring->size;
  46. }
  47. static inline void wil_vring_advance_head(struct vring *vring, int n)
  48. {
  49. vring->swhead = (vring->swhead + n) % vring->size;
  50. }
  51. static inline int wil_vring_is_full(struct vring *vring)
  52. {
  53. return wil_vring_next_tail(vring) == vring->swhead;
  54. }
  55. /* Used space in Tx Vring */
  56. static inline int wil_vring_used_tx(struct vring *vring)
  57. {
  58. u32 swhead = vring->swhead;
  59. u32 swtail = vring->swtail;
  60. return (vring->size + swhead - swtail) % vring->size;
  61. }
  62. /* Available space in Tx Vring */
  63. static inline int wil_vring_avail_tx(struct vring *vring)
  64. {
  65. return vring->size - wil_vring_used_tx(vring) - 1;
  66. }
  67. /* wil_vring_wmark_low - low watermark for available descriptor space */
  68. static inline int wil_vring_wmark_low(struct vring *vring)
  69. {
  70. return vring->size/8;
  71. }
  72. /* wil_vring_wmark_high - high watermark for available descriptor space */
  73. static inline int wil_vring_wmark_high(struct vring *vring)
  74. {
  75. return vring->size/4;
  76. }
  77. /* wil_val_in_range - check if value in [min,max) */
  78. static inline bool wil_val_in_range(int val, int min, int max)
  79. {
  80. return val >= min && val < max;
  81. }
  82. static int wil_vring_alloc(struct wil6210_priv *wil, struct vring *vring)
  83. {
  84. struct device *dev = wil_to_dev(wil);
  85. size_t sz = vring->size * sizeof(vring->va[0]);
  86. uint i;
  87. wil_dbg_misc(wil, "%s()\n", __func__);
  88. BUILD_BUG_ON(sizeof(vring->va[0]) != 32);
  89. vring->swhead = 0;
  90. vring->swtail = 0;
  91. vring->ctx = kcalloc(vring->size, sizeof(vring->ctx[0]), GFP_KERNEL);
  92. if (!vring->ctx) {
  93. vring->va = NULL;
  94. return -ENOMEM;
  95. }
  96. /* vring->va should be aligned on its size rounded up to power of 2
  97. * This is granted by the dma_alloc_coherent
  98. */
  99. vring->va = dma_alloc_coherent(dev, sz, &vring->pa, GFP_KERNEL);
  100. if (!vring->va) {
  101. kfree(vring->ctx);
  102. vring->ctx = NULL;
  103. return -ENOMEM;
  104. }
  105. /* initially, all descriptors are SW owned
  106. * For Tx and Rx, ownership bit is at the same location, thus
  107. * we can use any
  108. */
  109. for (i = 0; i < vring->size; i++) {
  110. volatile struct vring_tx_desc *_d = &vring->va[i].tx;
  111. _d->dma.status = TX_DMA_STATUS_DU;
  112. }
  113. wil_dbg_misc(wil, "vring[%d] 0x%p:%pad 0x%p\n", vring->size,
  114. vring->va, &vring->pa, vring->ctx);
  115. return 0;
  116. }
  117. static void wil_txdesc_unmap(struct device *dev, struct vring_tx_desc *d,
  118. struct wil_ctx *ctx)
  119. {
  120. dma_addr_t pa = wil_desc_addr(&d->dma.addr);
  121. u16 dmalen = le16_to_cpu(d->dma.length);
  122. switch (ctx->mapped_as) {
  123. case wil_mapped_as_single:
  124. dma_unmap_single(dev, pa, dmalen, DMA_TO_DEVICE);
  125. break;
  126. case wil_mapped_as_page:
  127. dma_unmap_page(dev, pa, dmalen, DMA_TO_DEVICE);
  128. break;
  129. default:
  130. break;
  131. }
  132. }
  133. static void wil_vring_free(struct wil6210_priv *wil, struct vring *vring,
  134. int tx)
  135. {
  136. struct device *dev = wil_to_dev(wil);
  137. size_t sz = vring->size * sizeof(vring->va[0]);
  138. if (tx) {
  139. int vring_index = vring - wil->vring_tx;
  140. wil_dbg_misc(wil, "free Tx vring %d [%d] 0x%p:%pad 0x%p\n",
  141. vring_index, vring->size, vring->va,
  142. &vring->pa, vring->ctx);
  143. } else {
  144. wil_dbg_misc(wil, "free Rx vring [%d] 0x%p:%pad 0x%p\n",
  145. vring->size, vring->va,
  146. &vring->pa, vring->ctx);
  147. }
  148. while (!wil_vring_is_empty(vring)) {
  149. dma_addr_t pa;
  150. u16 dmalen;
  151. struct wil_ctx *ctx;
  152. if (tx) {
  153. struct vring_tx_desc dd, *d = &dd;
  154. volatile struct vring_tx_desc *_d =
  155. &vring->va[vring->swtail].tx;
  156. ctx = &vring->ctx[vring->swtail];
  157. *d = *_d;
  158. wil_txdesc_unmap(dev, d, ctx);
  159. if (ctx->skb)
  160. dev_kfree_skb_any(ctx->skb);
  161. vring->swtail = wil_vring_next_tail(vring);
  162. } else { /* rx */
  163. struct vring_rx_desc dd, *d = &dd;
  164. volatile struct vring_rx_desc *_d =
  165. &vring->va[vring->swhead].rx;
  166. ctx = &vring->ctx[vring->swhead];
  167. *d = *_d;
  168. pa = wil_desc_addr(&d->dma.addr);
  169. dmalen = le16_to_cpu(d->dma.length);
  170. dma_unmap_single(dev, pa, dmalen, DMA_FROM_DEVICE);
  171. kfree_skb(ctx->skb);
  172. wil_vring_advance_head(vring, 1);
  173. }
  174. }
  175. dma_free_coherent(dev, sz, (void *)vring->va, vring->pa);
  176. kfree(vring->ctx);
  177. vring->pa = 0;
  178. vring->va = NULL;
  179. vring->ctx = NULL;
  180. }
  181. /**
  182. * Allocate one skb for Rx VRING
  183. *
  184. * Safe to call from IRQ
  185. */
  186. static int wil_vring_alloc_skb(struct wil6210_priv *wil, struct vring *vring,
  187. u32 i, int headroom)
  188. {
  189. struct device *dev = wil_to_dev(wil);
  190. unsigned int sz = mtu_max + ETH_HLEN + wil_rx_snaplen();
  191. struct vring_rx_desc dd, *d = &dd;
  192. volatile struct vring_rx_desc *_d = &vring->va[i].rx;
  193. dma_addr_t pa;
  194. struct sk_buff *skb = dev_alloc_skb(sz + headroom);
  195. if (unlikely(!skb))
  196. return -ENOMEM;
  197. skb_reserve(skb, headroom);
  198. skb_put(skb, sz);
  199. pa = dma_map_single(dev, skb->data, skb->len, DMA_FROM_DEVICE);
  200. if (unlikely(dma_mapping_error(dev, pa))) {
  201. kfree_skb(skb);
  202. return -ENOMEM;
  203. }
  204. d->dma.d0 = RX_DMA_D0_CMD_DMA_RT | RX_DMA_D0_CMD_DMA_IT;
  205. wil_desc_addr_set(&d->dma.addr, pa);
  206. /* ip_length don't care */
  207. /* b11 don't care */
  208. /* error don't care */
  209. d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
  210. d->dma.length = cpu_to_le16(sz);
  211. *_d = *d;
  212. vring->ctx[i].skb = skb;
  213. return 0;
  214. }
  215. /**
  216. * Adds radiotap header
  217. *
  218. * Any error indicated as "Bad FCS"
  219. *
  220. * Vendor data for 04:ce:14-1 (Wilocity-1) consists of:
  221. * - Rx descriptor: 32 bytes
  222. * - Phy info
  223. */
  224. static void wil_rx_add_radiotap_header(struct wil6210_priv *wil,
  225. struct sk_buff *skb)
  226. {
  227. struct wireless_dev *wdev = wil->wdev;
  228. struct wil6210_rtap {
  229. struct ieee80211_radiotap_header rthdr;
  230. /* fields should be in the order of bits in rthdr.it_present */
  231. /* flags */
  232. u8 flags;
  233. /* channel */
  234. __le16 chnl_freq __aligned(2);
  235. __le16 chnl_flags;
  236. /* MCS */
  237. u8 mcs_present;
  238. u8 mcs_flags;
  239. u8 mcs_index;
  240. } __packed;
  241. struct wil6210_rtap_vendor {
  242. struct wil6210_rtap rtap;
  243. /* vendor */
  244. u8 vendor_oui[3] __aligned(2);
  245. u8 vendor_ns;
  246. __le16 vendor_skip;
  247. u8 vendor_data[0];
  248. } __packed;
  249. struct vring_rx_desc *d = wil_skb_rxdesc(skb);
  250. struct wil6210_rtap_vendor *rtap_vendor;
  251. int rtap_len = sizeof(struct wil6210_rtap);
  252. int phy_length = 0; /* phy info header size, bytes */
  253. static char phy_data[128];
  254. struct ieee80211_channel *ch = wdev->preset_chandef.chan;
  255. if (rtap_include_phy_info) {
  256. rtap_len = sizeof(*rtap_vendor) + sizeof(*d);
  257. /* calculate additional length */
  258. if (d->dma.status & RX_DMA_STATUS_PHY_INFO) {
  259. /**
  260. * PHY info starts from 8-byte boundary
  261. * there are 8-byte lines, last line may be partially
  262. * written (HW bug), thus FW configures for last line
  263. * to be excessive. Driver skips this last line.
  264. */
  265. int len = min_t(int, 8 + sizeof(phy_data),
  266. wil_rxdesc_phy_length(d));
  267. if (len > 8) {
  268. void *p = skb_tail_pointer(skb);
  269. void *pa = PTR_ALIGN(p, 8);
  270. if (skb_tailroom(skb) >= len + (pa - p)) {
  271. phy_length = len - 8;
  272. memcpy(phy_data, pa, phy_length);
  273. }
  274. }
  275. }
  276. rtap_len += phy_length;
  277. }
  278. if (skb_headroom(skb) < rtap_len &&
  279. pskb_expand_head(skb, rtap_len, 0, GFP_ATOMIC)) {
  280. wil_err(wil, "Unable to expand headrom to %d\n", rtap_len);
  281. return;
  282. }
  283. rtap_vendor = (void *)skb_push(skb, rtap_len);
  284. memset(rtap_vendor, 0, rtap_len);
  285. rtap_vendor->rtap.rthdr.it_version = PKTHDR_RADIOTAP_VERSION;
  286. rtap_vendor->rtap.rthdr.it_len = cpu_to_le16(rtap_len);
  287. rtap_vendor->rtap.rthdr.it_present = cpu_to_le32(
  288. (1 << IEEE80211_RADIOTAP_FLAGS) |
  289. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  290. (1 << IEEE80211_RADIOTAP_MCS));
  291. if (d->dma.status & RX_DMA_STATUS_ERROR)
  292. rtap_vendor->rtap.flags |= IEEE80211_RADIOTAP_F_BADFCS;
  293. rtap_vendor->rtap.chnl_freq = cpu_to_le16(ch ? ch->center_freq : 58320);
  294. rtap_vendor->rtap.chnl_flags = cpu_to_le16(0);
  295. rtap_vendor->rtap.mcs_present = IEEE80211_RADIOTAP_MCS_HAVE_MCS;
  296. rtap_vendor->rtap.mcs_flags = 0;
  297. rtap_vendor->rtap.mcs_index = wil_rxdesc_mcs(d);
  298. if (rtap_include_phy_info) {
  299. rtap_vendor->rtap.rthdr.it_present |= cpu_to_le32(1 <<
  300. IEEE80211_RADIOTAP_VENDOR_NAMESPACE);
  301. /* OUI for Wilocity 04:ce:14 */
  302. rtap_vendor->vendor_oui[0] = 0x04;
  303. rtap_vendor->vendor_oui[1] = 0xce;
  304. rtap_vendor->vendor_oui[2] = 0x14;
  305. rtap_vendor->vendor_ns = 1;
  306. /* Rx descriptor + PHY data */
  307. rtap_vendor->vendor_skip = cpu_to_le16(sizeof(*d) +
  308. phy_length);
  309. memcpy(rtap_vendor->vendor_data, (void *)d, sizeof(*d));
  310. memcpy(rtap_vendor->vendor_data + sizeof(*d), phy_data,
  311. phy_length);
  312. }
  313. }
  314. /* similar to ieee80211_ version, but FC contain only 1-st byte */
  315. static inline int wil_is_back_req(u8 fc)
  316. {
  317. return (fc & (IEEE80211_FCTL_FTYPE | IEEE80211_FCTL_STYPE)) ==
  318. (IEEE80211_FTYPE_CTL | IEEE80211_STYPE_BACK_REQ);
  319. }
  320. /**
  321. * reap 1 frame from @swhead
  322. *
  323. * Rx descriptor copied to skb->cb
  324. *
  325. * Safe to call from IRQ
  326. */
  327. static struct sk_buff *wil_vring_reap_rx(struct wil6210_priv *wil,
  328. struct vring *vring)
  329. {
  330. struct device *dev = wil_to_dev(wil);
  331. struct net_device *ndev = wil_to_ndev(wil);
  332. volatile struct vring_rx_desc *_d;
  333. struct vring_rx_desc *d;
  334. struct sk_buff *skb;
  335. dma_addr_t pa;
  336. unsigned int snaplen = wil_rx_snaplen();
  337. unsigned int sz = mtu_max + ETH_HLEN + snaplen;
  338. u16 dmalen;
  339. u8 ftype;
  340. int cid;
  341. int i;
  342. struct wil_net_stats *stats;
  343. BUILD_BUG_ON(sizeof(struct vring_rx_desc) > sizeof(skb->cb));
  344. again:
  345. if (unlikely(wil_vring_is_empty(vring)))
  346. return NULL;
  347. i = (int)vring->swhead;
  348. _d = &vring->va[i].rx;
  349. if (unlikely(!(_d->dma.status & RX_DMA_STATUS_DU))) {
  350. /* it is not error, we just reached end of Rx done area */
  351. return NULL;
  352. }
  353. skb = vring->ctx[i].skb;
  354. vring->ctx[i].skb = NULL;
  355. wil_vring_advance_head(vring, 1);
  356. if (!skb) {
  357. wil_err(wil, "No Rx skb at [%d]\n", i);
  358. goto again;
  359. }
  360. d = wil_skb_rxdesc(skb);
  361. *d = *_d;
  362. pa = wil_desc_addr(&d->dma.addr);
  363. dma_unmap_single(dev, pa, sz, DMA_FROM_DEVICE);
  364. dmalen = le16_to_cpu(d->dma.length);
  365. trace_wil6210_rx(i, d);
  366. wil_dbg_txrx(wil, "Rx[%3d] : %d bytes\n", i, dmalen);
  367. wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4,
  368. (const void *)d, sizeof(*d), false);
  369. cid = wil_rxdesc_cid(d);
  370. stats = &wil->sta[cid].stats;
  371. if (unlikely(dmalen > sz)) {
  372. wil_err(wil, "Rx size too large: %d bytes!\n", dmalen);
  373. stats->rx_large_frame++;
  374. kfree_skb(skb);
  375. goto again;
  376. }
  377. skb_trim(skb, dmalen);
  378. prefetch(skb->data);
  379. wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
  380. skb->data, skb_headlen(skb), false);
  381. stats->last_mcs_rx = wil_rxdesc_mcs(d);
  382. if (stats->last_mcs_rx < ARRAY_SIZE(stats->rx_per_mcs))
  383. stats->rx_per_mcs[stats->last_mcs_rx]++;
  384. /* use radiotap header only if required */
  385. if (ndev->type == ARPHRD_IEEE80211_RADIOTAP)
  386. wil_rx_add_radiotap_header(wil, skb);
  387. /* no extra checks if in sniffer mode */
  388. if (ndev->type != ARPHRD_ETHER)
  389. return skb;
  390. /* Non-data frames may be delivered through Rx DMA channel (ex: BAR)
  391. * Driver should recognize it by frame type, that is found
  392. * in Rx descriptor. If type is not data, it is 802.11 frame as is
  393. */
  394. ftype = wil_rxdesc_ftype(d) << 2;
  395. if (unlikely(ftype != IEEE80211_FTYPE_DATA)) {
  396. u8 fc1 = wil_rxdesc_fc1(d);
  397. int mid = wil_rxdesc_mid(d);
  398. int tid = wil_rxdesc_tid(d);
  399. u16 seq = wil_rxdesc_seq(d);
  400. wil_dbg_txrx(wil,
  401. "Non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
  402. fc1, mid, cid, tid, seq);
  403. stats->rx_non_data_frame++;
  404. if (wil_is_back_req(fc1)) {
  405. wil_dbg_txrx(wil,
  406. "BAR: MID %d CID %d TID %d Seq 0x%03x\n",
  407. mid, cid, tid, seq);
  408. wil_rx_bar(wil, cid, tid, seq);
  409. } else {
  410. /* print again all info. One can enable only this
  411. * without overhead for printing every Rx frame
  412. */
  413. wil_dbg_txrx(wil,
  414. "Unhandled non-data frame FC[7:0] 0x%02x MID %d CID %d TID %d Seq 0x%03x\n",
  415. fc1, mid, cid, tid, seq);
  416. wil_hex_dump_txrx("RxD ", DUMP_PREFIX_NONE, 32, 4,
  417. (const void *)d, sizeof(*d), false);
  418. wil_hex_dump_txrx("Rx ", DUMP_PREFIX_OFFSET, 16, 1,
  419. skb->data, skb_headlen(skb), false);
  420. }
  421. kfree_skb(skb);
  422. goto again;
  423. }
  424. if (unlikely(skb->len < ETH_HLEN + snaplen)) {
  425. wil_err(wil, "Short frame, len = %d\n", skb->len);
  426. stats->rx_short_frame++;
  427. kfree_skb(skb);
  428. goto again;
  429. }
  430. /* L4 IDENT is on when HW calculated checksum, check status
  431. * and in case of error drop the packet
  432. * higher stack layers will handle retransmission (if required)
  433. */
  434. if (likely(d->dma.status & RX_DMA_STATUS_L4I)) {
  435. /* L4 protocol identified, csum calculated */
  436. if (likely((d->dma.error & RX_DMA_ERROR_L4_ERR) == 0))
  437. skb->ip_summed = CHECKSUM_UNNECESSARY;
  438. /* If HW reports bad checksum, let IP stack re-check it
  439. * For example, HW don't understand Microsoft IP stack that
  440. * mis-calculates TCP checksum - if it should be 0x0,
  441. * it writes 0xffff in violation of RFC 1624
  442. */
  443. }
  444. if (snaplen) {
  445. /* Packet layout
  446. * +-------+-------+---------+------------+------+
  447. * | SA(6) | DA(6) | SNAP(6) | ETHTYPE(2) | DATA |
  448. * +-------+-------+---------+------------+------+
  449. * Need to remove SNAP, shifting SA and DA forward
  450. */
  451. memmove(skb->data + snaplen, skb->data, 2 * ETH_ALEN);
  452. skb_pull(skb, snaplen);
  453. }
  454. return skb;
  455. }
  456. /**
  457. * allocate and fill up to @count buffers in rx ring
  458. * buffers posted at @swtail
  459. */
  460. static int wil_rx_refill(struct wil6210_priv *wil, int count)
  461. {
  462. struct net_device *ndev = wil_to_ndev(wil);
  463. struct vring *v = &wil->vring_rx;
  464. u32 next_tail;
  465. int rc = 0;
  466. int headroom = ndev->type == ARPHRD_IEEE80211_RADIOTAP ?
  467. WIL6210_RTAP_SIZE : 0;
  468. for (; next_tail = wil_vring_next_tail(v),
  469. (next_tail != v->swhead) && (count-- > 0);
  470. v->swtail = next_tail) {
  471. rc = wil_vring_alloc_skb(wil, v, v->swtail, headroom);
  472. if (unlikely(rc)) {
  473. wil_err(wil, "Error %d in wil_rx_refill[%d]\n",
  474. rc, v->swtail);
  475. break;
  476. }
  477. }
  478. wil_w(wil, v->hwtail, v->swtail);
  479. return rc;
  480. }
  481. /*
  482. * Pass Rx packet to the netif. Update statistics.
  483. * Called in softirq context (NAPI poll).
  484. */
  485. void wil_netif_rx_any(struct sk_buff *skb, struct net_device *ndev)
  486. {
  487. gro_result_t rc = GRO_NORMAL;
  488. struct wil6210_priv *wil = ndev_to_wil(ndev);
  489. struct wireless_dev *wdev = wil_to_wdev(wil);
  490. unsigned int len = skb->len;
  491. struct vring_rx_desc *d = wil_skb_rxdesc(skb);
  492. int cid = wil_rxdesc_cid(d); /* always 0..7, no need to check */
  493. struct ethhdr *eth = (void *)skb->data;
  494. /* here looking for DA, not A1, thus Rxdesc's 'mcast' indication
  495. * is not suitable, need to look at data
  496. */
  497. int mcast = is_multicast_ether_addr(eth->h_dest);
  498. struct wil_net_stats *stats = &wil->sta[cid].stats;
  499. struct sk_buff *xmit_skb = NULL;
  500. static const char * const gro_res_str[] = {
  501. [GRO_MERGED] = "GRO_MERGED",
  502. [GRO_MERGED_FREE] = "GRO_MERGED_FREE",
  503. [GRO_HELD] = "GRO_HELD",
  504. [GRO_NORMAL] = "GRO_NORMAL",
  505. [GRO_DROP] = "GRO_DROP",
  506. };
  507. if (ndev->features & NETIF_F_RXHASH)
  508. /* fake L4 to ensure it won't be re-calculated later
  509. * set hash to any non-zero value to activate rps
  510. * mechanism, core will be chosen according
  511. * to user-level rps configuration.
  512. */
  513. skb_set_hash(skb, 1, PKT_HASH_TYPE_L4);
  514. skb_orphan(skb);
  515. if (wdev->iftype == NL80211_IFTYPE_AP && !wil->ap_isolate) {
  516. if (mcast) {
  517. /* send multicast frames both to higher layers in
  518. * local net stack and back to the wireless medium
  519. */
  520. xmit_skb = skb_copy(skb, GFP_ATOMIC);
  521. } else {
  522. int xmit_cid = wil_find_cid(wil, eth->h_dest);
  523. if (xmit_cid >= 0) {
  524. /* The destination station is associated to
  525. * this AP (in this VLAN), so send the frame
  526. * directly to it and do not pass it to local
  527. * net stack.
  528. */
  529. xmit_skb = skb;
  530. skb = NULL;
  531. }
  532. }
  533. }
  534. if (xmit_skb) {
  535. /* Send to wireless media and increase priority by 256 to
  536. * keep the received priority instead of reclassifying
  537. * the frame (see cfg80211_classify8021d).
  538. */
  539. xmit_skb->dev = ndev;
  540. xmit_skb->priority += 256;
  541. xmit_skb->protocol = htons(ETH_P_802_3);
  542. skb_reset_network_header(xmit_skb);
  543. skb_reset_mac_header(xmit_skb);
  544. wil_dbg_txrx(wil, "Rx -> Tx %d bytes\n", len);
  545. dev_queue_xmit(xmit_skb);
  546. }
  547. if (skb) { /* deliver to local stack */
  548. skb->protocol = eth_type_trans(skb, ndev);
  549. rc = napi_gro_receive(&wil->napi_rx, skb);
  550. wil_dbg_txrx(wil, "Rx complete %d bytes => %s\n",
  551. len, gro_res_str[rc]);
  552. }
  553. /* statistics. rc set to GRO_NORMAL for AP bridging */
  554. if (unlikely(rc == GRO_DROP)) {
  555. ndev->stats.rx_dropped++;
  556. stats->rx_dropped++;
  557. wil_dbg_txrx(wil, "Rx drop %d bytes\n", len);
  558. } else {
  559. ndev->stats.rx_packets++;
  560. stats->rx_packets++;
  561. ndev->stats.rx_bytes += len;
  562. stats->rx_bytes += len;
  563. if (mcast)
  564. ndev->stats.multicast++;
  565. }
  566. }
  567. /**
  568. * Proceed all completed skb's from Rx VRING
  569. *
  570. * Safe to call from NAPI poll, i.e. softirq with interrupts enabled
  571. */
  572. void wil_rx_handle(struct wil6210_priv *wil, int *quota)
  573. {
  574. struct net_device *ndev = wil_to_ndev(wil);
  575. struct vring *v = &wil->vring_rx;
  576. struct sk_buff *skb;
  577. if (unlikely(!v->va)) {
  578. wil_err(wil, "Rx IRQ while Rx not yet initialized\n");
  579. return;
  580. }
  581. wil_dbg_txrx(wil, "%s()\n", __func__);
  582. while ((*quota > 0) && (NULL != (skb = wil_vring_reap_rx(wil, v)))) {
  583. (*quota)--;
  584. if (wil->wdev->iftype == NL80211_IFTYPE_MONITOR) {
  585. skb->dev = ndev;
  586. skb_reset_mac_header(skb);
  587. skb->ip_summed = CHECKSUM_UNNECESSARY;
  588. skb->pkt_type = PACKET_OTHERHOST;
  589. skb->protocol = htons(ETH_P_802_2);
  590. wil_netif_rx_any(skb, ndev);
  591. } else {
  592. wil_rx_reorder(wil, skb);
  593. }
  594. }
  595. wil_rx_refill(wil, v->size);
  596. }
  597. int wil_rx_init(struct wil6210_priv *wil, u16 size)
  598. {
  599. struct vring *vring = &wil->vring_rx;
  600. int rc;
  601. wil_dbg_misc(wil, "%s()\n", __func__);
  602. if (vring->va) {
  603. wil_err(wil, "Rx ring already allocated\n");
  604. return -EINVAL;
  605. }
  606. vring->size = size;
  607. rc = wil_vring_alloc(wil, vring);
  608. if (rc)
  609. return rc;
  610. rc = wmi_rx_chain_add(wil, vring);
  611. if (rc)
  612. goto err_free;
  613. rc = wil_rx_refill(wil, vring->size);
  614. if (rc)
  615. goto err_free;
  616. return 0;
  617. err_free:
  618. wil_vring_free(wil, vring, 0);
  619. return rc;
  620. }
  621. void wil_rx_fini(struct wil6210_priv *wil)
  622. {
  623. struct vring *vring = &wil->vring_rx;
  624. wil_dbg_misc(wil, "%s()\n", __func__);
  625. if (vring->va)
  626. wil_vring_free(wil, vring, 0);
  627. }
  628. int wil_vring_init_tx(struct wil6210_priv *wil, int id, int size,
  629. int cid, int tid)
  630. {
  631. int rc;
  632. struct wmi_vring_cfg_cmd cmd = {
  633. .action = cpu_to_le32(WMI_VRING_CMD_ADD),
  634. .vring_cfg = {
  635. .tx_sw_ring = {
  636. .max_mpdu_size =
  637. cpu_to_le16(wil_mtu2macbuf(mtu_max)),
  638. .ring_size = cpu_to_le16(size),
  639. },
  640. .ringid = id,
  641. .cidxtid = mk_cidxtid(cid, tid),
  642. .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
  643. .mac_ctrl = 0,
  644. .to_resolution = 0,
  645. .agg_max_wsize = 0,
  646. .schd_params = {
  647. .priority = cpu_to_le16(0),
  648. .timeslot_us = cpu_to_le16(0xfff),
  649. },
  650. },
  651. };
  652. struct {
  653. struct wil6210_mbox_hdr_wmi wmi;
  654. struct wmi_vring_cfg_done_event cmd;
  655. } __packed reply;
  656. struct vring *vring = &wil->vring_tx[id];
  657. struct vring_tx_data *txdata = &wil->vring_tx_data[id];
  658. wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__,
  659. cmd.vring_cfg.tx_sw_ring.max_mpdu_size);
  660. if (vring->va) {
  661. wil_err(wil, "Tx ring [%d] already allocated\n", id);
  662. rc = -EINVAL;
  663. goto out;
  664. }
  665. memset(txdata, 0, sizeof(*txdata));
  666. spin_lock_init(&txdata->lock);
  667. vring->size = size;
  668. rc = wil_vring_alloc(wil, vring);
  669. if (rc)
  670. goto out;
  671. wil->vring2cid_tid[id][0] = cid;
  672. wil->vring2cid_tid[id][1] = tid;
  673. cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
  674. if (!wil->privacy)
  675. txdata->dot1x_open = true;
  676. rc = wmi_call(wil, WMI_VRING_CFG_CMDID, &cmd, sizeof(cmd),
  677. WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
  678. if (rc)
  679. goto out_free;
  680. if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
  681. wil_err(wil, "Tx config failed, status 0x%02x\n",
  682. reply.cmd.status);
  683. rc = -EINVAL;
  684. goto out_free;
  685. }
  686. vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
  687. txdata->enabled = 1;
  688. if (txdata->dot1x_open && (agg_wsize >= 0))
  689. wil_addba_tx_request(wil, id, agg_wsize);
  690. return 0;
  691. out_free:
  692. txdata->dot1x_open = false;
  693. txdata->enabled = 0;
  694. wil_vring_free(wil, vring, 1);
  695. out:
  696. return rc;
  697. }
  698. int wil_vring_init_bcast(struct wil6210_priv *wil, int id, int size)
  699. {
  700. int rc;
  701. struct wmi_bcast_vring_cfg_cmd cmd = {
  702. .action = cpu_to_le32(WMI_VRING_CMD_ADD),
  703. .vring_cfg = {
  704. .tx_sw_ring = {
  705. .max_mpdu_size =
  706. cpu_to_le16(wil_mtu2macbuf(mtu_max)),
  707. .ring_size = cpu_to_le16(size),
  708. },
  709. .ringid = id,
  710. .encap_trans_type = WMI_VRING_ENC_TYPE_802_3,
  711. },
  712. };
  713. struct {
  714. struct wil6210_mbox_hdr_wmi wmi;
  715. struct wmi_vring_cfg_done_event cmd;
  716. } __packed reply;
  717. struct vring *vring = &wil->vring_tx[id];
  718. struct vring_tx_data *txdata = &wil->vring_tx_data[id];
  719. wil_dbg_misc(wil, "%s() max_mpdu_size %d\n", __func__,
  720. cmd.vring_cfg.tx_sw_ring.max_mpdu_size);
  721. if (vring->va) {
  722. wil_err(wil, "Tx ring [%d] already allocated\n", id);
  723. rc = -EINVAL;
  724. goto out;
  725. }
  726. memset(txdata, 0, sizeof(*txdata));
  727. spin_lock_init(&txdata->lock);
  728. vring->size = size;
  729. rc = wil_vring_alloc(wil, vring);
  730. if (rc)
  731. goto out;
  732. wil->vring2cid_tid[id][0] = WIL6210_MAX_CID; /* CID */
  733. wil->vring2cid_tid[id][1] = 0; /* TID */
  734. cmd.vring_cfg.tx_sw_ring.ring_mem_base = cpu_to_le64(vring->pa);
  735. if (!wil->privacy)
  736. txdata->dot1x_open = true;
  737. rc = wmi_call(wil, WMI_BCAST_VRING_CFG_CMDID, &cmd, sizeof(cmd),
  738. WMI_VRING_CFG_DONE_EVENTID, &reply, sizeof(reply), 100);
  739. if (rc)
  740. goto out_free;
  741. if (reply.cmd.status != WMI_FW_STATUS_SUCCESS) {
  742. wil_err(wil, "Tx config failed, status 0x%02x\n",
  743. reply.cmd.status);
  744. rc = -EINVAL;
  745. goto out_free;
  746. }
  747. vring->hwtail = le32_to_cpu(reply.cmd.tx_vring_tail_ptr);
  748. txdata->enabled = 1;
  749. return 0;
  750. out_free:
  751. txdata->enabled = 0;
  752. txdata->dot1x_open = false;
  753. wil_vring_free(wil, vring, 1);
  754. out:
  755. return rc;
  756. }
  757. void wil_vring_fini_tx(struct wil6210_priv *wil, int id)
  758. {
  759. struct vring *vring = &wil->vring_tx[id];
  760. struct vring_tx_data *txdata = &wil->vring_tx_data[id];
  761. WARN_ON(!mutex_is_locked(&wil->mutex));
  762. if (!vring->va)
  763. return;
  764. wil_dbg_misc(wil, "%s() id=%d\n", __func__, id);
  765. spin_lock_bh(&txdata->lock);
  766. txdata->dot1x_open = false;
  767. txdata->enabled = 0; /* no Tx can be in progress or start anew */
  768. spin_unlock_bh(&txdata->lock);
  769. /* make sure NAPI won't touch this vring */
  770. if (test_bit(wil_status_napi_en, wil->status))
  771. napi_synchronize(&wil->napi_tx);
  772. wil_vring_free(wil, vring, 1);
  773. memset(txdata, 0, sizeof(*txdata));
  774. }
  775. static struct vring *wil_find_tx_ucast(struct wil6210_priv *wil,
  776. struct sk_buff *skb)
  777. {
  778. int i;
  779. struct ethhdr *eth = (void *)skb->data;
  780. int cid = wil_find_cid(wil, eth->h_dest);
  781. if (cid < 0)
  782. return NULL;
  783. /* TODO: fix for multiple TID */
  784. for (i = 0; i < ARRAY_SIZE(wil->vring2cid_tid); i++) {
  785. if (!wil->vring_tx_data[i].dot1x_open &&
  786. (skb->protocol != cpu_to_be16(ETH_P_PAE)))
  787. continue;
  788. if (wil->vring2cid_tid[i][0] == cid) {
  789. struct vring *v = &wil->vring_tx[i];
  790. wil_dbg_txrx(wil, "%s(%pM) -> [%d]\n",
  791. __func__, eth->h_dest, i);
  792. if (v->va) {
  793. return v;
  794. } else {
  795. wil_dbg_txrx(wil, "vring[%d] not valid\n", i);
  796. return NULL;
  797. }
  798. }
  799. }
  800. return NULL;
  801. }
  802. static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
  803. struct sk_buff *skb);
  804. static struct vring *wil_find_tx_vring_sta(struct wil6210_priv *wil,
  805. struct sk_buff *skb)
  806. {
  807. struct vring *v;
  808. int i;
  809. u8 cid;
  810. /* In the STA mode, it is expected to have only 1 VRING
  811. * for the AP we connected to.
  812. * find 1-st vring eligible for this skb and use it.
  813. */
  814. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
  815. v = &wil->vring_tx[i];
  816. if (!v->va)
  817. continue;
  818. cid = wil->vring2cid_tid[i][0];
  819. if (cid >= WIL6210_MAX_CID) /* skip BCAST */
  820. continue;
  821. if (!wil->vring_tx_data[i].dot1x_open &&
  822. (skb->protocol != cpu_to_be16(ETH_P_PAE)))
  823. continue;
  824. wil_dbg_txrx(wil, "Tx -> ring %d\n", i);
  825. return v;
  826. }
  827. wil_dbg_txrx(wil, "Tx while no vrings active?\n");
  828. return NULL;
  829. }
  830. /* Use one of 2 strategies:
  831. *
  832. * 1. New (real broadcast):
  833. * use dedicated broadcast vring
  834. * 2. Old (pseudo-DMS):
  835. * Find 1-st vring and return it;
  836. * duplicate skb and send it to other active vrings;
  837. * in all cases override dest address to unicast peer's address
  838. * Use old strategy when new is not supported yet:
  839. * - for PBSS
  840. */
  841. static struct vring *wil_find_tx_bcast_1(struct wil6210_priv *wil,
  842. struct sk_buff *skb)
  843. {
  844. struct vring *v;
  845. int i = wil->bcast_vring;
  846. if (i < 0)
  847. return NULL;
  848. v = &wil->vring_tx[i];
  849. if (!v->va)
  850. return NULL;
  851. if (!wil->vring_tx_data[i].dot1x_open &&
  852. (skb->protocol != cpu_to_be16(ETH_P_PAE)))
  853. return NULL;
  854. return v;
  855. }
  856. static void wil_set_da_for_vring(struct wil6210_priv *wil,
  857. struct sk_buff *skb, int vring_index)
  858. {
  859. struct ethhdr *eth = (void *)skb->data;
  860. int cid = wil->vring2cid_tid[vring_index][0];
  861. ether_addr_copy(eth->h_dest, wil->sta[cid].addr);
  862. }
  863. static struct vring *wil_find_tx_bcast_2(struct wil6210_priv *wil,
  864. struct sk_buff *skb)
  865. {
  866. struct vring *v, *v2;
  867. struct sk_buff *skb2;
  868. int i;
  869. u8 cid;
  870. struct ethhdr *eth = (void *)skb->data;
  871. char *src = eth->h_source;
  872. /* find 1-st vring eligible for data */
  873. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
  874. v = &wil->vring_tx[i];
  875. if (!v->va)
  876. continue;
  877. cid = wil->vring2cid_tid[i][0];
  878. if (cid >= WIL6210_MAX_CID) /* skip BCAST */
  879. continue;
  880. if (!wil->vring_tx_data[i].dot1x_open &&
  881. (skb->protocol != cpu_to_be16(ETH_P_PAE)))
  882. continue;
  883. /* don't Tx back to source when re-routing Rx->Tx at the AP */
  884. if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN))
  885. continue;
  886. goto found;
  887. }
  888. wil_dbg_txrx(wil, "Tx while no vrings active?\n");
  889. return NULL;
  890. found:
  891. wil_dbg_txrx(wil, "BCAST -> ring %d\n", i);
  892. wil_set_da_for_vring(wil, skb, i);
  893. /* find other active vrings and duplicate skb for each */
  894. for (i++; i < WIL6210_MAX_TX_RINGS; i++) {
  895. v2 = &wil->vring_tx[i];
  896. if (!v2->va)
  897. continue;
  898. cid = wil->vring2cid_tid[i][0];
  899. if (cid >= WIL6210_MAX_CID) /* skip BCAST */
  900. continue;
  901. if (!wil->vring_tx_data[i].dot1x_open &&
  902. (skb->protocol != cpu_to_be16(ETH_P_PAE)))
  903. continue;
  904. if (0 == memcmp(wil->sta[cid].addr, src, ETH_ALEN))
  905. continue;
  906. skb2 = skb_copy(skb, GFP_ATOMIC);
  907. if (skb2) {
  908. wil_dbg_txrx(wil, "BCAST DUP -> ring %d\n", i);
  909. wil_set_da_for_vring(wil, skb2, i);
  910. wil_tx_vring(wil, v2, skb2);
  911. } else {
  912. wil_err(wil, "skb_copy failed\n");
  913. }
  914. }
  915. return v;
  916. }
  917. static struct vring *wil_find_tx_bcast(struct wil6210_priv *wil,
  918. struct sk_buff *skb)
  919. {
  920. struct wireless_dev *wdev = wil->wdev;
  921. if (wdev->iftype != NL80211_IFTYPE_AP)
  922. return wil_find_tx_bcast_2(wil, skb);
  923. return wil_find_tx_bcast_1(wil, skb);
  924. }
  925. static int wil_tx_desc_map(struct vring_tx_desc *d, dma_addr_t pa, u32 len,
  926. int vring_index)
  927. {
  928. wil_desc_addr_set(&d->dma.addr, pa);
  929. d->dma.ip_length = 0;
  930. /* 0..6: mac_length; 7:ip_version 0-IP6 1-IP4*/
  931. d->dma.b11 = 0/*14 | BIT(7)*/;
  932. d->dma.error = 0;
  933. d->dma.status = 0; /* BIT(0) should be 0 for HW_OWNED */
  934. d->dma.length = cpu_to_le16((u16)len);
  935. d->dma.d0 = (vring_index << DMA_CFG_DESC_TX_0_QID_POS);
  936. d->mac.d[0] = 0;
  937. d->mac.d[1] = 0;
  938. d->mac.d[2] = 0;
  939. d->mac.ucode_cmd = 0;
  940. /* translation type: 0 - bypass; 1 - 802.3; 2 - native wifi */
  941. d->mac.d[2] = BIT(MAC_CFG_DESC_TX_2_SNAP_HDR_INSERTION_EN_POS) |
  942. (1 << MAC_CFG_DESC_TX_2_L2_TRANSLATION_TYPE_POS);
  943. return 0;
  944. }
  945. static inline
  946. void wil_tx_desc_set_nr_frags(struct vring_tx_desc *d, int nr_frags)
  947. {
  948. d->mac.d[2] |= (nr_frags << MAC_CFG_DESC_TX_2_NUM_OF_DESCRIPTORS_POS);
  949. }
  950. /**
  951. * Sets the descriptor @d up for csum and/or TSO offloading. The corresponding
  952. * @skb is used to obtain the protocol and headers length.
  953. * @tso_desc_type is a descriptor type for TSO: 0 - a header, 1 - first data,
  954. * 2 - middle, 3 - last descriptor.
  955. */
  956. static void wil_tx_desc_offload_setup_tso(struct vring_tx_desc *d,
  957. struct sk_buff *skb,
  958. int tso_desc_type, bool is_ipv4,
  959. int tcp_hdr_len, int skb_net_hdr_len)
  960. {
  961. d->dma.b11 = ETH_HLEN; /* MAC header length */
  962. d->dma.b11 |= is_ipv4 << DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS;
  963. d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
  964. /* L4 header len: TCP header length */
  965. d->dma.d0 |= (tcp_hdr_len & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
  966. /* Setup TSO: bit and desc type */
  967. d->dma.d0 |= (BIT(DMA_CFG_DESC_TX_0_TCP_SEG_EN_POS)) |
  968. (tso_desc_type << DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS);
  969. d->dma.d0 |= (is_ipv4 << DMA_CFG_DESC_TX_0_IPV4_CHECKSUM_EN_POS);
  970. d->dma.ip_length = skb_net_hdr_len;
  971. /* Enable TCP/UDP checksum */
  972. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
  973. /* Calculate pseudo-header */
  974. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
  975. }
  976. /**
  977. * Sets the descriptor @d up for csum. The corresponding
  978. * @skb is used to obtain the protocol and headers length.
  979. * Returns the protocol: 0 - not TCP, 1 - TCPv4, 2 - TCPv6.
  980. * Note, if d==NULL, the function only returns the protocol result.
  981. *
  982. * It is very similar to previous wil_tx_desc_offload_setup_tso. This
  983. * is "if unrolling" to optimize the critical path.
  984. */
  985. static int wil_tx_desc_offload_setup(struct vring_tx_desc *d,
  986. struct sk_buff *skb){
  987. int protocol;
  988. if (skb->ip_summed != CHECKSUM_PARTIAL)
  989. return 0;
  990. d->dma.b11 = ETH_HLEN; /* MAC header length */
  991. switch (skb->protocol) {
  992. case cpu_to_be16(ETH_P_IP):
  993. protocol = ip_hdr(skb)->protocol;
  994. d->dma.b11 |= BIT(DMA_CFG_DESC_TX_OFFLOAD_CFG_L3T_IPV4_POS);
  995. break;
  996. case cpu_to_be16(ETH_P_IPV6):
  997. protocol = ipv6_hdr(skb)->nexthdr;
  998. break;
  999. default:
  1000. return -EINVAL;
  1001. }
  1002. switch (protocol) {
  1003. case IPPROTO_TCP:
  1004. d->dma.d0 |= (2 << DMA_CFG_DESC_TX_0_L4_TYPE_POS);
  1005. /* L4 header len: TCP header length */
  1006. d->dma.d0 |=
  1007. (tcp_hdrlen(skb) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
  1008. break;
  1009. case IPPROTO_UDP:
  1010. /* L4 header len: UDP header length */
  1011. d->dma.d0 |=
  1012. (sizeof(struct udphdr) & DMA_CFG_DESC_TX_0_L4_LENGTH_MSK);
  1013. break;
  1014. default:
  1015. return -EINVAL;
  1016. }
  1017. d->dma.ip_length = skb_network_header_len(skb);
  1018. /* Enable TCP/UDP checksum */
  1019. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_TCP_UDP_CHECKSUM_EN_POS);
  1020. /* Calculate pseudo-header */
  1021. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_PSEUDO_HEADER_CALC_EN_POS);
  1022. return 0;
  1023. }
  1024. static inline void wil_tx_last_desc(struct vring_tx_desc *d)
  1025. {
  1026. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS) |
  1027. BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS) |
  1028. BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
  1029. }
  1030. static inline void wil_set_tx_desc_last_tso(volatile struct vring_tx_desc *d)
  1031. {
  1032. d->dma.d0 |= wil_tso_type_lst <<
  1033. DMA_CFG_DESC_TX_0_SEGMENT_BUF_DETAILS_POS;
  1034. }
  1035. static int __wil_tx_vring_tso(struct wil6210_priv *wil, struct vring *vring,
  1036. struct sk_buff *skb)
  1037. {
  1038. struct device *dev = wil_to_dev(wil);
  1039. /* point to descriptors in shared memory */
  1040. volatile struct vring_tx_desc *_desc = NULL, *_hdr_desc,
  1041. *_first_desc = NULL;
  1042. /* pointers to shadow descriptors */
  1043. struct vring_tx_desc desc_mem, hdr_desc_mem, first_desc_mem,
  1044. *d = &hdr_desc_mem, *hdr_desc = &hdr_desc_mem,
  1045. *first_desc = &first_desc_mem;
  1046. /* pointer to shadow descriptors' context */
  1047. struct wil_ctx *hdr_ctx, *first_ctx = NULL;
  1048. int descs_used = 0; /* total number of used descriptors */
  1049. int sg_desc_cnt = 0; /* number of descriptors for current mss*/
  1050. u32 swhead = vring->swhead;
  1051. int used, avail = wil_vring_avail_tx(vring);
  1052. int nr_frags = skb_shinfo(skb)->nr_frags;
  1053. int min_desc_required = nr_frags + 1;
  1054. int mss = skb_shinfo(skb)->gso_size; /* payload size w/o headers */
  1055. int f, len, hdrlen, headlen;
  1056. int vring_index = vring - wil->vring_tx;
  1057. struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
  1058. uint i = swhead;
  1059. dma_addr_t pa;
  1060. const skb_frag_t *frag = NULL;
  1061. int rem_data = mss;
  1062. int lenmss;
  1063. int hdr_compensation_need = true;
  1064. int desc_tso_type = wil_tso_type_first;
  1065. bool is_ipv4;
  1066. int tcp_hdr_len;
  1067. int skb_net_hdr_len;
  1068. int gso_type;
  1069. int rc = -EINVAL;
  1070. wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n",
  1071. __func__, skb->len, vring_index);
  1072. if (unlikely(!txdata->enabled))
  1073. return -EINVAL;
  1074. /* A typical page 4K is 3-4 payloads, we assume each fragment
  1075. * is a full payload, that's how min_desc_required has been
  1076. * calculated. In real we might need more or less descriptors,
  1077. * this is the initial check only.
  1078. */
  1079. if (unlikely(avail < min_desc_required)) {
  1080. wil_err_ratelimited(wil,
  1081. "TSO: Tx ring[%2d] full. No space for %d fragments\n",
  1082. vring_index, min_desc_required);
  1083. return -ENOMEM;
  1084. }
  1085. /* Header Length = MAC header len + IP header len + TCP header len*/
  1086. hdrlen = ETH_HLEN +
  1087. (int)skb_network_header_len(skb) +
  1088. tcp_hdrlen(skb);
  1089. gso_type = skb_shinfo(skb)->gso_type & (SKB_GSO_TCPV6 | SKB_GSO_TCPV4);
  1090. switch (gso_type) {
  1091. case SKB_GSO_TCPV4:
  1092. /* TCP v4, zero out the IP length and IPv4 checksum fields
  1093. * as required by the offloading doc
  1094. */
  1095. ip_hdr(skb)->tot_len = 0;
  1096. ip_hdr(skb)->check = 0;
  1097. is_ipv4 = true;
  1098. break;
  1099. case SKB_GSO_TCPV6:
  1100. /* TCP v6, zero out the payload length */
  1101. ipv6_hdr(skb)->payload_len = 0;
  1102. is_ipv4 = false;
  1103. break;
  1104. default:
  1105. /* other than TCPv4 or TCPv6 types are not supported for TSO.
  1106. * It is also illegal for both to be set simultaneously
  1107. */
  1108. return -EINVAL;
  1109. }
  1110. if (skb->ip_summed != CHECKSUM_PARTIAL)
  1111. return -EINVAL;
  1112. /* tcp header length and skb network header length are fixed for all
  1113. * packet's descriptors - read then once here
  1114. */
  1115. tcp_hdr_len = tcp_hdrlen(skb);
  1116. skb_net_hdr_len = skb_network_header_len(skb);
  1117. _hdr_desc = &vring->va[i].tx;
  1118. pa = dma_map_single(dev, skb->data, hdrlen, DMA_TO_DEVICE);
  1119. if (unlikely(dma_mapping_error(dev, pa))) {
  1120. wil_err(wil, "TSO: Skb head DMA map error\n");
  1121. goto err_exit;
  1122. }
  1123. wil_tx_desc_map(hdr_desc, pa, hdrlen, vring_index);
  1124. wil_tx_desc_offload_setup_tso(hdr_desc, skb, wil_tso_type_hdr, is_ipv4,
  1125. tcp_hdr_len, skb_net_hdr_len);
  1126. wil_tx_last_desc(hdr_desc);
  1127. vring->ctx[i].mapped_as = wil_mapped_as_single;
  1128. hdr_ctx = &vring->ctx[i];
  1129. descs_used++;
  1130. headlen = skb_headlen(skb) - hdrlen;
  1131. for (f = headlen ? -1 : 0; f < nr_frags; f++) {
  1132. if (headlen) {
  1133. len = headlen;
  1134. wil_dbg_txrx(wil, "TSO: process skb head, len %u\n",
  1135. len);
  1136. } else {
  1137. frag = &skb_shinfo(skb)->frags[f];
  1138. len = frag->size;
  1139. wil_dbg_txrx(wil, "TSO: frag[%d]: len %u\n", f, len);
  1140. }
  1141. while (len) {
  1142. wil_dbg_txrx(wil,
  1143. "TSO: len %d, rem_data %d, descs_used %d\n",
  1144. len, rem_data, descs_used);
  1145. if (descs_used == avail) {
  1146. wil_err_ratelimited(wil, "TSO: ring overflow\n");
  1147. rc = -ENOMEM;
  1148. goto mem_error;
  1149. }
  1150. lenmss = min_t(int, rem_data, len);
  1151. i = (swhead + descs_used) % vring->size;
  1152. wil_dbg_txrx(wil, "TSO: lenmss %d, i %d\n", lenmss, i);
  1153. if (!headlen) {
  1154. pa = skb_frag_dma_map(dev, frag,
  1155. frag->size - len, lenmss,
  1156. DMA_TO_DEVICE);
  1157. vring->ctx[i].mapped_as = wil_mapped_as_page;
  1158. } else {
  1159. pa = dma_map_single(dev,
  1160. skb->data +
  1161. skb_headlen(skb) - headlen,
  1162. lenmss,
  1163. DMA_TO_DEVICE);
  1164. vring->ctx[i].mapped_as = wil_mapped_as_single;
  1165. headlen -= lenmss;
  1166. }
  1167. if (unlikely(dma_mapping_error(dev, pa))) {
  1168. wil_err(wil, "TSO: DMA map page error\n");
  1169. goto mem_error;
  1170. }
  1171. _desc = &vring->va[i].tx;
  1172. if (!_first_desc) {
  1173. _first_desc = _desc;
  1174. first_ctx = &vring->ctx[i];
  1175. d = first_desc;
  1176. } else {
  1177. d = &desc_mem;
  1178. }
  1179. wil_tx_desc_map(d, pa, lenmss, vring_index);
  1180. wil_tx_desc_offload_setup_tso(d, skb, desc_tso_type,
  1181. is_ipv4, tcp_hdr_len,
  1182. skb_net_hdr_len);
  1183. /* use tso_type_first only once */
  1184. desc_tso_type = wil_tso_type_mid;
  1185. descs_used++; /* desc used so far */
  1186. sg_desc_cnt++; /* desc used for this segment */
  1187. len -= lenmss;
  1188. rem_data -= lenmss;
  1189. wil_dbg_txrx(wil,
  1190. "TSO: len %d, rem_data %d, descs_used %d, sg_desc_cnt %d,\n",
  1191. len, rem_data, descs_used, sg_desc_cnt);
  1192. /* Close the segment if reached mss size or last frag*/
  1193. if (rem_data == 0 || (f == nr_frags - 1 && len == 0)) {
  1194. if (hdr_compensation_need) {
  1195. /* first segment include hdr desc for
  1196. * release
  1197. */
  1198. hdr_ctx->nr_frags = sg_desc_cnt;
  1199. wil_tx_desc_set_nr_frags(first_desc,
  1200. sg_desc_cnt +
  1201. 1);
  1202. hdr_compensation_need = false;
  1203. } else {
  1204. wil_tx_desc_set_nr_frags(first_desc,
  1205. sg_desc_cnt);
  1206. }
  1207. first_ctx->nr_frags = sg_desc_cnt - 1;
  1208. wil_tx_last_desc(d);
  1209. /* first descriptor may also be the last
  1210. * for this mss - make sure not to copy
  1211. * it twice
  1212. */
  1213. if (first_desc != d)
  1214. *_first_desc = *first_desc;
  1215. /*last descriptor will be copied at the end
  1216. * of this TS processing
  1217. */
  1218. if (f < nr_frags - 1 || len > 0)
  1219. *_desc = *d;
  1220. rem_data = mss;
  1221. _first_desc = NULL;
  1222. sg_desc_cnt = 0;
  1223. } else if (first_desc != d) /* update mid descriptor */
  1224. *_desc = *d;
  1225. }
  1226. }
  1227. /* first descriptor may also be the last.
  1228. * in this case d pointer is invalid
  1229. */
  1230. if (_first_desc == _desc)
  1231. d = first_desc;
  1232. /* Last data descriptor */
  1233. wil_set_tx_desc_last_tso(d);
  1234. *_desc = *d;
  1235. /* Fill the total number of descriptors in first desc (hdr)*/
  1236. wil_tx_desc_set_nr_frags(hdr_desc, descs_used);
  1237. *_hdr_desc = *hdr_desc;
  1238. /* hold reference to skb
  1239. * to prevent skb release before accounting
  1240. * in case of immediate "tx done"
  1241. */
  1242. vring->ctx[i].skb = skb_get(skb);
  1243. /* performance monitoring */
  1244. used = wil_vring_used_tx(vring);
  1245. if (wil_val_in_range(vring_idle_trsh,
  1246. used, used + descs_used)) {
  1247. txdata->idle += get_cycles() - txdata->last_idle;
  1248. wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n",
  1249. vring_index, used, used + descs_used);
  1250. }
  1251. /* advance swhead */
  1252. wil_vring_advance_head(vring, descs_used);
  1253. wil_dbg_txrx(wil, "TSO: Tx swhead %d -> %d\n", swhead, vring->swhead);
  1254. /* make sure all writes to descriptors (shared memory) are done before
  1255. * committing them to HW
  1256. */
  1257. wmb();
  1258. wil_w(wil, vring->hwtail, vring->swhead);
  1259. return 0;
  1260. mem_error:
  1261. while (descs_used > 0) {
  1262. struct wil_ctx *ctx;
  1263. i = (swhead + descs_used) % vring->size;
  1264. d = (struct vring_tx_desc *)&vring->va[i].tx;
  1265. _desc = &vring->va[i].tx;
  1266. *d = *_desc;
  1267. _desc->dma.status = TX_DMA_STATUS_DU;
  1268. ctx = &vring->ctx[i];
  1269. wil_txdesc_unmap(dev, d, ctx);
  1270. memset(ctx, 0, sizeof(*ctx));
  1271. descs_used--;
  1272. }
  1273. err_exit:
  1274. return rc;
  1275. }
  1276. static int __wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
  1277. struct sk_buff *skb)
  1278. {
  1279. struct device *dev = wil_to_dev(wil);
  1280. struct vring_tx_desc dd, *d = &dd;
  1281. volatile struct vring_tx_desc *_d;
  1282. u32 swhead = vring->swhead;
  1283. int avail = wil_vring_avail_tx(vring);
  1284. int nr_frags = skb_shinfo(skb)->nr_frags;
  1285. uint f = 0;
  1286. int vring_index = vring - wil->vring_tx;
  1287. struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
  1288. uint i = swhead;
  1289. dma_addr_t pa;
  1290. int used;
  1291. bool mcast = (vring_index == wil->bcast_vring);
  1292. uint len = skb_headlen(skb);
  1293. wil_dbg_txrx(wil, "%s() %d bytes to vring %d\n",
  1294. __func__, skb->len, vring_index);
  1295. if (unlikely(!txdata->enabled))
  1296. return -EINVAL;
  1297. if (unlikely(avail < 1 + nr_frags)) {
  1298. wil_err_ratelimited(wil,
  1299. "Tx ring[%2d] full. No space for %d fragments\n",
  1300. vring_index, 1 + nr_frags);
  1301. return -ENOMEM;
  1302. }
  1303. _d = &vring->va[i].tx;
  1304. pa = dma_map_single(dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  1305. wil_dbg_txrx(wil, "Tx[%2d] skb %d bytes 0x%p -> %pad\n", vring_index,
  1306. skb_headlen(skb), skb->data, &pa);
  1307. wil_hex_dump_txrx("Tx ", DUMP_PREFIX_OFFSET, 16, 1,
  1308. skb->data, skb_headlen(skb), false);
  1309. if (unlikely(dma_mapping_error(dev, pa)))
  1310. return -EINVAL;
  1311. vring->ctx[i].mapped_as = wil_mapped_as_single;
  1312. /* 1-st segment */
  1313. wil_tx_desc_map(d, pa, len, vring_index);
  1314. if (unlikely(mcast)) {
  1315. d->mac.d[0] |= BIT(MAC_CFG_DESC_TX_0_MCS_EN_POS); /* MCS 0 */
  1316. if (unlikely(len > WIL_BCAST_MCS0_LIMIT)) /* set MCS 1 */
  1317. d->mac.d[0] |= (1 << MAC_CFG_DESC_TX_0_MCS_INDEX_POS);
  1318. }
  1319. /* Process TCP/UDP checksum offloading */
  1320. if (unlikely(wil_tx_desc_offload_setup(d, skb))) {
  1321. wil_err(wil, "Tx[%2d] Failed to set cksum, drop packet\n",
  1322. vring_index);
  1323. goto dma_error;
  1324. }
  1325. vring->ctx[i].nr_frags = nr_frags;
  1326. wil_tx_desc_set_nr_frags(d, nr_frags + 1);
  1327. /* middle segments */
  1328. for (; f < nr_frags; f++) {
  1329. const struct skb_frag_struct *frag =
  1330. &skb_shinfo(skb)->frags[f];
  1331. int len = skb_frag_size(frag);
  1332. *_d = *d;
  1333. wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i);
  1334. wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
  1335. (const void *)d, sizeof(*d), false);
  1336. i = (swhead + f + 1) % vring->size;
  1337. _d = &vring->va[i].tx;
  1338. pa = skb_frag_dma_map(dev, frag, 0, skb_frag_size(frag),
  1339. DMA_TO_DEVICE);
  1340. if (unlikely(dma_mapping_error(dev, pa))) {
  1341. wil_err(wil, "Tx[%2d] failed to map fragment\n",
  1342. vring_index);
  1343. goto dma_error;
  1344. }
  1345. vring->ctx[i].mapped_as = wil_mapped_as_page;
  1346. wil_tx_desc_map(d, pa, len, vring_index);
  1347. /* no need to check return code -
  1348. * if it succeeded for 1-st descriptor,
  1349. * it will succeed here too
  1350. */
  1351. wil_tx_desc_offload_setup(d, skb);
  1352. }
  1353. /* for the last seg only */
  1354. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_EOP_POS);
  1355. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_MARK_WB_POS);
  1356. d->dma.d0 |= BIT(DMA_CFG_DESC_TX_0_CMD_DMA_IT_POS);
  1357. *_d = *d;
  1358. wil_dbg_txrx(wil, "Tx[%2d] desc[%4d]\n", vring_index, i);
  1359. wil_hex_dump_txrx("TxD ", DUMP_PREFIX_NONE, 32, 4,
  1360. (const void *)d, sizeof(*d), false);
  1361. /* hold reference to skb
  1362. * to prevent skb release before accounting
  1363. * in case of immediate "tx done"
  1364. */
  1365. vring->ctx[i].skb = skb_get(skb);
  1366. /* performance monitoring */
  1367. used = wil_vring_used_tx(vring);
  1368. if (wil_val_in_range(vring_idle_trsh,
  1369. used, used + nr_frags + 1)) {
  1370. txdata->idle += get_cycles() - txdata->last_idle;
  1371. wil_dbg_txrx(wil, "Ring[%2d] not idle %d -> %d\n",
  1372. vring_index, used, used + nr_frags + 1);
  1373. }
  1374. /* advance swhead */
  1375. wil_vring_advance_head(vring, nr_frags + 1);
  1376. wil_dbg_txrx(wil, "Tx[%2d] swhead %d -> %d\n", vring_index, swhead,
  1377. vring->swhead);
  1378. trace_wil6210_tx(vring_index, swhead, skb->len, nr_frags);
  1379. /* make sure all writes to descriptors (shared memory) are done before
  1380. * committing them to HW
  1381. */
  1382. wmb();
  1383. wil_w(wil, vring->hwtail, vring->swhead);
  1384. return 0;
  1385. dma_error:
  1386. /* unmap what we have mapped */
  1387. nr_frags = f + 1; /* frags mapped + one for skb head */
  1388. for (f = 0; f < nr_frags; f++) {
  1389. struct wil_ctx *ctx;
  1390. i = (swhead + f) % vring->size;
  1391. ctx = &vring->ctx[i];
  1392. _d = &vring->va[i].tx;
  1393. *d = *_d;
  1394. _d->dma.status = TX_DMA_STATUS_DU;
  1395. wil_txdesc_unmap(dev, d, ctx);
  1396. memset(ctx, 0, sizeof(*ctx));
  1397. }
  1398. return -EINVAL;
  1399. }
  1400. static int wil_tx_vring(struct wil6210_priv *wil, struct vring *vring,
  1401. struct sk_buff *skb)
  1402. {
  1403. int vring_index = vring - wil->vring_tx;
  1404. struct vring_tx_data *txdata = &wil->vring_tx_data[vring_index];
  1405. int rc;
  1406. spin_lock(&txdata->lock);
  1407. rc = (skb_is_gso(skb) ? __wil_tx_vring_tso : __wil_tx_vring)
  1408. (wil, vring, skb);
  1409. spin_unlock(&txdata->lock);
  1410. return rc;
  1411. }
  1412. netdev_tx_t wil_start_xmit(struct sk_buff *skb, struct net_device *ndev)
  1413. {
  1414. struct wil6210_priv *wil = ndev_to_wil(ndev);
  1415. struct ethhdr *eth = (void *)skb->data;
  1416. bool bcast = is_multicast_ether_addr(eth->h_dest);
  1417. struct vring *vring;
  1418. static bool pr_once_fw;
  1419. int rc;
  1420. wil_dbg_txrx(wil, "%s()\n", __func__);
  1421. if (unlikely(!test_bit(wil_status_fwready, wil->status))) {
  1422. if (!pr_once_fw) {
  1423. wil_err(wil, "FW not ready\n");
  1424. pr_once_fw = true;
  1425. }
  1426. goto drop;
  1427. }
  1428. if (unlikely(!test_bit(wil_status_fwconnected, wil->status))) {
  1429. wil_err_ratelimited(wil, "FW not connected\n");
  1430. goto drop;
  1431. }
  1432. if (unlikely(wil->wdev->iftype == NL80211_IFTYPE_MONITOR)) {
  1433. wil_err(wil, "Xmit in monitor mode not supported\n");
  1434. goto drop;
  1435. }
  1436. pr_once_fw = false;
  1437. /* find vring */
  1438. if (wil->wdev->iftype == NL80211_IFTYPE_STATION) {
  1439. /* in STA mode (ESS), all to same VRING */
  1440. vring = wil_find_tx_vring_sta(wil, skb);
  1441. } else { /* direct communication, find matching VRING */
  1442. vring = bcast ? wil_find_tx_bcast(wil, skb) :
  1443. wil_find_tx_ucast(wil, skb);
  1444. }
  1445. if (unlikely(!vring)) {
  1446. wil_dbg_txrx(wil, "No Tx VRING found for %pM\n", eth->h_dest);
  1447. goto drop;
  1448. }
  1449. /* set up vring entry */
  1450. rc = wil_tx_vring(wil, vring, skb);
  1451. /* do we still have enough room in the vring? */
  1452. if (unlikely(wil_vring_avail_tx(vring) < wil_vring_wmark_low(vring))) {
  1453. netif_tx_stop_all_queues(wil_to_ndev(wil));
  1454. wil_dbg_txrx(wil, "netif_tx_stop : ring full\n");
  1455. }
  1456. switch (rc) {
  1457. case 0:
  1458. /* statistics will be updated on the tx_complete */
  1459. dev_kfree_skb_any(skb);
  1460. return NETDEV_TX_OK;
  1461. case -ENOMEM:
  1462. return NETDEV_TX_BUSY;
  1463. default:
  1464. break; /* goto drop; */
  1465. }
  1466. drop:
  1467. ndev->stats.tx_dropped++;
  1468. dev_kfree_skb_any(skb);
  1469. return NET_XMIT_DROP;
  1470. }
  1471. static inline bool wil_need_txstat(struct sk_buff *skb)
  1472. {
  1473. struct ethhdr *eth = (void *)skb->data;
  1474. return is_unicast_ether_addr(eth->h_dest) && skb->sk &&
  1475. (skb_shinfo(skb)->tx_flags & SKBTX_WIFI_STATUS);
  1476. }
  1477. static inline void wil_consume_skb(struct sk_buff *skb, bool acked)
  1478. {
  1479. if (unlikely(wil_need_txstat(skb)))
  1480. skb_complete_wifi_ack(skb, acked);
  1481. else
  1482. acked ? dev_consume_skb_any(skb) : dev_kfree_skb_any(skb);
  1483. }
  1484. /**
  1485. * Clean up transmitted skb's from the Tx VRING
  1486. *
  1487. * Return number of descriptors cleared
  1488. *
  1489. * Safe to call from IRQ
  1490. */
  1491. int wil_tx_complete(struct wil6210_priv *wil, int ringid)
  1492. {
  1493. struct net_device *ndev = wil_to_ndev(wil);
  1494. struct device *dev = wil_to_dev(wil);
  1495. struct vring *vring = &wil->vring_tx[ringid];
  1496. struct vring_tx_data *txdata = &wil->vring_tx_data[ringid];
  1497. int done = 0;
  1498. int cid = wil->vring2cid_tid[ringid][0];
  1499. struct wil_net_stats *stats = NULL;
  1500. volatile struct vring_tx_desc *_d;
  1501. int used_before_complete;
  1502. int used_new;
  1503. if (unlikely(!vring->va)) {
  1504. wil_err(wil, "Tx irq[%d]: vring not initialized\n", ringid);
  1505. return 0;
  1506. }
  1507. if (unlikely(!txdata->enabled)) {
  1508. wil_info(wil, "Tx irq[%d]: vring disabled\n", ringid);
  1509. return 0;
  1510. }
  1511. wil_dbg_txrx(wil, "%s(%d)\n", __func__, ringid);
  1512. used_before_complete = wil_vring_used_tx(vring);
  1513. if (cid < WIL6210_MAX_CID)
  1514. stats = &wil->sta[cid].stats;
  1515. while (!wil_vring_is_empty(vring)) {
  1516. int new_swtail;
  1517. struct wil_ctx *ctx = &vring->ctx[vring->swtail];
  1518. /**
  1519. * For the fragmented skb, HW will set DU bit only for the
  1520. * last fragment. look for it.
  1521. * In TSO the first DU will include hdr desc
  1522. */
  1523. int lf = (vring->swtail + ctx->nr_frags) % vring->size;
  1524. /* TODO: check we are not past head */
  1525. _d = &vring->va[lf].tx;
  1526. if (unlikely(!(_d->dma.status & TX_DMA_STATUS_DU)))
  1527. break;
  1528. new_swtail = (lf + 1) % vring->size;
  1529. while (vring->swtail != new_swtail) {
  1530. struct vring_tx_desc dd, *d = &dd;
  1531. u16 dmalen;
  1532. struct sk_buff *skb;
  1533. ctx = &vring->ctx[vring->swtail];
  1534. skb = ctx->skb;
  1535. _d = &vring->va[vring->swtail].tx;
  1536. *d = *_d;
  1537. dmalen = le16_to_cpu(d->dma.length);
  1538. trace_wil6210_tx_done(ringid, vring->swtail, dmalen,
  1539. d->dma.error);
  1540. wil_dbg_txrx(wil,
  1541. "TxC[%2d][%3d] : %d bytes, status 0x%02x err 0x%02x\n",
  1542. ringid, vring->swtail, dmalen,
  1543. d->dma.status, d->dma.error);
  1544. wil_hex_dump_txrx("TxCD ", DUMP_PREFIX_NONE, 32, 4,
  1545. (const void *)d, sizeof(*d), false);
  1546. wil_txdesc_unmap(dev, d, ctx);
  1547. if (skb) {
  1548. if (likely(d->dma.error == 0)) {
  1549. ndev->stats.tx_packets++;
  1550. ndev->stats.tx_bytes += skb->len;
  1551. if (stats) {
  1552. stats->tx_packets++;
  1553. stats->tx_bytes += skb->len;
  1554. }
  1555. } else {
  1556. ndev->stats.tx_errors++;
  1557. if (stats)
  1558. stats->tx_errors++;
  1559. }
  1560. wil_consume_skb(skb, d->dma.error == 0);
  1561. }
  1562. memset(ctx, 0, sizeof(*ctx));
  1563. /* There is no need to touch HW descriptor:
  1564. * - ststus bit TX_DMA_STATUS_DU is set by design,
  1565. * so hardware will not try to process this desc.,
  1566. * - rest of descriptor will be initialized on Tx.
  1567. */
  1568. vring->swtail = wil_vring_next_tail(vring);
  1569. done++;
  1570. }
  1571. }
  1572. /* performance monitoring */
  1573. used_new = wil_vring_used_tx(vring);
  1574. if (wil_val_in_range(vring_idle_trsh,
  1575. used_new, used_before_complete)) {
  1576. wil_dbg_txrx(wil, "Ring[%2d] idle %d -> %d\n",
  1577. ringid, used_before_complete, used_new);
  1578. txdata->last_idle = get_cycles();
  1579. }
  1580. if (wil_vring_avail_tx(vring) > wil_vring_wmark_high(vring)) {
  1581. wil_dbg_txrx(wil, "netif_tx_wake : ring not full\n");
  1582. netif_tx_wake_all_queues(wil_to_ndev(wil));
  1583. }
  1584. return done;
  1585. }