ipw2100.h 40 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156
  1. /******************************************************************************
  2. Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of version 2 of the GNU General Public License as
  5. published by the Free Software Foundation.
  6. This program is distributed in the hope that it will be useful, but WITHOUT
  7. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  8. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  9. more details.
  10. You should have received a copy of the GNU General Public License along with
  11. this program; if not, write to the Free Software Foundation, Inc., 59
  12. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  13. The full GNU General Public License is included in this distribution in the
  14. file called LICENSE.
  15. Contact Information:
  16. Intel Linux Wireless <ilw@linux.intel.com>
  17. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  18. ******************************************************************************/
  19. #ifndef _IPW2100_H
  20. #define _IPW2100_H
  21. #include <linux/sched.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/netdevice.h>
  24. #include <linux/etherdevice.h>
  25. #include <linux/list.h>
  26. #include <linux/delay.h>
  27. #include <linux/skbuff.h>
  28. #include <asm/io.h>
  29. #include <linux/socket.h>
  30. #include <linux/if_arp.h>
  31. #include <linux/wireless.h>
  32. #include <net/iw_handler.h> // new driver API
  33. #ifdef CONFIG_IPW2100_MONITOR
  34. #include <net/ieee80211_radiotap.h>
  35. #endif
  36. #include <linux/workqueue.h>
  37. #include <linux/mutex.h>
  38. #include "libipw.h"
  39. struct ipw2100_priv;
  40. struct ipw2100_tx_packet;
  41. struct ipw2100_rx_packet;
  42. #define IPW_DL_UNINIT 0x80000000
  43. #define IPW_DL_NONE 0x00000000
  44. #define IPW_DL_ALL 0x7FFFFFFF
  45. /*
  46. * To use the debug system;
  47. *
  48. * If you are defining a new debug classification, simply add it to the #define
  49. * list here in the form of:
  50. *
  51. * #define IPW_DL_xxxx VALUE
  52. *
  53. * shifting value to the left one bit from the previous entry. xxxx should be
  54. * the name of the classification (for example, WEP)
  55. *
  56. * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
  57. * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
  58. * to send output to that classification.
  59. *
  60. * To add your debug level to the list of levels seen when you perform
  61. *
  62. * % cat /proc/net/ipw2100/debug_level
  63. *
  64. * you simply need to add your entry to the ipw2100_debug_levels array.
  65. *
  66. * If you do not see debug_level in /proc/net/ipw2100 then you do not have
  67. * CONFIG_IPW2100_DEBUG defined in your kernel configuration
  68. *
  69. */
  70. #define IPW_DL_ERROR (1<<0)
  71. #define IPW_DL_WARNING (1<<1)
  72. #define IPW_DL_INFO (1<<2)
  73. #define IPW_DL_WX (1<<3)
  74. #define IPW_DL_HC (1<<5)
  75. #define IPW_DL_STATE (1<<6)
  76. #define IPW_DL_NOTIF (1<<10)
  77. #define IPW_DL_SCAN (1<<11)
  78. #define IPW_DL_ASSOC (1<<12)
  79. #define IPW_DL_DROP (1<<13)
  80. #define IPW_DL_IOCTL (1<<14)
  81. #define IPW_DL_RF_KILL (1<<17)
  82. #define IPW_DL_MANAGE (1<<15)
  83. #define IPW_DL_FW (1<<16)
  84. #define IPW_DL_FRAG (1<<21)
  85. #define IPW_DL_WEP (1<<22)
  86. #define IPW_DL_TX (1<<23)
  87. #define IPW_DL_RX (1<<24)
  88. #define IPW_DL_ISR (1<<25)
  89. #define IPW_DL_IO (1<<26)
  90. #define IPW_DL_TRACE (1<<28)
  91. #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
  92. #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
  93. #define IPW_DEBUG_INFO(f...) IPW_DEBUG(IPW_DL_INFO, ## f)
  94. #define IPW_DEBUG_WX(f...) IPW_DEBUG(IPW_DL_WX, ## f)
  95. #define IPW_DEBUG_SCAN(f...) IPW_DEBUG(IPW_DL_SCAN, ## f)
  96. #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
  97. #define IPW_DEBUG_TRACE(f...) IPW_DEBUG(IPW_DL_TRACE, ## f)
  98. #define IPW_DEBUG_RX(f...) IPW_DEBUG(IPW_DL_RX, ## f)
  99. #define IPW_DEBUG_TX(f...) IPW_DEBUG(IPW_DL_TX, ## f)
  100. #define IPW_DEBUG_ISR(f...) IPW_DEBUG(IPW_DL_ISR, ## f)
  101. #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
  102. #define IPW_DEBUG_WEP(f...) IPW_DEBUG(IPW_DL_WEP, ## f)
  103. #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
  104. #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
  105. #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
  106. #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
  107. #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
  108. #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
  109. #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
  110. #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
  111. #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
  112. enum {
  113. IPW_HW_STATE_DISABLED = 1,
  114. IPW_HW_STATE_ENABLED = 0
  115. };
  116. extern const char *port_type_str[];
  117. extern const char *band_str[];
  118. #define NUMBER_OF_BD_PER_COMMAND_PACKET 1
  119. #define NUMBER_OF_BD_PER_DATA_PACKET 2
  120. #define IPW_MAX_BDS 6
  121. #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR 2
  122. #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS 1
  123. #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
  124. (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
  125. struct bd_status {
  126. union {
  127. struct {
  128. u8 nlf:1, txType:2, intEnabled:1, reserved:4;
  129. } fields;
  130. u8 field;
  131. } info;
  132. } __packed;
  133. struct ipw2100_bd {
  134. u32 host_addr;
  135. u32 buf_length;
  136. struct bd_status status;
  137. /* number of fragments for frame (should be set only for
  138. * 1st TBD) */
  139. u8 num_fragments;
  140. u8 reserved[6];
  141. } __packed;
  142. #define IPW_BD_QUEUE_LENGTH(n) (1<<n)
  143. #define IPW_BD_ALIGNMENT(L) (L*sizeof(struct ipw2100_bd))
  144. #define IPW_BD_STATUS_TX_FRAME_802_3 0x00
  145. #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
  146. #define IPW_BD_STATUS_TX_FRAME_COMMAND 0x02
  147. #define IPW_BD_STATUS_TX_FRAME_802_11 0x04
  148. #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE 0x08
  149. struct ipw2100_bd_queue {
  150. /* driver (virtual) pointer to queue */
  151. struct ipw2100_bd *drv;
  152. /* firmware (physical) pointer to queue */
  153. dma_addr_t nic;
  154. /* Length of phy memory allocated for BDs */
  155. u32 size;
  156. /* Number of BDs in queue (and in array) */
  157. u32 entries;
  158. /* Number of available BDs (invalid for NIC BDs) */
  159. u32 available;
  160. /* Offset of oldest used BD in array (next one to
  161. * check for completion) */
  162. u32 oldest;
  163. /* Offset of next available (unused) BD */
  164. u32 next;
  165. };
  166. #define RX_QUEUE_LENGTH 256
  167. #define TX_QUEUE_LENGTH 256
  168. #define HW_QUEUE_LENGTH 256
  169. #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
  170. #define STATUS_TYPE_MASK 0x0000000f
  171. #define COMMAND_STATUS_VAL 0
  172. #define STATUS_CHANGE_VAL 1
  173. #define P80211_DATA_VAL 2
  174. #define P8023_DATA_VAL 3
  175. #define HOST_NOTIFICATION_VAL 4
  176. #define IPW2100_RSSI_TO_DBM (-98)
  177. struct ipw2100_status {
  178. u32 frame_size;
  179. u16 status_fields;
  180. u8 flags;
  181. #define IPW_STATUS_FLAG_DECRYPTED (1<<0)
  182. #define IPW_STATUS_FLAG_WEP_ENCRYPTED (1<<1)
  183. #define IPW_STATUS_FLAG_CRC_ERROR (1<<2)
  184. u8 rssi;
  185. } __packed;
  186. struct ipw2100_status_queue {
  187. /* driver (virtual) pointer to queue */
  188. struct ipw2100_status *drv;
  189. /* firmware (physical) pointer to queue */
  190. dma_addr_t nic;
  191. /* Length of phy memory allocated for BDs */
  192. u32 size;
  193. };
  194. #define HOST_COMMAND_PARAMS_REG_LEN 100
  195. #define CMD_STATUS_PARAMS_REG_LEN 3
  196. #define IPW_WPA_CAPABILITIES 0x1
  197. #define IPW_WPA_LISTENINTERVAL 0x2
  198. #define IPW_WPA_AP_ADDRESS 0x4
  199. #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
  200. struct ipw2100_wpa_assoc_frame {
  201. u16 fixed_ie_mask;
  202. struct {
  203. u16 capab_info;
  204. u16 listen_interval;
  205. u8 current_ap[ETH_ALEN];
  206. } fixed_ies;
  207. u32 var_ie_len;
  208. u8 var_ie[IPW_MAX_VAR_IE_LEN];
  209. };
  210. #define IPW_BSS 1
  211. #define IPW_MONITOR 2
  212. #define IPW_IBSS 3
  213. /**
  214. * @struct _tx_cmd - HWCommand
  215. * @brief H/W command structure.
  216. */
  217. struct ipw2100_cmd_header {
  218. u32 host_command_reg;
  219. u32 host_command_reg1;
  220. u32 sequence;
  221. u32 host_command_len_reg;
  222. u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
  223. u32 cmd_status_reg;
  224. u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
  225. u32 rxq_base_ptr;
  226. u32 rxq_next_ptr;
  227. u32 rxq_host_ptr;
  228. u32 txq_base_ptr;
  229. u32 txq_next_ptr;
  230. u32 txq_host_ptr;
  231. u32 tx_status_reg;
  232. u32 reserved;
  233. u32 status_change_reg;
  234. u32 reserved1[3];
  235. u32 *ordinal1_ptr;
  236. u32 *ordinal2_ptr;
  237. } __packed;
  238. struct ipw2100_data_header {
  239. u32 host_command_reg;
  240. u32 host_command_reg1;
  241. u8 encrypted; // BOOLEAN in win! TRUE if frame is enc by driver
  242. u8 needs_encryption; // BOOLEAN in win! TRUE if frma need to be enc in NIC
  243. u8 wep_index; // 0 no key, 1-4 key index, 0xff immediate key
  244. u8 key_size; // 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
  245. u8 key[16];
  246. u8 reserved[10]; // f/w reserved
  247. u8 src_addr[ETH_ALEN];
  248. u8 dst_addr[ETH_ALEN];
  249. u16 fragment_size;
  250. } __packed;
  251. /* Host command data structure */
  252. struct host_command {
  253. u32 host_command; // COMMAND ID
  254. u32 host_command1; // COMMAND ID
  255. u32 host_command_sequence; // UNIQUE COMMAND NUMBER (ID)
  256. u32 host_command_length; // LENGTH
  257. u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN]; // COMMAND PARAMETERS
  258. } __packed;
  259. typedef enum {
  260. POWER_ON_RESET,
  261. EXIT_POWER_DOWN_RESET,
  262. SW_RESET,
  263. EEPROM_RW,
  264. SW_RE_INIT
  265. } ipw2100_reset_event;
  266. enum {
  267. COMMAND = 0xCAFE,
  268. DATA,
  269. RX
  270. };
  271. struct ipw2100_tx_packet {
  272. int type;
  273. int index;
  274. union {
  275. struct { /* COMMAND */
  276. struct ipw2100_cmd_header *cmd;
  277. dma_addr_t cmd_phys;
  278. } c_struct;
  279. struct { /* DATA */
  280. struct ipw2100_data_header *data;
  281. dma_addr_t data_phys;
  282. struct libipw_txb *txb;
  283. } d_struct;
  284. } info;
  285. int jiffy_start;
  286. struct list_head list;
  287. };
  288. struct ipw2100_rx_packet {
  289. struct ipw2100_rx *rxp;
  290. dma_addr_t dma_addr;
  291. int jiffy_start;
  292. struct sk_buff *skb;
  293. struct list_head list;
  294. };
  295. #define FRAG_DISABLED (1<<31)
  296. #define RTS_DISABLED (1<<31)
  297. #define MAX_RTS_THRESHOLD 2304U
  298. #define MIN_RTS_THRESHOLD 1U
  299. #define DEFAULT_RTS_THRESHOLD 1000U
  300. #define DEFAULT_BEACON_INTERVAL 100U
  301. #define DEFAULT_SHORT_RETRY_LIMIT 7U
  302. #define DEFAULT_LONG_RETRY_LIMIT 4U
  303. struct ipw2100_ordinals {
  304. u32 table1_addr;
  305. u32 table2_addr;
  306. u32 table1_size;
  307. u32 table2_size;
  308. };
  309. /* Host Notification header */
  310. struct ipw2100_notification {
  311. u32 hnhdr_subtype; /* type of host notification */
  312. u32 hnhdr_size; /* size in bytes of data
  313. or number of entries, if table.
  314. Does NOT include header */
  315. } __packed;
  316. #define MAX_KEY_SIZE 16
  317. #define MAX_KEYS 8
  318. #define IPW2100_WEP_ENABLE (1<<1)
  319. #define IPW2100_WEP_DROP_CLEAR (1<<2)
  320. #define IPW_NONE_CIPHER (1<<0)
  321. #define IPW_WEP40_CIPHER (1<<1)
  322. #define IPW_TKIP_CIPHER (1<<2)
  323. #define IPW_CCMP_CIPHER (1<<4)
  324. #define IPW_WEP104_CIPHER (1<<5)
  325. #define IPW_CKIP_CIPHER (1<<6)
  326. #define IPW_AUTH_OPEN 0
  327. #define IPW_AUTH_SHARED 1
  328. #define IPW_AUTH_LEAP 2
  329. #define IPW_AUTH_LEAP_CISCO_ID 0x80
  330. struct statistic {
  331. int value;
  332. int hi;
  333. int lo;
  334. };
  335. #define INIT_STAT(x) do { \
  336. (x)->value = (x)->hi = 0; \
  337. (x)->lo = 0x7fffffff; \
  338. } while (0)
  339. #define SET_STAT(x,y) do { \
  340. (x)->value = y; \
  341. if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
  342. if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
  343. } while (0)
  344. #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
  345. while (0)
  346. #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
  347. while (0)
  348. #define IPW2100_ERROR_QUEUE 5
  349. /* Power management code: enable or disable? */
  350. enum {
  351. #ifdef CONFIG_PM
  352. IPW2100_PM_DISABLED = 0,
  353. PM_STATE_SIZE = 16,
  354. #else
  355. IPW2100_PM_DISABLED = 1,
  356. PM_STATE_SIZE = 0,
  357. #endif
  358. };
  359. #define STATUS_POWERED (1<<0)
  360. #define STATUS_CMD_ACTIVE (1<<1) /**< host command in progress */
  361. #define STATUS_RUNNING (1<<2) /* Card initialized, but not enabled */
  362. #define STATUS_ENABLED (1<<3) /* Card enabled -- can scan,Tx,Rx */
  363. #define STATUS_STOPPING (1<<4) /* Card is in shutdown phase */
  364. #define STATUS_INITIALIZED (1<<5) /* Card is ready for external calls */
  365. #define STATUS_ASSOCIATING (1<<9) /* Associated, but no BSSID yet */
  366. #define STATUS_ASSOCIATED (1<<10) /* Associated and BSSID valid */
  367. #define STATUS_INT_ENABLED (1<<11)
  368. #define STATUS_RF_KILL_HW (1<<12)
  369. #define STATUS_RF_KILL_SW (1<<13)
  370. #define STATUS_RF_KILL_MASK (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
  371. #define STATUS_EXIT_PENDING (1<<14)
  372. #define STATUS_SCAN_PENDING (1<<23)
  373. #define STATUS_SCANNING (1<<24)
  374. #define STATUS_SCAN_ABORTING (1<<25)
  375. #define STATUS_SCAN_COMPLETE (1<<26)
  376. #define STATUS_WX_EVENT_PENDING (1<<27)
  377. #define STATUS_RESET_PENDING (1<<29)
  378. #define STATUS_SECURITY_UPDATED (1<<30) /* Security sync needed */
  379. /* Internal NIC states */
  380. #define IPW_STATE_INITIALIZED (1<<0)
  381. #define IPW_STATE_COUNTRY_FOUND (1<<1)
  382. #define IPW_STATE_ASSOCIATED (1<<2)
  383. #define IPW_STATE_ASSN_LOST (1<<3)
  384. #define IPW_STATE_ASSN_CHANGED (1<<4)
  385. #define IPW_STATE_SCAN_COMPLETE (1<<5)
  386. #define IPW_STATE_ENTERED_PSP (1<<6)
  387. #define IPW_STATE_LEFT_PSP (1<<7)
  388. #define IPW_STATE_RF_KILL (1<<8)
  389. #define IPW_STATE_DISABLED (1<<9)
  390. #define IPW_STATE_POWER_DOWN (1<<10)
  391. #define IPW_STATE_SCANNING (1<<11)
  392. #define CFG_STATIC_CHANNEL (1<<0) /* Restrict assoc. to single channel */
  393. #define CFG_STATIC_ESSID (1<<1) /* Restrict assoc. to single SSID */
  394. #define CFG_STATIC_BSSID (1<<2) /* Restrict assoc. to single BSSID */
  395. #define CFG_CUSTOM_MAC (1<<3)
  396. #define CFG_LONG_PREAMBLE (1<<4)
  397. #define CFG_ASSOCIATE (1<<6)
  398. #define CFG_FIXED_RATE (1<<7)
  399. #define CFG_ADHOC_CREATE (1<<8)
  400. #define CFG_PASSIVE_SCAN (1<<10)
  401. #ifdef CONFIG_IPW2100_MONITOR
  402. #define CFG_CRC_CHECK (1<<11)
  403. #endif
  404. #define CAP_SHARED_KEY (1<<0) /* Off = OPEN */
  405. #define CAP_PRIVACY_ON (1<<1) /* Off = No privacy */
  406. struct ipw2100_priv {
  407. void __iomem *ioaddr;
  408. int stop_hang_check; /* Set 1 when shutting down to kill hang_check */
  409. int stop_rf_kill; /* Set 1 when shutting down to kill rf_kill */
  410. struct libipw_device *ieee;
  411. unsigned long status;
  412. unsigned long config;
  413. unsigned long capability;
  414. /* Statistics */
  415. int resets;
  416. int reset_backoff;
  417. /* Context */
  418. u8 essid[IW_ESSID_MAX_SIZE];
  419. u8 essid_len;
  420. u8 bssid[ETH_ALEN];
  421. u8 channel;
  422. int last_mode;
  423. unsigned long connect_start;
  424. unsigned long last_reset;
  425. u32 channel_mask;
  426. u32 fatal_error;
  427. u32 fatal_errors[IPW2100_ERROR_QUEUE];
  428. u32 fatal_index;
  429. int eeprom_version;
  430. int firmware_version;
  431. unsigned long hw_features;
  432. int hangs;
  433. u32 last_rtc;
  434. int dump_raw; /* 1 to dump raw bytes in /sys/.../memory */
  435. u8 *snapshot[0x30];
  436. u8 mandatory_bssid_mac[ETH_ALEN];
  437. u8 mac_addr[ETH_ALEN];
  438. int power_mode;
  439. int messages_sent;
  440. int short_retry_limit;
  441. int long_retry_limit;
  442. u32 rts_threshold;
  443. u32 frag_threshold;
  444. int in_isr;
  445. u32 tx_rates;
  446. int tx_power;
  447. u32 beacon_interval;
  448. char nick[IW_ESSID_MAX_SIZE + 1];
  449. struct ipw2100_status_queue status_queue;
  450. struct statistic txq_stat;
  451. struct statistic rxq_stat;
  452. struct ipw2100_bd_queue rx_queue;
  453. struct ipw2100_bd_queue tx_queue;
  454. struct ipw2100_rx_packet *rx_buffers;
  455. struct statistic fw_pend_stat;
  456. struct list_head fw_pend_list;
  457. struct statistic msg_free_stat;
  458. struct statistic msg_pend_stat;
  459. struct list_head msg_free_list;
  460. struct list_head msg_pend_list;
  461. struct ipw2100_tx_packet *msg_buffers;
  462. struct statistic tx_free_stat;
  463. struct statistic tx_pend_stat;
  464. struct list_head tx_free_list;
  465. struct list_head tx_pend_list;
  466. struct ipw2100_tx_packet *tx_buffers;
  467. struct ipw2100_ordinals ordinals;
  468. struct pci_dev *pci_dev;
  469. struct proc_dir_entry *dir_dev;
  470. struct net_device *net_dev;
  471. struct iw_statistics wstats;
  472. struct iw_public_data wireless_data;
  473. struct tasklet_struct irq_tasklet;
  474. struct delayed_work reset_work;
  475. struct delayed_work security_work;
  476. struct delayed_work wx_event_work;
  477. struct delayed_work hang_check;
  478. struct delayed_work rf_kill;
  479. struct delayed_work scan_event;
  480. int user_requested_scan;
  481. /* Track time in suspend */
  482. unsigned long suspend_at;
  483. unsigned long suspend_time;
  484. u32 interrupts;
  485. int tx_interrupts;
  486. int rx_interrupts;
  487. int inta_other;
  488. spinlock_t low_lock;
  489. struct mutex action_mutex;
  490. struct mutex adapter_mutex;
  491. wait_queue_head_t wait_command_queue;
  492. };
  493. /*********************************************************
  494. * Host Command -> From Driver to FW
  495. *********************************************************/
  496. /**
  497. * Host command identifiers
  498. */
  499. #define HOST_COMPLETE 2
  500. #define SYSTEM_CONFIG 6
  501. #define SSID 8
  502. #define MANDATORY_BSSID 9
  503. #define AUTHENTICATION_TYPE 10
  504. #define ADAPTER_ADDRESS 11
  505. #define PORT_TYPE 12
  506. #define INTERNATIONAL_MODE 13
  507. #define CHANNEL 14
  508. #define RTS_THRESHOLD 15
  509. #define FRAG_THRESHOLD 16
  510. #define POWER_MODE 17
  511. #define TX_RATES 18
  512. #define BASIC_TX_RATES 19
  513. #define WEP_KEY_INFO 20
  514. #define WEP_KEY_INDEX 25
  515. #define WEP_FLAGS 26
  516. #define ADD_MULTICAST 27
  517. #define CLEAR_ALL_MULTICAST 28
  518. #define BEACON_INTERVAL 29
  519. #define ATIM_WINDOW 30
  520. #define CLEAR_STATISTICS 31
  521. #define SEND 33
  522. #define TX_POWER_INDEX 36
  523. #define BROADCAST_SCAN 43
  524. #define CARD_DISABLE 44
  525. #define PREFERRED_BSSID 45
  526. #define SET_SCAN_OPTIONS 46
  527. #define SCAN_DWELL_TIME 47
  528. #define SWEEP_TABLE 48
  529. #define AP_OR_STATION_TABLE 49
  530. #define GROUP_ORDINALS 50
  531. #define SHORT_RETRY_LIMIT 51
  532. #define LONG_RETRY_LIMIT 52
  533. #define HOST_PRE_POWER_DOWN 58
  534. #define CARD_DISABLE_PHY_OFF 61
  535. #define MSDU_TX_RATES 62
  536. /* Rogue AP Detection */
  537. #define SET_STATION_STAT_BITS 64
  538. #define CLEAR_STATIONS_STAT_BITS 65
  539. #define LEAP_ROGUE_MODE 66 //TODO tbw replaced by CFG_LEAP_ROGUE_AP
  540. #define SET_SECURITY_INFORMATION 67
  541. #define DISASSOCIATION_BSSID 68
  542. #define SET_WPA_IE 69
  543. /* system configuration bit mask: */
  544. #define IPW_CFG_MONITOR 0x00004
  545. #define IPW_CFG_PREAMBLE_AUTO 0x00010
  546. #define IPW_CFG_IBSS_AUTO_START 0x00020
  547. #define IPW_CFG_LOOPBACK 0x00100
  548. #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
  549. #define IPW_CFG_BT_SIDEBAND_SIGNAL 0x02000
  550. #define IPW_CFG_802_1x_ENABLE 0x04000
  551. #define IPW_CFG_BSS_MASK 0x08000
  552. #define IPW_CFG_IBSS_MASK 0x10000
  553. #define IPW_SCAN_NOASSOCIATE (1<<0)
  554. #define IPW_SCAN_MIXED_CELL (1<<1)
  555. /* RESERVED (1<<2) */
  556. #define IPW_SCAN_PASSIVE (1<<3)
  557. #define IPW_NIC_FATAL_ERROR 0x2A7F0
  558. #define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
  559. #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
  560. #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
  561. #define IPW2100_ERR_MSG_TIMEOUT (0x11 << 24)
  562. #define IPW2100_ERR_FW_LOAD (0x12 << 24)
  563. #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND 0x200
  564. #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
  565. #define IPW_MEM_HOST_SHARED_RX_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
  566. #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
  567. #define IPW_MEM_HOST_SHARED_RX_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
  568. #define IPW_MEM_HOST_SHARED_RX_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
  569. #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
  570. #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
  571. #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
  572. #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
  573. (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
  574. #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
  575. (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
  576. #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
  577. #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2 (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
  578. #define IPW2100_INTA_TX_TRANSFER (0x00000001) // Bit 0 (LSB)
  579. #define IPW2100_INTA_RX_TRANSFER (0x00000002) // Bit 1
  580. #define IPW2100_INTA_TX_COMPLETE (0x00000004) // Bit 2
  581. #define IPW2100_INTA_EVENT_INTERRUPT (0x00000008) // Bit 3
  582. #define IPW2100_INTA_STATUS_CHANGE (0x00000010) // Bit 4
  583. #define IPW2100_INTA_BEACON_PERIOD_EXPIRED (0x00000020) // Bit 5
  584. #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE (0x00010000) // Bit 16
  585. #define IPW2100_INTA_FW_INIT_DONE (0x01000000) // Bit 24
  586. #define IPW2100_INTA_FW_CALIBRATION_CALC (0x02000000) // Bit 25
  587. #define IPW2100_INTA_FATAL_ERROR (0x40000000) // Bit 30
  588. #define IPW2100_INTA_PARITY_ERROR (0x80000000) // Bit 31 (MSB)
  589. #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET (0x00000001)
  590. #define IPW_AUX_HOST_RESET_REG_FORCE_NMI (0x00000002)
  591. #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI (0x00000004)
  592. #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI (0x00000008)
  593. #define IPW_AUX_HOST_RESET_REG_SW_RESET (0x00000080)
  594. #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED (0x00000100)
  595. #define IPW_AUX_HOST_RESET_REG_STOP_MASTER (0x00000200)
  596. #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY (0x00000001) // Bit 0 (LSB)
  597. #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY (0x00000002) // Bit 1
  598. #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE (0x00000004) // Bit 2
  599. #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG (0x000007c0) // Bits 6-10
  600. #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE (0x00000200) // Bit 9
  601. #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE (0x00000400) // Bit 10
  602. #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE (0x20000000) // Bit 29
  603. #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK (0x40000000) // Bit 30
  604. #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK (0x80000000) // Bit 31 (MSB)
  605. #define IPW_BIT_GPIO_GPIO1_MASK 0x0000000C
  606. #define IPW_BIT_GPIO_GPIO3_MASK 0x000000C0
  607. #define IPW_BIT_GPIO_GPIO1_ENABLE 0x00000008
  608. #define IPW_BIT_GPIO_RF_KILL 0x00010000
  609. #define IPW_BIT_GPIO_LED_OFF 0x00002000 // Bit 13 = 1
  610. #define IPW_REG_DOMAIN_0_OFFSET 0x0000
  611. #define IPW_REG_DOMAIN_1_OFFSET IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
  612. #define IPW_REG_INTA IPW_REG_DOMAIN_0_OFFSET + 0x0008
  613. #define IPW_REG_INTA_MASK IPW_REG_DOMAIN_0_OFFSET + 0x000C
  614. #define IPW_REG_INDIRECT_ACCESS_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0010
  615. #define IPW_REG_INDIRECT_ACCESS_DATA IPW_REG_DOMAIN_0_OFFSET + 0x0014
  616. #define IPW_REG_AUTOINCREMENT_ADDRESS IPW_REG_DOMAIN_0_OFFSET + 0x0018
  617. #define IPW_REG_AUTOINCREMENT_DATA IPW_REG_DOMAIN_0_OFFSET + 0x001C
  618. #define IPW_REG_RESET_REG IPW_REG_DOMAIN_0_OFFSET + 0x0020
  619. #define IPW_REG_GP_CNTRL IPW_REG_DOMAIN_0_OFFSET + 0x0024
  620. #define IPW_REG_GPIO IPW_REG_DOMAIN_0_OFFSET + 0x0030
  621. #define IPW_REG_FW_TYPE IPW_REG_DOMAIN_1_OFFSET + 0x0188
  622. #define IPW_REG_FW_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x018C
  623. #define IPW_REG_FW_COMPATIBILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
  624. #define IPW_REG_INDIRECT_ADDR_MASK 0x00FFFFFC
  625. #define IPW_INTERRUPT_MASK 0xC1010013
  626. #define IPW2100_CONTROL_REG 0x220000
  627. #define IPW2100_CONTROL_PHY_OFF 0x8
  628. #define IPW2100_COMMAND 0x00300004
  629. #define IPW2100_COMMAND_PHY_ON 0x0
  630. #define IPW2100_COMMAND_PHY_OFF 0x1
  631. /* in DEBUG_AREA, values of memory always 0xd55555d5 */
  632. #define IPW_REG_DOA_DEBUG_AREA_START IPW_REG_DOMAIN_0_OFFSET + 0x0090
  633. #define IPW_REG_DOA_DEBUG_AREA_END IPW_REG_DOMAIN_0_OFFSET + 0x00FF
  634. #define IPW_DATA_DOA_DEBUG_VALUE 0xd55555d5
  635. #define IPW_INTERNAL_REGISTER_HALT_AND_RESET 0x003000e0
  636. #define IPW_WAIT_CLOCK_STABILIZATION_DELAY 50 // micro seconds
  637. #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY 10 // micro seconds
  638. #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10 // micro seconds
  639. // BD ring queue read/write difference
  640. #define IPW_BD_QUEUE_W_R_MIN_SPARE 2
  641. #define IPW_CACHE_LINE_LENGTH_DEFAULT 0x80
  642. #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT 100 // 100 milli
  643. #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT 100 // 100 milli
  644. #define IPW_HEADER_802_11_SIZE sizeof(struct libipw_hdr_3addr)
  645. #define IPW_MAX_80211_PAYLOAD_SIZE 2304U
  646. #define IPW_MAX_802_11_PAYLOAD_LENGTH 2312
  647. #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH 1536
  648. #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH 60
  649. #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
  650. (IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
  651. sizeof(struct ethhdr))
  652. #define IPW_802_11_FCS_LENGTH 4
  653. #define IPW_RX_NIC_BUFFER_LENGTH \
  654. (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
  655. IPW_802_11_FCS_LENGTH)
  656. #define IPW_802_11_PAYLOAD_OFFSET \
  657. (sizeof(struct libipw_hdr_3addr) + \
  658. sizeof(struct libipw_snap_hdr))
  659. struct ipw2100_rx {
  660. union {
  661. unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
  662. struct libipw_hdr_4addr header;
  663. u32 status;
  664. struct ipw2100_notification notification;
  665. struct ipw2100_cmd_header command;
  666. } rx_data;
  667. } __packed;
  668. /* Bit 0-7 are for 802.11b tx rates - . Bit 5-7 are reserved */
  669. #define TX_RATE_1_MBIT 0x0001
  670. #define TX_RATE_2_MBIT 0x0002
  671. #define TX_RATE_5_5_MBIT 0x0004
  672. #define TX_RATE_11_MBIT 0x0008
  673. #define TX_RATE_MASK 0x000F
  674. #define DEFAULT_TX_RATES 0x000F
  675. #define IPW_POWER_MODE_CAM 0x00 //(always on)
  676. #define IPW_POWER_INDEX_1 0x01
  677. #define IPW_POWER_INDEX_2 0x02
  678. #define IPW_POWER_INDEX_3 0x03
  679. #define IPW_POWER_INDEX_4 0x04
  680. #define IPW_POWER_INDEX_5 0x05
  681. #define IPW_POWER_AUTO 0x06
  682. #define IPW_POWER_MASK 0x0F
  683. #define IPW_POWER_ENABLED 0x10
  684. #define IPW_POWER_LEVEL(x) ((x) & IPW_POWER_MASK)
  685. #define IPW_TX_POWER_AUTO 0
  686. #define IPW_TX_POWER_ENHANCED 1
  687. #define IPW_TX_POWER_DEFAULT 32
  688. #define IPW_TX_POWER_MIN 0
  689. #define IPW_TX_POWER_MAX 16
  690. #define IPW_TX_POWER_MIN_DBM (-12)
  691. #define IPW_TX_POWER_MAX_DBM 16
  692. #define FW_SCAN_DONOT_ASSOCIATE 0x0001 // Dont Attempt to Associate after Scan
  693. #define FW_SCAN_PASSIVE 0x0008 // Force PASSSIVE Scan
  694. #define REG_MIN_CHANNEL 0
  695. #define REG_MAX_CHANNEL 14
  696. #define REG_CHANNEL_MASK 0x00003FFF
  697. #define IPW_IBSS_11B_DEFAULT_MASK 0x87ff
  698. #define DIVERSITY_EITHER 0 // Use both antennas
  699. #define DIVERSITY_ANTENNA_A 1 // Use antenna A
  700. #define DIVERSITY_ANTENNA_B 2 // Use antenna B
  701. #define HOST_COMMAND_WAIT 0
  702. #define HOST_COMMAND_NO_WAIT 1
  703. #define LOCK_NONE 0
  704. #define LOCK_DRIVER 1
  705. #define LOCK_FW 2
  706. #define TYPE_SWEEP_ORD 0x000D
  707. #define TYPE_IBSS_STTN_ORD 0x000E
  708. #define TYPE_BSS_AP_ORD 0x000F
  709. #define TYPE_RAW_BEACON_ENTRY 0x0010
  710. #define TYPE_CALIBRATION_DATA 0x0011
  711. #define TYPE_ROGUE_AP_DATA 0x0012
  712. #define TYPE_ASSOCIATION_REQUEST 0x0013
  713. #define TYPE_REASSOCIATION_REQUEST 0x0014
  714. #define HW_FEATURE_RFKILL 0x0001
  715. #define RF_KILLSWITCH_OFF 1
  716. #define RF_KILLSWITCH_ON 0
  717. #define IPW_COMMAND_POOL_SIZE 40
  718. #define IPW_START_ORD_TAB_1 1
  719. #define IPW_START_ORD_TAB_2 1000
  720. #define IPW_ORD_TAB_1_ENTRY_SIZE sizeof(u32)
  721. #define IS_ORDINAL_TABLE_ONE(mgr,id) \
  722. ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
  723. #define IS_ORDINAL_TABLE_TWO(mgr,id) \
  724. ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
  725. #define BSS_ID_LENGTH 6
  726. // Fixed size data: Ordinal Table 1
  727. typedef enum _ORDINAL_TABLE_1 { // NS - means Not Supported by FW
  728. // Transmit statistics
  729. IPW_ORD_STAT_TX_HOST_REQUESTS = 1, // # of requested Host Tx's (MSDU)
  730. IPW_ORD_STAT_TX_HOST_COMPLETE, // # of successful Host Tx's (MSDU)
  731. IPW_ORD_STAT_TX_DIR_DATA, // # of successful Directed Tx's (MSDU)
  732. IPW_ORD_STAT_TX_DIR_DATA1 = 4, // # of successful Directed Tx's (MSDU) @ 1MB
  733. IPW_ORD_STAT_TX_DIR_DATA2, // # of successful Directed Tx's (MSDU) @ 2MB
  734. IPW_ORD_STAT_TX_DIR_DATA5_5, // # of successful Directed Tx's (MSDU) @ 5_5MB
  735. IPW_ORD_STAT_TX_DIR_DATA11, // # of successful Directed Tx's (MSDU) @ 11MB
  736. IPW_ORD_STAT_TX_DIR_DATA22, // # of successful Directed Tx's (MSDU) @ 22MB
  737. IPW_ORD_STAT_TX_NODIR_DATA1 = 13, // # of successful Non_Directed Tx's (MSDU) @ 1MB
  738. IPW_ORD_STAT_TX_NODIR_DATA2, // # of successful Non_Directed Tx's (MSDU) @ 2MB
  739. IPW_ORD_STAT_TX_NODIR_DATA5_5, // # of successful Non_Directed Tx's (MSDU) @ 5.5MB
  740. IPW_ORD_STAT_TX_NODIR_DATA11, // # of successful Non_Directed Tx's (MSDU) @ 11MB
  741. IPW_ORD_STAT_NULL_DATA = 21, // # of successful NULL data Tx's
  742. IPW_ORD_STAT_TX_RTS, // # of successful Tx RTS
  743. IPW_ORD_STAT_TX_CTS, // # of successful Tx CTS
  744. IPW_ORD_STAT_TX_ACK, // # of successful Tx ACK
  745. IPW_ORD_STAT_TX_ASSN, // # of successful Association Tx's
  746. IPW_ORD_STAT_TX_ASSN_RESP, // # of successful Association response Tx's
  747. IPW_ORD_STAT_TX_REASSN, // # of successful Reassociation Tx's
  748. IPW_ORD_STAT_TX_REASSN_RESP, // # of successful Reassociation response Tx's
  749. IPW_ORD_STAT_TX_PROBE, // # of probes successfully transmitted
  750. IPW_ORD_STAT_TX_PROBE_RESP, // # of probe responses successfully transmitted
  751. IPW_ORD_STAT_TX_BEACON, // # of tx beacon
  752. IPW_ORD_STAT_TX_ATIM, // # of Tx ATIM
  753. IPW_ORD_STAT_TX_DISASSN, // # of successful Disassociation TX
  754. IPW_ORD_STAT_TX_AUTH, // # of successful Authentication Tx
  755. IPW_ORD_STAT_TX_DEAUTH, // # of successful Deauthentication TX
  756. IPW_ORD_STAT_TX_TOTAL_BYTES = 41, // Total successful Tx data bytes
  757. IPW_ORD_STAT_TX_RETRIES, // # of Tx retries
  758. IPW_ORD_STAT_TX_RETRY1, // # of Tx retries at 1MBPS
  759. IPW_ORD_STAT_TX_RETRY2, // # of Tx retries at 2MBPS
  760. IPW_ORD_STAT_TX_RETRY5_5, // # of Tx retries at 5.5MBPS
  761. IPW_ORD_STAT_TX_RETRY11, // # of Tx retries at 11MBPS
  762. IPW_ORD_STAT_TX_FAILURES = 51, // # of Tx Failures
  763. IPW_ORD_STAT_TX_ABORT_AT_HOP, //NS // # of Tx's aborted at hop time
  764. IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP, // # of times max tries in a hop failed
  765. IPW_ORD_STAT_TX_ABORT_LATE_DMA, //NS // # of times tx aborted due to late dma setup
  766. IPW_ORD_STAT_TX_ABORT_STX, //NS // # of times backoff aborted
  767. IPW_ORD_STAT_TX_DISASSN_FAIL, // # of times disassociation failed
  768. IPW_ORD_STAT_TX_ERR_CTS, // # of missed/bad CTS frames
  769. IPW_ORD_STAT_TX_BPDU, //NS // # of spanning tree BPDUs sent
  770. IPW_ORD_STAT_TX_ERR_ACK, // # of tx err due to acks
  771. // Receive statistics
  772. IPW_ORD_STAT_RX_HOST = 61, // # of packets passed to host
  773. IPW_ORD_STAT_RX_DIR_DATA, // # of directed packets
  774. IPW_ORD_STAT_RX_DIR_DATA1, // # of directed packets at 1MB
  775. IPW_ORD_STAT_RX_DIR_DATA2, // # of directed packets at 2MB
  776. IPW_ORD_STAT_RX_DIR_DATA5_5, // # of directed packets at 5.5MB
  777. IPW_ORD_STAT_RX_DIR_DATA11, // # of directed packets at 11MB
  778. IPW_ORD_STAT_RX_DIR_DATA22, // # of directed packets at 22MB
  779. IPW_ORD_STAT_RX_NODIR_DATA = 71, // # of nondirected packets
  780. IPW_ORD_STAT_RX_NODIR_DATA1, // # of nondirected packets at 1MB
  781. IPW_ORD_STAT_RX_NODIR_DATA2, // # of nondirected packets at 2MB
  782. IPW_ORD_STAT_RX_NODIR_DATA5_5, // # of nondirected packets at 5.5MB
  783. IPW_ORD_STAT_RX_NODIR_DATA11, // # of nondirected packets at 11MB
  784. IPW_ORD_STAT_RX_NULL_DATA = 80, // # of null data rx's
  785. IPW_ORD_STAT_RX_POLL, //NS // # of poll rx
  786. IPW_ORD_STAT_RX_RTS, // # of Rx RTS
  787. IPW_ORD_STAT_RX_CTS, // # of Rx CTS
  788. IPW_ORD_STAT_RX_ACK, // # of Rx ACK
  789. IPW_ORD_STAT_RX_CFEND, // # of Rx CF End
  790. IPW_ORD_STAT_RX_CFEND_ACK, // # of Rx CF End + CF Ack
  791. IPW_ORD_STAT_RX_ASSN, // # of Association Rx's
  792. IPW_ORD_STAT_RX_ASSN_RESP, // # of Association response Rx's
  793. IPW_ORD_STAT_RX_REASSN, // # of Reassociation Rx's
  794. IPW_ORD_STAT_RX_REASSN_RESP, // # of Reassociation response Rx's
  795. IPW_ORD_STAT_RX_PROBE, // # of probe Rx's
  796. IPW_ORD_STAT_RX_PROBE_RESP, // # of probe response Rx's
  797. IPW_ORD_STAT_RX_BEACON, // # of Rx beacon
  798. IPW_ORD_STAT_RX_ATIM, // # of Rx ATIM
  799. IPW_ORD_STAT_RX_DISASSN, // # of disassociation Rx
  800. IPW_ORD_STAT_RX_AUTH, // # of authentication Rx
  801. IPW_ORD_STAT_RX_DEAUTH, // # of deauthentication Rx
  802. IPW_ORD_STAT_RX_TOTAL_BYTES = 101, // Total rx data bytes received
  803. IPW_ORD_STAT_RX_ERR_CRC, // # of packets with Rx CRC error
  804. IPW_ORD_STAT_RX_ERR_CRC1, // # of Rx CRC errors at 1MB
  805. IPW_ORD_STAT_RX_ERR_CRC2, // # of Rx CRC errors at 2MB
  806. IPW_ORD_STAT_RX_ERR_CRC5_5, // # of Rx CRC errors at 5.5MB
  807. IPW_ORD_STAT_RX_ERR_CRC11, // # of Rx CRC errors at 11MB
  808. IPW_ORD_STAT_RX_DUPLICATE1 = 112, // # of duplicate rx packets at 1MB
  809. IPW_ORD_STAT_RX_DUPLICATE2, // # of duplicate rx packets at 2MB
  810. IPW_ORD_STAT_RX_DUPLICATE5_5, // # of duplicate rx packets at 5.5MB
  811. IPW_ORD_STAT_RX_DUPLICATE11, // # of duplicate rx packets at 11MB
  812. IPW_ORD_STAT_RX_DUPLICATE = 119, // # of duplicate rx packets
  813. IPW_ORD_PERS_DB_LOCK = 120, // # locking fw permanent db
  814. IPW_ORD_PERS_DB_SIZE, // # size of fw permanent db
  815. IPW_ORD_PERS_DB_ADDR, // # address of fw permanent db
  816. IPW_ORD_STAT_RX_INVALID_PROTOCOL, // # of rx frames with invalid protocol
  817. IPW_ORD_SYS_BOOT_TIME, // # Boot time
  818. IPW_ORD_STAT_RX_NO_BUFFER, // # of rx frames rejected due to no buffer
  819. IPW_ORD_STAT_RX_ABORT_LATE_DMA, //NS // # of rx frames rejected due to dma setup too late
  820. IPW_ORD_STAT_RX_ABORT_AT_HOP, //NS // # of rx frames aborted due to hop
  821. IPW_ORD_STAT_RX_MISSING_FRAG, // # of rx frames dropped due to missing fragment
  822. IPW_ORD_STAT_RX_ORPHAN_FRAG, // # of rx frames dropped due to non-sequential fragment
  823. IPW_ORD_STAT_RX_ORPHAN_FRAME, // # of rx frames dropped due to unmatched 1st frame
  824. IPW_ORD_STAT_RX_FRAG_AGEOUT, // # of rx frames dropped due to uncompleted frame
  825. IPW_ORD_STAT_RX_BAD_SSID, //NS // Bad SSID (unused)
  826. IPW_ORD_STAT_RX_ICV_ERRORS, // # of ICV errors during decryption
  827. // PSP Statistics
  828. IPW_ORD_STAT_PSP_SUSPENSION = 137, // # of times adapter suspended
  829. IPW_ORD_STAT_PSP_BCN_TIMEOUT, // # of beacon timeout
  830. IPW_ORD_STAT_PSP_POLL_TIMEOUT, // # of poll response timeouts
  831. IPW_ORD_STAT_PSP_NONDIR_TIMEOUT, // # of timeouts waiting for last broadcast/muticast pkt
  832. IPW_ORD_STAT_PSP_RX_DTIMS, // # of PSP DTIMs received
  833. IPW_ORD_STAT_PSP_RX_TIMS, // # of PSP TIMs received
  834. IPW_ORD_STAT_PSP_STATION_ID, // PSP Station ID
  835. // Association and roaming
  836. IPW_ORD_LAST_ASSN_TIME = 147, // RTC time of last association
  837. IPW_ORD_STAT_PERCENT_MISSED_BCNS, // current calculation of % missed beacons
  838. IPW_ORD_STAT_PERCENT_RETRIES, // current calculation of % missed tx retries
  839. IPW_ORD_ASSOCIATED_AP_PTR, // If associated, this is ptr to the associated
  840. // AP table entry. set to 0 if not associated
  841. IPW_ORD_AVAILABLE_AP_CNT, // # of AP's decsribed in the AP table
  842. IPW_ORD_AP_LIST_PTR, // Ptr to list of available APs
  843. IPW_ORD_STAT_AP_ASSNS, // # of associations
  844. IPW_ORD_STAT_ASSN_FAIL, // # of association failures
  845. IPW_ORD_STAT_ASSN_RESP_FAIL, // # of failuresdue to response fail
  846. IPW_ORD_STAT_FULL_SCANS, // # of full scans
  847. IPW_ORD_CARD_DISABLED, // # Card Disabled
  848. IPW_ORD_STAT_ROAM_INHIBIT, // # of times roaming was inhibited due to ongoing activity
  849. IPW_FILLER_40,
  850. IPW_ORD_RSSI_AT_ASSN = 160, // RSSI of associated AP at time of association
  851. IPW_ORD_STAT_ASSN_CAUSE1, // # of reassociations due to no tx from AP in last N
  852. // hops or no prob_ responses in last 3 minutes
  853. IPW_ORD_STAT_ASSN_CAUSE2, // # of reassociations due to poor tx/rx quality
  854. IPW_ORD_STAT_ASSN_CAUSE3, // # of reassociations due to tx/rx quality with excessive
  855. // load at the AP
  856. IPW_ORD_STAT_ASSN_CAUSE4, // # of reassociations due to AP RSSI level fell below
  857. // eligible group
  858. IPW_ORD_STAT_ASSN_CAUSE5, // # of reassociations due to load leveling
  859. IPW_ORD_STAT_ASSN_CAUSE6, //NS // # of reassociations due to dropped by Ap
  860. IPW_FILLER_41,
  861. IPW_FILLER_42,
  862. IPW_FILLER_43,
  863. IPW_ORD_STAT_AUTH_FAIL, // # of times authentication failed
  864. IPW_ORD_STAT_AUTH_RESP_FAIL, // # of times authentication response failed
  865. IPW_ORD_STATION_TABLE_CNT, // # of entries in association table
  866. // Other statistics
  867. IPW_ORD_RSSI_AVG_CURR = 173, // Current avg RSSI
  868. IPW_ORD_STEST_RESULTS_CURR, //NS // Current self test results word
  869. IPW_ORD_STEST_RESULTS_CUM, //NS // Cummulative self test results word
  870. IPW_ORD_SELF_TEST_STATUS, //NS //
  871. IPW_ORD_POWER_MGMT_MODE, // Power mode - 0=CAM, 1=PSP
  872. IPW_ORD_POWER_MGMT_INDEX, //NS //
  873. IPW_ORD_COUNTRY_CODE, // IEEE country code as recv'd from beacon
  874. IPW_ORD_COUNTRY_CHANNELS, // channels supported by country
  875. // IPW_ORD_COUNTRY_CHANNELS:
  876. // For 11b the lower 2-byte are used for channels from 1-14
  877. // and the higher 2-byte are not used.
  878. IPW_ORD_RESET_CNT, // # of adapter resets (warm)
  879. IPW_ORD_BEACON_INTERVAL, // Beacon interval
  880. IPW_ORD_PRINCETON_VERSION = 184, //NS // Princeton Version
  881. IPW_ORD_ANTENNA_DIVERSITY, // TRUE if antenna diversity is disabled
  882. IPW_ORD_CCA_RSSI, //NS // CCA RSSI value (factory programmed)
  883. IPW_ORD_STAT_EEPROM_UPDATE, //NS // # of times config EEPROM updated
  884. IPW_ORD_DTIM_PERIOD, // # of beacon intervals between DTIMs
  885. IPW_ORD_OUR_FREQ, // current radio freq lower digits - channel ID
  886. IPW_ORD_RTC_TIME = 190, // current RTC time
  887. IPW_ORD_PORT_TYPE, // operating mode
  888. IPW_ORD_CURRENT_TX_RATE, // current tx rate
  889. IPW_ORD_SUPPORTED_RATES, // Bitmap of supported tx rates
  890. IPW_ORD_ATIM_WINDOW, // current ATIM Window
  891. IPW_ORD_BASIC_RATES, // bitmap of basic tx rates
  892. IPW_ORD_NIC_HIGHEST_RATE, // bitmap of basic tx rates
  893. IPW_ORD_AP_HIGHEST_RATE, // bitmap of basic tx rates
  894. IPW_ORD_CAPABILITIES, // Management frame capability field
  895. IPW_ORD_AUTH_TYPE, // Type of authentication
  896. IPW_ORD_RADIO_TYPE, // Adapter card platform type
  897. IPW_ORD_RTS_THRESHOLD = 201, // Min length of packet after which RTS handshaking is used
  898. IPW_ORD_INT_MODE, // International mode
  899. IPW_ORD_FRAGMENTATION_THRESHOLD, // protocol frag threshold
  900. IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS, // EEPROM offset in SRAM
  901. IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE, // EEPROM size in SRAM
  902. IPW_ORD_EEPROM_SKU_CAPABILITY, // EEPROM SKU Capability 206 =
  903. IPW_ORD_EEPROM_IBSS_11B_CHANNELS, // EEPROM IBSS 11b channel set
  904. IPW_ORD_MAC_VERSION = 209, // MAC Version
  905. IPW_ORD_MAC_REVISION, // MAC Revision
  906. IPW_ORD_RADIO_VERSION, // Radio Version
  907. IPW_ORD_NIC_MANF_DATE_TIME, // MANF Date/Time STAMP
  908. IPW_ORD_UCODE_VERSION, // Ucode Version
  909. IPW_ORD_HW_RF_SWITCH_STATE = 214, // HW RF Kill Switch State
  910. } ORDINALTABLE1;
  911. // ordinal table 2
  912. // Variable length data:
  913. #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL 1001
  914. typedef enum _ORDINAL_TABLE_2 { // NS - means Not Supported by FW
  915. IPW_ORD_STAT_BASE = 1000, // contains number of variable ORDs
  916. IPW_ORD_STAT_ADAPTER_MAC = 1001, // 6 bytes: our adapter MAC address
  917. IPW_ORD_STAT_PREFERRED_BSSID = 1002, // 6 bytes: BSSID of the preferred AP
  918. IPW_ORD_STAT_MANDATORY_BSSID = 1003, // 6 bytes: BSSID of the mandatory AP
  919. IPW_FILL_1, //NS //
  920. IPW_ORD_STAT_COUNTRY_TEXT = 1005, // 36 bytes: Country name text, First two bytes are Country code
  921. IPW_ORD_STAT_ASSN_SSID = 1006, // 32 bytes: ESSID String
  922. IPW_ORD_STATION_TABLE = 1007, // ? bytes: Station/AP table (via Direct SSID Scans)
  923. IPW_ORD_STAT_SWEEP_TABLE = 1008, // ? bytes: Sweep/Host Table table (via Broadcast Scans)
  924. IPW_ORD_STAT_ROAM_LOG = 1009, // ? bytes: Roaming log
  925. IPW_ORD_STAT_RATE_LOG = 1010, //NS // 0 bytes: Rate log
  926. IPW_ORD_STAT_FIFO = 1011, //NS // 0 bytes: Fifo buffer data structures
  927. IPW_ORD_STAT_FW_VER_NUM = 1012, // 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
  928. IPW_ORD_STAT_FW_DATE = 1013, // 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
  929. IPW_ORD_STAT_ASSN_AP_BSSID = 1014, // 6 bytes: MAC address of associated AP
  930. IPW_ORD_STAT_DEBUG = 1015, //NS // ? bytes:
  931. IPW_ORD_STAT_NIC_BPA_NUM = 1016, // 11 bytes: NIC BPA number in ASCII
  932. IPW_ORD_STAT_UCODE_DATE = 1017, // 5 bytes: uCode date
  933. IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
  934. } ORDINALTABLE2; // NS - means Not Supported by FW
  935. #define IPW_LAST_VARIABLE_LENGTH_ORDINAL 1018
  936. #ifndef WIRELESS_SPY
  937. #define WIRELESS_SPY // enable iwspy support
  938. #endif
  939. #define IPW_HOST_FW_SHARED_AREA0 0x0002f200
  940. #define IPW_HOST_FW_SHARED_AREA0_END 0x0002f510 // 0x310 bytes
  941. #define IPW_HOST_FW_SHARED_AREA1 0x0002f610
  942. #define IPW_HOST_FW_SHARED_AREA1_END 0x0002f630 // 0x20 bytes
  943. #define IPW_HOST_FW_SHARED_AREA2 0x0002fa00
  944. #define IPW_HOST_FW_SHARED_AREA2_END 0x0002fa20 // 0x20 bytes
  945. #define IPW_HOST_FW_SHARED_AREA3 0x0002fc00
  946. #define IPW_HOST_FW_SHARED_AREA3_END 0x0002fc10 // 0x10 bytes
  947. #define IPW_HOST_FW_INTERRUPT_AREA 0x0002ff80
  948. #define IPW_HOST_FW_INTERRUPT_AREA_END 0x00030000 // 0x80 bytes
  949. struct ipw2100_fw_chunk {
  950. unsigned char *buf;
  951. long len;
  952. long pos;
  953. struct list_head list;
  954. };
  955. struct ipw2100_fw_chunk_set {
  956. const void *data;
  957. unsigned long size;
  958. };
  959. struct ipw2100_fw {
  960. int version;
  961. struct ipw2100_fw_chunk_set fw;
  962. struct ipw2100_fw_chunk_set uc;
  963. const struct firmware *fw_entry;
  964. };
  965. #define MAX_FW_VERSION_LEN 14
  966. #endif /* _IPW2100_H */