eeprom.c 10 KB

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  1. /*
  2. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  3. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #include <linux/of.h>
  15. #include <linux/mtd/mtd.h>
  16. #include <linux/mtd/partitions.h>
  17. #include <linux/etherdevice.h>
  18. #include <asm/unaligned.h>
  19. #include "mt7601u.h"
  20. #include "eeprom.h"
  21. static bool
  22. field_valid(u8 val)
  23. {
  24. return val != 0xff;
  25. }
  26. static s8
  27. field_validate(u8 val)
  28. {
  29. if (!field_valid(val))
  30. return 0;
  31. return val;
  32. }
  33. static int
  34. mt7601u_efuse_read(struct mt7601u_dev *dev, u16 addr, u8 *data,
  35. enum mt7601u_eeprom_access_modes mode)
  36. {
  37. u32 val;
  38. int i;
  39. val = mt76_rr(dev, MT_EFUSE_CTRL);
  40. val &= ~(MT_EFUSE_CTRL_AIN |
  41. MT_EFUSE_CTRL_MODE);
  42. val |= MT76_SET(MT_EFUSE_CTRL_AIN, addr & ~0xf) |
  43. MT76_SET(MT_EFUSE_CTRL_MODE, mode) |
  44. MT_EFUSE_CTRL_KICK;
  45. mt76_wr(dev, MT_EFUSE_CTRL, val);
  46. if (!mt76_poll(dev, MT_EFUSE_CTRL, MT_EFUSE_CTRL_KICK, 0, 1000))
  47. return -ETIMEDOUT;
  48. val = mt76_rr(dev, MT_EFUSE_CTRL);
  49. if ((val & MT_EFUSE_CTRL_AOUT) == MT_EFUSE_CTRL_AOUT) {
  50. /* Parts of eeprom not in the usage map (0x80-0xc0,0xf0)
  51. * will not return valid data but it's ok.
  52. */
  53. memset(data, 0xff, 16);
  54. return 0;
  55. }
  56. for (i = 0; i < 4; i++) {
  57. val = mt76_rr(dev, MT_EFUSE_DATA(i));
  58. put_unaligned_le32(val, data + 4 * i);
  59. }
  60. return 0;
  61. }
  62. static int
  63. mt7601u_efuse_physical_size_check(struct mt7601u_dev *dev)
  64. {
  65. const int map_reads = DIV_ROUND_UP(MT_EFUSE_USAGE_MAP_SIZE, 16);
  66. u8 data[map_reads * 16];
  67. int ret, i;
  68. u32 start = 0, end = 0, cnt_free;
  69. for (i = 0; i < map_reads; i++) {
  70. ret = mt7601u_efuse_read(dev, MT_EE_USAGE_MAP_START + i * 16,
  71. data + i * 16, MT_EE_PHYSICAL_READ);
  72. if (ret)
  73. return ret;
  74. }
  75. for (i = 0; i < MT_EFUSE_USAGE_MAP_SIZE; i++)
  76. if (!data[i]) {
  77. if (!start)
  78. start = MT_EE_USAGE_MAP_START + i;
  79. end = MT_EE_USAGE_MAP_START + i;
  80. }
  81. cnt_free = end - start + 1;
  82. if (MT_EFUSE_USAGE_MAP_SIZE - cnt_free < 5) {
  83. dev_err(dev->dev, "Error: your device needs default EEPROM file and this driver doesn't support it!\n");
  84. return -EINVAL;
  85. }
  86. return 0;
  87. }
  88. static bool
  89. mt7601u_has_tssi(struct mt7601u_dev *dev, u8 *eeprom)
  90. {
  91. u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
  92. return ~nic_conf1 && (nic_conf1 & MT_EE_NIC_CONF_1_TX_ALC_EN);
  93. }
  94. static void
  95. mt7601u_set_chip_cap(struct mt7601u_dev *dev, u8 *eeprom)
  96. {
  97. u16 nic_conf0 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_0);
  98. u16 nic_conf1 = get_unaligned_le16(eeprom + MT_EE_NIC_CONF_1);
  99. if (!field_valid(nic_conf1 & 0xff))
  100. nic_conf1 &= 0xff00;
  101. dev->ee->tssi_enabled = mt7601u_has_tssi(dev, eeprom) &&
  102. !(nic_conf1 & MT_EE_NIC_CONF_1_TEMP_TX_ALC);
  103. if (nic_conf1 & MT_EE_NIC_CONF_1_HW_RF_CTRL)
  104. dev_err(dev->dev,
  105. "Error: this driver does not support HW RF ctrl\n");
  106. if (!field_valid(nic_conf0 >> 8))
  107. return;
  108. if (MT76_GET(MT_EE_NIC_CONF_0_RX_PATH, nic_conf0) > 1 ||
  109. MT76_GET(MT_EE_NIC_CONF_0_TX_PATH, nic_conf0) > 1)
  110. dev_err(dev->dev,
  111. "Error: device has more than 1 RX/TX stream!\n");
  112. }
  113. static int
  114. mt7601u_set_macaddr(struct mt7601u_dev *dev, const u8 *eeprom)
  115. {
  116. const void *src = eeprom + MT_EE_MAC_ADDR;
  117. ether_addr_copy(dev->macaddr, src);
  118. if (!is_valid_ether_addr(dev->macaddr)) {
  119. eth_random_addr(dev->macaddr);
  120. dev_info(dev->dev,
  121. "Invalid MAC address, using random address %pM\n",
  122. dev->macaddr);
  123. }
  124. mt76_wr(dev, MT_MAC_ADDR_DW0, get_unaligned_le32(dev->macaddr));
  125. mt76_wr(dev, MT_MAC_ADDR_DW1, get_unaligned_le16(dev->macaddr + 4) |
  126. MT76_SET(MT_MAC_ADDR_DW1_U2ME_MASK, 0xff));
  127. return 0;
  128. }
  129. static void mt7601u_set_channel_target_power(struct mt7601u_dev *dev,
  130. u8 *eeprom, u8 max_pwr)
  131. {
  132. u8 trgt_pwr = eeprom[MT_EE_TX_TSSI_TARGET_POWER];
  133. if (trgt_pwr > max_pwr || !trgt_pwr) {
  134. dev_warn(dev->dev, "Error: EEPROM trgt power invalid %hhx!\n",
  135. trgt_pwr);
  136. trgt_pwr = 0x20;
  137. }
  138. memset(dev->ee->chan_pwr, trgt_pwr, sizeof(dev->ee->chan_pwr));
  139. }
  140. static void
  141. mt7601u_set_channel_power(struct mt7601u_dev *dev, u8 *eeprom)
  142. {
  143. u32 i, val;
  144. u8 max_pwr;
  145. val = mt7601u_rr(dev, MT_TX_ALC_CFG_0);
  146. max_pwr = MT76_GET(MT_TX_ALC_CFG_0_LIMIT_0, val);
  147. if (mt7601u_has_tssi(dev, eeprom)) {
  148. mt7601u_set_channel_target_power(dev, eeprom, max_pwr);
  149. return;
  150. }
  151. for (i = 0; i < 14; i++) {
  152. s8 power = field_validate(eeprom[MT_EE_TX_POWER_OFFSET + i]);
  153. if (power > max_pwr || power < 0)
  154. power = MT7601U_DEFAULT_TX_POWER;
  155. dev->ee->chan_pwr[i] = power;
  156. }
  157. }
  158. static void
  159. mt7601u_set_country_reg(struct mt7601u_dev *dev, u8 *eeprom)
  160. {
  161. /* Note: - region 31 is not valid for mt7601u (see rtmp_init.c)
  162. * - comments in rtmp_def.h are incorrect (see rt_channel.c)
  163. */
  164. static const struct reg_channel_bounds chan_bounds[] = {
  165. /* EEPROM country regions 0 - 7 */
  166. { 1, 11 }, { 1, 13 }, { 10, 2 }, { 10, 4 },
  167. { 14, 1 }, { 1, 14 }, { 3, 7 }, { 5, 9 },
  168. /* EEPROM country regions 32 - 33 */
  169. { 1, 11 }, { 1, 14 }
  170. };
  171. u8 val = eeprom[MT_EE_COUNTRY_REGION];
  172. int idx = -1;
  173. if (val < 8)
  174. idx = val;
  175. if (val > 31 && val < 33)
  176. idx = val - 32 + 8;
  177. if (idx != -1)
  178. dev_info(dev->dev,
  179. "EEPROM country region %02hhx (channels %hhd-%hhd)\n",
  180. val, chan_bounds[idx].start,
  181. chan_bounds[idx].start + chan_bounds[idx].num - 1);
  182. else
  183. idx = 5; /* channels 1 - 14 */
  184. dev->ee->reg = chan_bounds[idx];
  185. /* TODO: country region 33 is special - phy should be set to B-mode
  186. * before entering channel 14 (see sta/connect.c)
  187. */
  188. }
  189. static void
  190. mt7601u_set_rf_freq_off(struct mt7601u_dev *dev, u8 *eeprom)
  191. {
  192. u8 comp;
  193. dev->ee->rf_freq_off = field_validate(eeprom[MT_EE_FREQ_OFFSET]);
  194. comp = field_validate(eeprom[MT_EE_FREQ_OFFSET_COMPENSATION]);
  195. if (comp & BIT(7))
  196. dev->ee->rf_freq_off -= comp & 0x7f;
  197. else
  198. dev->ee->rf_freq_off += comp;
  199. }
  200. static void
  201. mt7601u_set_rssi_offset(struct mt7601u_dev *dev, u8 *eeprom)
  202. {
  203. int i;
  204. s8 *rssi_offset = dev->ee->rssi_offset;
  205. for (i = 0; i < 2; i++) {
  206. rssi_offset[i] = eeprom[MT_EE_RSSI_OFFSET + i];
  207. if (rssi_offset[i] < -10 || rssi_offset[i] > 10) {
  208. dev_warn(dev->dev,
  209. "Warning: EEPROM RSSI is invalid %02hhx\n",
  210. rssi_offset[i]);
  211. rssi_offset[i] = 0;
  212. }
  213. }
  214. }
  215. static void
  216. mt7601u_extra_power_over_mac(struct mt7601u_dev *dev)
  217. {
  218. u32 val;
  219. val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_1) & 0x0000ff00) >> 8);
  220. val |= ((mt7601u_rr(dev, MT_TX_PWR_CFG_2) & 0x0000ff00) << 8);
  221. mt7601u_wr(dev, MT_TX_PWR_CFG_7, val);
  222. val = ((mt7601u_rr(dev, MT_TX_PWR_CFG_4) & 0x0000ff00) >> 8);
  223. mt7601u_wr(dev, MT_TX_PWR_CFG_9, val);
  224. }
  225. static void
  226. mt7601u_set_power_rate(struct power_per_rate *rate, s8 delta, u8 value)
  227. {
  228. /* Invalid? Note: vendor driver does not handle this */
  229. if (value == 0xff)
  230. return;
  231. rate->raw = s6_validate(value);
  232. rate->bw20 = s6_to_int(value);
  233. /* Note: vendor driver does cap the value to s6 right away */
  234. rate->bw40 = rate->bw20 + delta;
  235. }
  236. static void
  237. mt7601u_save_power_rate(struct mt7601u_dev *dev, s8 delta, u32 val, int i)
  238. {
  239. struct mt7601u_rate_power *t = &dev->ee->power_rate_table;
  240. switch (i) {
  241. case 0:
  242. mt7601u_set_power_rate(&t->cck[0], delta, (val >> 0) & 0xff);
  243. mt7601u_set_power_rate(&t->cck[1], delta, (val >> 8) & 0xff);
  244. /* Save cck bw20 for fixups of channel 14 */
  245. dev->ee->real_cck_bw20[0] = t->cck[0].bw20;
  246. dev->ee->real_cck_bw20[1] = t->cck[1].bw20;
  247. mt7601u_set_power_rate(&t->ofdm[0], delta, (val >> 16) & 0xff);
  248. mt7601u_set_power_rate(&t->ofdm[1], delta, (val >> 24) & 0xff);
  249. break;
  250. case 1:
  251. mt7601u_set_power_rate(&t->ofdm[2], delta, (val >> 0) & 0xff);
  252. mt7601u_set_power_rate(&t->ofdm[3], delta, (val >> 8) & 0xff);
  253. mt7601u_set_power_rate(&t->ht[0], delta, (val >> 16) & 0xff);
  254. mt7601u_set_power_rate(&t->ht[1], delta, (val >> 24) & 0xff);
  255. break;
  256. case 2:
  257. mt7601u_set_power_rate(&t->ht[2], delta, (val >> 0) & 0xff);
  258. mt7601u_set_power_rate(&t->ht[3], delta, (val >> 8) & 0xff);
  259. break;
  260. }
  261. }
  262. static s8
  263. get_delta(u8 val)
  264. {
  265. s8 ret;
  266. if (!field_valid(val) || !(val & BIT(7)))
  267. return 0;
  268. ret = val & 0x1f;
  269. if (ret > 8)
  270. ret = 8;
  271. if (val & BIT(6))
  272. ret = -ret;
  273. return ret;
  274. }
  275. static void
  276. mt7601u_config_tx_power_per_rate(struct mt7601u_dev *dev, u8 *eeprom)
  277. {
  278. u32 val;
  279. s8 bw40_delta;
  280. int i;
  281. bw40_delta = get_delta(eeprom[MT_EE_TX_POWER_DELTA_BW40]);
  282. for (i = 0; i < 5; i++) {
  283. val = get_unaligned_le32(eeprom + MT_EE_TX_POWER_BYRATE(i));
  284. mt7601u_save_power_rate(dev, bw40_delta, val, i);
  285. if (~val)
  286. mt7601u_wr(dev, MT_TX_PWR_CFG_0 + i * 4, val);
  287. }
  288. mt7601u_extra_power_over_mac(dev);
  289. }
  290. static void
  291. mt7601u_init_tssi_params(struct mt7601u_dev *dev, u8 *eeprom)
  292. {
  293. struct tssi_data *d = &dev->ee->tssi_data;
  294. if (!dev->ee->tssi_enabled)
  295. return;
  296. d->slope = eeprom[MT_EE_TX_TSSI_SLOPE];
  297. d->tx0_delta_offset = eeprom[MT_EE_TX_TSSI_OFFSET] * 1024;
  298. d->offset[0] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP];
  299. d->offset[1] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 1];
  300. d->offset[2] = eeprom[MT_EE_TX_TSSI_OFFSET_GROUP + 2];
  301. }
  302. int
  303. mt7601u_eeprom_init(struct mt7601u_dev *dev)
  304. {
  305. u8 *eeprom;
  306. int i, ret;
  307. ret = mt7601u_efuse_physical_size_check(dev);
  308. if (ret)
  309. return ret;
  310. dev->ee = devm_kzalloc(dev->dev, sizeof(*dev->ee), GFP_KERNEL);
  311. if (!dev->ee)
  312. return -ENOMEM;
  313. eeprom = kmalloc(MT7601U_EEPROM_SIZE, GFP_KERNEL);
  314. if (!eeprom)
  315. return -ENOMEM;
  316. for (i = 0; i + 16 <= MT7601U_EEPROM_SIZE; i += 16) {
  317. ret = mt7601u_efuse_read(dev, i, eeprom + i, MT_EE_READ);
  318. if (ret)
  319. goto out;
  320. }
  321. if (eeprom[MT_EE_VERSION_EE] > MT7601U_EE_MAX_VER)
  322. dev_warn(dev->dev,
  323. "Warning: unsupported EEPROM version %02hhx\n",
  324. eeprom[MT_EE_VERSION_EE]);
  325. dev_info(dev->dev, "EEPROM ver:%02hhx fae:%02hhx\n",
  326. eeprom[MT_EE_VERSION_EE], eeprom[MT_EE_VERSION_FAE]);
  327. mt7601u_set_macaddr(dev, eeprom);
  328. mt7601u_set_chip_cap(dev, eeprom);
  329. mt7601u_set_channel_power(dev, eeprom);
  330. mt7601u_set_country_reg(dev, eeprom);
  331. mt7601u_set_rf_freq_off(dev, eeprom);
  332. mt7601u_set_rssi_offset(dev, eeprom);
  333. dev->ee->ref_temp = eeprom[MT_EE_REF_TEMP];
  334. dev->ee->lna_gain = eeprom[MT_EE_LNA_GAIN];
  335. mt7601u_config_tx_power_per_rate(dev, eeprom);
  336. mt7601u_init_tssi_params(dev, eeprom);
  337. out:
  338. kfree(eeprom);
  339. return ret;
  340. }