mcu.c 13 KB

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  1. /*
  2. * (c) Copyright 2002-2010, Ralink Technology, Inc.
  3. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  4. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2
  8. * as published by the Free Software Foundation
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <linux/kernel.h>
  16. #include <linux/firmware.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb.h>
  19. #include <linux/skbuff.h>
  20. #include "mt7601u.h"
  21. #include "dma.h"
  22. #include "mcu.h"
  23. #include "usb.h"
  24. #include "trace.h"
  25. #define MCU_FW_URB_MAX_PAYLOAD 0x3800
  26. #define MCU_FW_URB_SIZE (MCU_FW_URB_MAX_PAYLOAD + 12)
  27. #define MCU_RESP_URB_SIZE 1024
  28. static inline int firmware_running(struct mt7601u_dev *dev)
  29. {
  30. return mt7601u_rr(dev, MT_MCU_COM_REG0) == 1;
  31. }
  32. static inline void skb_put_le32(struct sk_buff *skb, u32 val)
  33. {
  34. put_unaligned_le32(val, skb_put(skb, 4));
  35. }
  36. static inline void mt7601u_dma_skb_wrap_cmd(struct sk_buff *skb,
  37. u8 seq, enum mcu_cmd cmd)
  38. {
  39. WARN_ON(mt7601u_dma_skb_wrap(skb, CPU_TX_PORT, DMA_COMMAND,
  40. MT76_SET(MT_TXD_CMD_INFO_SEQ, seq) |
  41. MT76_SET(MT_TXD_CMD_INFO_TYPE, cmd)));
  42. }
  43. static inline void trace_mt_mcu_msg_send_cs(struct mt7601u_dev *dev,
  44. struct sk_buff *skb, bool need_resp)
  45. {
  46. u32 i, csum = 0;
  47. for (i = 0; i < skb->len / 4; i++)
  48. csum ^= get_unaligned_le32(skb->data + i * 4);
  49. trace_mt_mcu_msg_send(dev, skb, csum, need_resp);
  50. }
  51. static struct sk_buff *
  52. mt7601u_mcu_msg_alloc(struct mt7601u_dev *dev, const void *data, int len)
  53. {
  54. struct sk_buff *skb;
  55. WARN_ON(len % 4); /* if length is not divisible by 4 we need to pad */
  56. skb = alloc_skb(len + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
  57. if (skb) {
  58. skb_reserve(skb, MT_DMA_HDR_LEN);
  59. memcpy(skb_put(skb, len), data, len);
  60. }
  61. return skb;
  62. }
  63. static int mt7601u_mcu_wait_resp(struct mt7601u_dev *dev, u8 seq)
  64. {
  65. struct urb *urb = dev->mcu.resp.urb;
  66. u32 rxfce;
  67. int urb_status, ret, i = 5;
  68. while (i--) {
  69. if (!wait_for_completion_timeout(&dev->mcu.resp_cmpl,
  70. msecs_to_jiffies(300))) {
  71. dev_warn(dev->dev, "Warning: %s retrying\n", __func__);
  72. continue;
  73. }
  74. /* Make copies of important data before reusing the urb */
  75. rxfce = get_unaligned_le32(dev->mcu.resp.buf);
  76. urb_status = urb->status * mt7601u_urb_has_error(urb);
  77. ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
  78. &dev->mcu.resp, GFP_KERNEL,
  79. mt7601u_complete_urb,
  80. &dev->mcu.resp_cmpl);
  81. if (ret)
  82. return ret;
  83. if (urb_status)
  84. dev_err(dev->dev, "Error: MCU resp urb failed:%d\n",
  85. urb_status);
  86. if (MT76_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce) == seq &&
  87. MT76_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce) == CMD_DONE)
  88. return 0;
  89. dev_err(dev->dev, "Error: MCU resp evt:%hhx seq:%hhx-%hhx!\n",
  90. MT76_GET(MT_RXD_CMD_INFO_EVT_TYPE, rxfce),
  91. seq, MT76_GET(MT_RXD_CMD_INFO_CMD_SEQ, rxfce));
  92. }
  93. dev_err(dev->dev, "Error: %s timed out\n", __func__);
  94. return -ETIMEDOUT;
  95. }
  96. static int
  97. mt7601u_mcu_msg_send(struct mt7601u_dev *dev, struct sk_buff *skb,
  98. enum mcu_cmd cmd, bool wait_resp)
  99. {
  100. struct usb_device *usb_dev = mt7601u_to_usb_dev(dev);
  101. unsigned cmd_pipe = usb_sndbulkpipe(usb_dev,
  102. dev->out_eps[MT_EP_OUT_INBAND_CMD]);
  103. int sent, ret;
  104. u8 seq = 0;
  105. if (test_bit(MT7601U_STATE_REMOVED, &dev->state))
  106. return 0;
  107. mutex_lock(&dev->mcu.mutex);
  108. if (wait_resp)
  109. while (!seq)
  110. seq = ++dev->mcu.msg_seq & 0xf;
  111. mt7601u_dma_skb_wrap_cmd(skb, seq, cmd);
  112. if (dev->mcu.resp_cmpl.done)
  113. dev_err(dev->dev, "Error: MCU response pre-completed!\n");
  114. trace_mt_mcu_msg_send_cs(dev, skb, wait_resp);
  115. trace_mt_submit_urb_sync(dev, cmd_pipe, skb->len);
  116. ret = usb_bulk_msg(usb_dev, cmd_pipe, skb->data, skb->len, &sent, 500);
  117. if (ret) {
  118. dev_err(dev->dev, "Error: send MCU cmd failed:%d\n", ret);
  119. goto out;
  120. }
  121. if (sent != skb->len)
  122. dev_err(dev->dev, "Error: %s sent != skb->len\n", __func__);
  123. if (wait_resp)
  124. ret = mt7601u_mcu_wait_resp(dev, seq);
  125. out:
  126. mutex_unlock(&dev->mcu.mutex);
  127. consume_skb(skb);
  128. return ret;
  129. }
  130. static int mt7601u_mcu_function_select(struct mt7601u_dev *dev,
  131. enum mcu_function func, u32 val)
  132. {
  133. struct sk_buff *skb;
  134. struct {
  135. __le32 id;
  136. __le32 value;
  137. } __packed __aligned(4) msg = {
  138. .id = cpu_to_le32(func),
  139. .value = cpu_to_le32(val),
  140. };
  141. skb = mt7601u_mcu_msg_alloc(dev, &msg, sizeof(msg));
  142. if (!skb)
  143. return -ENOMEM;
  144. return mt7601u_mcu_msg_send(dev, skb, CMD_FUN_SET_OP, func == 5);
  145. }
  146. int mt7601u_mcu_tssi_read_kick(struct mt7601u_dev *dev, int use_hvga)
  147. {
  148. int ret;
  149. if (!test_bit(MT7601U_STATE_MCU_RUNNING, &dev->state))
  150. return 0;
  151. ret = mt7601u_mcu_function_select(dev, ATOMIC_TSSI_SETTING,
  152. use_hvga);
  153. if (ret) {
  154. dev_warn(dev->dev, "Warning: MCU TSSI read kick failed\n");
  155. return ret;
  156. }
  157. dev->tssi_read_trig = true;
  158. return 0;
  159. }
  160. int
  161. mt7601u_mcu_calibrate(struct mt7601u_dev *dev, enum mcu_calibrate cal, u32 val)
  162. {
  163. struct sk_buff *skb;
  164. struct {
  165. __le32 id;
  166. __le32 value;
  167. } __packed __aligned(4) msg = {
  168. .id = cpu_to_le32(cal),
  169. .value = cpu_to_le32(val),
  170. };
  171. skb = mt7601u_mcu_msg_alloc(dev, &msg, sizeof(msg));
  172. if (!skb)
  173. return -ENOMEM;
  174. return mt7601u_mcu_msg_send(dev, skb, CMD_CALIBRATION_OP, true);
  175. }
  176. int mt7601u_write_reg_pairs(struct mt7601u_dev *dev, u32 base,
  177. const struct mt76_reg_pair *data, int n)
  178. {
  179. const int max_vals_per_cmd = INBAND_PACKET_MAX_LEN / 8;
  180. struct sk_buff *skb;
  181. int cnt, i, ret;
  182. if (!n)
  183. return 0;
  184. cnt = min(max_vals_per_cmd, n);
  185. skb = alloc_skb(cnt * 8 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
  186. if (!skb)
  187. return -ENOMEM;
  188. skb_reserve(skb, MT_DMA_HDR_LEN);
  189. for (i = 0; i < cnt; i++) {
  190. skb_put_le32(skb, base + data[i].reg);
  191. skb_put_le32(skb, data[i].value);
  192. }
  193. ret = mt7601u_mcu_msg_send(dev, skb, CMD_RANDOM_WRITE, cnt == n);
  194. if (ret)
  195. return ret;
  196. return mt7601u_write_reg_pairs(dev, base, data + cnt, n - cnt);
  197. }
  198. int mt7601u_burst_write_regs(struct mt7601u_dev *dev, u32 offset,
  199. const u32 *data, int n)
  200. {
  201. const int max_regs_per_cmd = INBAND_PACKET_MAX_LEN / 4 - 1;
  202. struct sk_buff *skb;
  203. int cnt, i, ret;
  204. if (!n)
  205. return 0;
  206. cnt = min(max_regs_per_cmd, n);
  207. skb = alloc_skb(cnt * 4 + MT_DMA_HDR_LEN + 4, GFP_KERNEL);
  208. if (!skb)
  209. return -ENOMEM;
  210. skb_reserve(skb, MT_DMA_HDR_LEN);
  211. skb_put_le32(skb, MT_MCU_MEMMAP_WLAN + offset);
  212. for (i = 0; i < cnt; i++)
  213. skb_put_le32(skb, data[i]);
  214. ret = mt7601u_mcu_msg_send(dev, skb, CMD_BURST_WRITE, cnt == n);
  215. if (ret)
  216. return ret;
  217. return mt7601u_burst_write_regs(dev, offset + cnt * 4,
  218. data + cnt, n - cnt);
  219. }
  220. struct mt76_fw_header {
  221. __le32 ilm_len;
  222. __le32 dlm_len;
  223. __le16 build_ver;
  224. __le16 fw_ver;
  225. u8 pad[4];
  226. char build_time[16];
  227. };
  228. struct mt76_fw {
  229. struct mt76_fw_header hdr;
  230. u8 ivb[MT_MCU_IVB_SIZE];
  231. u8 ilm[];
  232. };
  233. static int __mt7601u_dma_fw(struct mt7601u_dev *dev,
  234. const struct mt7601u_dma_buf *dma_buf,
  235. const void *data, u32 len, u32 dst_addr)
  236. {
  237. DECLARE_COMPLETION_ONSTACK(cmpl);
  238. struct mt7601u_dma_buf buf = *dma_buf; /* we need to fake length */
  239. __le32 reg;
  240. u32 val;
  241. int ret;
  242. reg = cpu_to_le32(MT76_SET(MT_TXD_INFO_TYPE, DMA_PACKET) |
  243. MT76_SET(MT_TXD_INFO_D_PORT, CPU_TX_PORT) |
  244. MT76_SET(MT_TXD_INFO_LEN, len));
  245. memcpy(buf.buf, &reg, sizeof(reg));
  246. memcpy(buf.buf + sizeof(reg), data, len);
  247. memset(buf.buf + sizeof(reg) + len, 0, 8);
  248. ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
  249. MT_FCE_DMA_ADDR, dst_addr);
  250. if (ret)
  251. return ret;
  252. len = roundup(len, 4);
  253. ret = mt7601u_vendor_single_wr(dev, MT_VEND_WRITE_FCE,
  254. MT_FCE_DMA_LEN, len << 16);
  255. if (ret)
  256. return ret;
  257. buf.len = MT_DMA_HDR_LEN + len + 4;
  258. ret = mt7601u_usb_submit_buf(dev, USB_DIR_OUT, MT_EP_OUT_INBAND_CMD,
  259. &buf, GFP_KERNEL,
  260. mt7601u_complete_urb, &cmpl);
  261. if (ret)
  262. return ret;
  263. if (!wait_for_completion_timeout(&cmpl, msecs_to_jiffies(1000))) {
  264. dev_err(dev->dev, "Error: firmware upload timed out\n");
  265. usb_kill_urb(buf.urb);
  266. return -ETIMEDOUT;
  267. }
  268. if (mt7601u_urb_has_error(buf.urb)) {
  269. dev_err(dev->dev, "Error: firmware upload urb failed:%d\n",
  270. buf.urb->status);
  271. return buf.urb->status;
  272. }
  273. val = mt7601u_rr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX);
  274. val++;
  275. mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_CPU_DESC_IDX, val);
  276. return 0;
  277. }
  278. static int
  279. mt7601u_dma_fw(struct mt7601u_dev *dev, struct mt7601u_dma_buf *dma_buf,
  280. const void *data, int len, u32 dst_addr)
  281. {
  282. int n, ret;
  283. if (len == 0)
  284. return 0;
  285. n = min(MCU_FW_URB_MAX_PAYLOAD, len);
  286. ret = __mt7601u_dma_fw(dev, dma_buf, data, n, dst_addr);
  287. if (ret)
  288. return ret;
  289. if (!mt76_poll_msec(dev, MT_MCU_COM_REG1, BIT(31), BIT(31), 500))
  290. return -ETIMEDOUT;
  291. return mt7601u_dma_fw(dev, dma_buf, data + n, len - n, dst_addr + n);
  292. }
  293. static int
  294. mt7601u_upload_firmware(struct mt7601u_dev *dev, const struct mt76_fw *fw)
  295. {
  296. struct mt7601u_dma_buf dma_buf;
  297. void *ivb;
  298. u32 ilm_len, dlm_len;
  299. int i, ret;
  300. ivb = kmemdup(fw->ivb, sizeof(fw->ivb), GFP_KERNEL);
  301. if (!ivb || mt7601u_usb_alloc_buf(dev, MCU_FW_URB_SIZE, &dma_buf)) {
  302. ret = -ENOMEM;
  303. goto error;
  304. }
  305. ilm_len = le32_to_cpu(fw->hdr.ilm_len) - sizeof(fw->ivb);
  306. dev_dbg(dev->dev, "loading FW - ILM %u + IVB %zu\n",
  307. ilm_len, sizeof(fw->ivb));
  308. ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm, ilm_len, sizeof(fw->ivb));
  309. if (ret)
  310. goto error;
  311. dlm_len = le32_to_cpu(fw->hdr.dlm_len);
  312. dev_dbg(dev->dev, "loading FW - DLM %u\n", dlm_len);
  313. ret = mt7601u_dma_fw(dev, &dma_buf, fw->ilm + ilm_len,
  314. dlm_len, MT_MCU_DLM_OFFSET);
  315. if (ret)
  316. goto error;
  317. ret = mt7601u_vendor_request(dev, MT_VEND_DEV_MODE, USB_DIR_OUT,
  318. 0x12, 0, ivb, sizeof(fw->ivb));
  319. if (ret < 0)
  320. goto error;
  321. ret = 0;
  322. for (i = 100; i && !firmware_running(dev); i--)
  323. msleep(10);
  324. if (!i) {
  325. ret = -ETIMEDOUT;
  326. goto error;
  327. }
  328. dev_dbg(dev->dev, "Firmware running!\n");
  329. error:
  330. kfree(ivb);
  331. mt7601u_usb_free_buf(dev, &dma_buf);
  332. return ret;
  333. }
  334. static int mt7601u_load_firmware(struct mt7601u_dev *dev)
  335. {
  336. const struct firmware *fw;
  337. const struct mt76_fw_header *hdr;
  338. int len, ret;
  339. u32 val;
  340. mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
  341. MT_USB_DMA_CFG_TX_BULK_EN));
  342. if (firmware_running(dev))
  343. return 0;
  344. ret = request_firmware(&fw, MT7601U_FIRMWARE, dev->dev);
  345. if (ret)
  346. return ret;
  347. if (!fw || !fw->data || fw->size < sizeof(*hdr))
  348. goto err_inv_fw;
  349. hdr = (const struct mt76_fw_header *) fw->data;
  350. if (le32_to_cpu(hdr->ilm_len) <= MT_MCU_IVB_SIZE)
  351. goto err_inv_fw;
  352. len = sizeof(*hdr);
  353. len += le32_to_cpu(hdr->ilm_len);
  354. len += le32_to_cpu(hdr->dlm_len);
  355. if (fw->size != len)
  356. goto err_inv_fw;
  357. val = le16_to_cpu(hdr->fw_ver);
  358. dev_info(dev->dev,
  359. "Firmware Version: %d.%d.%02d Build: %x Build time: %.16s\n",
  360. (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf,
  361. le16_to_cpu(hdr->build_ver), hdr->build_time);
  362. len = le32_to_cpu(hdr->ilm_len);
  363. mt7601u_wr(dev, 0x94c, 0);
  364. mt7601u_wr(dev, MT_FCE_PSE_CTRL, 0);
  365. mt7601u_vendor_reset(dev);
  366. msleep(5);
  367. mt7601u_wr(dev, 0xa44, 0);
  368. mt7601u_wr(dev, 0x230, 0x84210);
  369. mt7601u_wr(dev, 0x400, 0x80c00);
  370. mt7601u_wr(dev, 0x800, 1);
  371. mt7601u_rmw(dev, MT_PBF_CFG, 0, (MT_PBF_CFG_TX0Q_EN |
  372. MT_PBF_CFG_TX1Q_EN |
  373. MT_PBF_CFG_TX2Q_EN |
  374. MT_PBF_CFG_TX3Q_EN));
  375. mt7601u_wr(dev, MT_FCE_PSE_CTRL, 1);
  376. mt7601u_wr(dev, MT_USB_DMA_CFG, (MT_USB_DMA_CFG_RX_BULK_EN |
  377. MT_USB_DMA_CFG_TX_BULK_EN));
  378. val = mt76_set(dev, MT_USB_DMA_CFG, MT_USB_DMA_CFG_TX_CLR);
  379. val &= ~MT_USB_DMA_CFG_TX_CLR;
  380. mt7601u_wr(dev, MT_USB_DMA_CFG, val);
  381. /* FCE tx_fs_base_ptr */
  382. mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230);
  383. /* FCE tx_fs_max_cnt */
  384. mt7601u_wr(dev, MT_TX_CPU_FROM_FCE_MAX_COUNT, 1);
  385. /* FCE pdma enable */
  386. mt7601u_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44);
  387. /* FCE skip_fs_en */
  388. mt7601u_wr(dev, MT_FCE_SKIP_FS, 3);
  389. ret = mt7601u_upload_firmware(dev, (const struct mt76_fw *)fw->data);
  390. release_firmware(fw);
  391. return ret;
  392. err_inv_fw:
  393. dev_err(dev->dev, "Invalid firmware image\n");
  394. release_firmware(fw);
  395. return -ENOENT;
  396. }
  397. int mt7601u_mcu_init(struct mt7601u_dev *dev)
  398. {
  399. int ret;
  400. mutex_init(&dev->mcu.mutex);
  401. ret = mt7601u_load_firmware(dev);
  402. if (ret)
  403. return ret;
  404. set_bit(MT7601U_STATE_MCU_RUNNING, &dev->state);
  405. return 0;
  406. }
  407. int mt7601u_mcu_cmd_init(struct mt7601u_dev *dev)
  408. {
  409. int ret;
  410. ret = mt7601u_mcu_function_select(dev, Q_SELECT, 1);
  411. if (ret)
  412. return ret;
  413. init_completion(&dev->mcu.resp_cmpl);
  414. if (mt7601u_usb_alloc_buf(dev, MCU_RESP_URB_SIZE, &dev->mcu.resp)) {
  415. mt7601u_usb_free_buf(dev, &dev->mcu.resp);
  416. return -ENOMEM;
  417. }
  418. ret = mt7601u_usb_submit_buf(dev, USB_DIR_IN, MT_EP_IN_CMD_RESP,
  419. &dev->mcu.resp, GFP_KERNEL,
  420. mt7601u_complete_urb, &dev->mcu.resp_cmpl);
  421. if (ret) {
  422. mt7601u_usb_free_buf(dev, &dev->mcu.resp);
  423. return ret;
  424. }
  425. return 0;
  426. }
  427. void mt7601u_mcu_cmd_deinit(struct mt7601u_dev *dev)
  428. {
  429. usb_kill_urb(dev->mcu.resp.urb);
  430. mt7601u_usb_free_buf(dev, &dev->mcu.resp);
  431. }