rt2x00queue.h 21 KB

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  1. /*
  2. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  3. <http://rt2x00.serialmonkey.com>
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, see <http://www.gnu.org/licenses/>.
  14. */
  15. /*
  16. Module: rt2x00
  17. Abstract: rt2x00 queue datastructures and routines
  18. */
  19. #ifndef RT2X00QUEUE_H
  20. #define RT2X00QUEUE_H
  21. #include <linux/prefetch.h>
  22. /**
  23. * DOC: Entry frame size
  24. *
  25. * Ralink PCI devices demand the Frame size to be a multiple of 128 bytes,
  26. * for USB devices this restriction does not apply, but the value of
  27. * 2432 makes sense since it is big enough to contain the maximum fragment
  28. * size according to the ieee802.11 specs.
  29. * The aggregation size depends on support from the driver, but should
  30. * be something around 3840 bytes.
  31. */
  32. #define DATA_FRAME_SIZE 2432
  33. #define MGMT_FRAME_SIZE 256
  34. #define AGGREGATION_SIZE 3840
  35. /**
  36. * enum data_queue_qid: Queue identification
  37. *
  38. * @QID_AC_VO: AC VO queue
  39. * @QID_AC_VI: AC VI queue
  40. * @QID_AC_BE: AC BE queue
  41. * @QID_AC_BK: AC BK queue
  42. * @QID_HCCA: HCCA queue
  43. * @QID_MGMT: MGMT queue (prio queue)
  44. * @QID_RX: RX queue
  45. * @QID_OTHER: None of the above (don't use, only present for completeness)
  46. * @QID_BEACON: Beacon queue (value unspecified, don't send it to device)
  47. * @QID_ATIM: Atim queue (value unspecified, don't send it to device)
  48. */
  49. enum data_queue_qid {
  50. QID_AC_VO = 0,
  51. QID_AC_VI = 1,
  52. QID_AC_BE = 2,
  53. QID_AC_BK = 3,
  54. QID_HCCA = 4,
  55. QID_MGMT = 13,
  56. QID_RX = 14,
  57. QID_OTHER = 15,
  58. QID_BEACON,
  59. QID_ATIM,
  60. };
  61. /**
  62. * enum skb_frame_desc_flags: Flags for &struct skb_frame_desc
  63. *
  64. * @SKBDESC_DMA_MAPPED_RX: &skb_dma field has been mapped for RX
  65. * @SKBDESC_DMA_MAPPED_TX: &skb_dma field has been mapped for TX
  66. * @SKBDESC_IV_STRIPPED: Frame contained a IV/EIV provided by
  67. * mac80211 but was stripped for processing by the driver.
  68. * @SKBDESC_NOT_MAC80211: Frame didn't originate from mac80211,
  69. * don't try to pass it back.
  70. * @SKBDESC_DESC_IN_SKB: The descriptor is at the start of the
  71. * skb, instead of in the desc field.
  72. */
  73. enum skb_frame_desc_flags {
  74. SKBDESC_DMA_MAPPED_RX = 1 << 0,
  75. SKBDESC_DMA_MAPPED_TX = 1 << 1,
  76. SKBDESC_IV_STRIPPED = 1 << 2,
  77. SKBDESC_NOT_MAC80211 = 1 << 3,
  78. SKBDESC_DESC_IN_SKB = 1 << 4,
  79. };
  80. /**
  81. * struct skb_frame_desc: Descriptor information for the skb buffer
  82. *
  83. * This structure is placed over the driver_data array, this means that
  84. * this structure should not exceed the size of that array (40 bytes).
  85. *
  86. * @flags: Frame flags, see &enum skb_frame_desc_flags.
  87. * @desc_len: Length of the frame descriptor.
  88. * @tx_rate_idx: the index of the TX rate, used for TX status reporting
  89. * @tx_rate_flags: the TX rate flags, used for TX status reporting
  90. * @desc: Pointer to descriptor part of the frame.
  91. * Note that this pointer could point to something outside
  92. * of the scope of the skb->data pointer.
  93. * @iv: IV/EIV data used during encryption/decryption.
  94. * @skb_dma: (PCI-only) the DMA address associated with the sk buffer.
  95. * @entry: The entry to which this sk buffer belongs.
  96. */
  97. struct skb_frame_desc {
  98. u8 flags;
  99. u8 desc_len;
  100. u8 tx_rate_idx;
  101. u8 tx_rate_flags;
  102. void *desc;
  103. __le32 iv[2];
  104. dma_addr_t skb_dma;
  105. struct queue_entry *entry;
  106. };
  107. /**
  108. * get_skb_frame_desc - Obtain the rt2x00 frame descriptor from a sk_buff.
  109. * @skb: &struct sk_buff from where we obtain the &struct skb_frame_desc
  110. */
  111. static inline struct skb_frame_desc* get_skb_frame_desc(struct sk_buff *skb)
  112. {
  113. BUILD_BUG_ON(sizeof(struct skb_frame_desc) >
  114. IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
  115. return (struct skb_frame_desc *)&IEEE80211_SKB_CB(skb)->driver_data;
  116. }
  117. /**
  118. * enum rxdone_entry_desc_flags: Flags for &struct rxdone_entry_desc
  119. *
  120. * @RXDONE_SIGNAL_PLCP: Signal field contains the plcp value.
  121. * @RXDONE_SIGNAL_BITRATE: Signal field contains the bitrate value.
  122. * @RXDONE_SIGNAL_MCS: Signal field contains the mcs value.
  123. * @RXDONE_MY_BSS: Does this frame originate from device's BSS.
  124. * @RXDONE_CRYPTO_IV: Driver provided IV/EIV data.
  125. * @RXDONE_CRYPTO_ICV: Driver provided ICV data.
  126. * @RXDONE_L2PAD: 802.11 payload has been padded to 4-byte boundary.
  127. */
  128. enum rxdone_entry_desc_flags {
  129. RXDONE_SIGNAL_PLCP = BIT(0),
  130. RXDONE_SIGNAL_BITRATE = BIT(1),
  131. RXDONE_SIGNAL_MCS = BIT(2),
  132. RXDONE_MY_BSS = BIT(3),
  133. RXDONE_CRYPTO_IV = BIT(4),
  134. RXDONE_CRYPTO_ICV = BIT(5),
  135. RXDONE_L2PAD = BIT(6),
  136. };
  137. /**
  138. * RXDONE_SIGNAL_MASK - Define to mask off all &rxdone_entry_desc_flags flags
  139. * except for the RXDONE_SIGNAL_* flags. This is useful to convert the dev_flags
  140. * from &rxdone_entry_desc to a signal value type.
  141. */
  142. #define RXDONE_SIGNAL_MASK \
  143. ( RXDONE_SIGNAL_PLCP | RXDONE_SIGNAL_BITRATE | RXDONE_SIGNAL_MCS )
  144. /**
  145. * struct rxdone_entry_desc: RX Entry descriptor
  146. *
  147. * Summary of information that has been read from the RX frame descriptor.
  148. *
  149. * @timestamp: RX Timestamp
  150. * @signal: Signal of the received frame.
  151. * @rssi: RSSI of the received frame.
  152. * @size: Data size of the received frame.
  153. * @flags: MAC80211 receive flags (See &enum mac80211_rx_flags).
  154. * @dev_flags: Ralink receive flags (See &enum rxdone_entry_desc_flags).
  155. * @rate_mode: Rate mode (See @enum rate_modulation).
  156. * @cipher: Cipher type used during decryption.
  157. * @cipher_status: Decryption status.
  158. * @iv: IV/EIV data used during decryption.
  159. * @icv: ICV data used during decryption.
  160. */
  161. struct rxdone_entry_desc {
  162. u64 timestamp;
  163. int signal;
  164. int rssi;
  165. int size;
  166. int flags;
  167. int dev_flags;
  168. u16 rate_mode;
  169. u8 cipher;
  170. u8 cipher_status;
  171. __le32 iv[2];
  172. __le32 icv;
  173. };
  174. /**
  175. * enum txdone_entry_desc_flags: Flags for &struct txdone_entry_desc
  176. *
  177. * Every txdone report has to contain the basic result of the
  178. * transmission, either &TXDONE_UNKNOWN, &TXDONE_SUCCESS or
  179. * &TXDONE_FAILURE. The flag &TXDONE_FALLBACK can be used in
  180. * conjunction with all of these flags but should only be set
  181. * if retires > 0. The flag &TXDONE_EXCESSIVE_RETRY can only be used
  182. * in conjunction with &TXDONE_FAILURE.
  183. *
  184. * @TXDONE_UNKNOWN: Hardware could not determine success of transmission.
  185. * @TXDONE_SUCCESS: Frame was successfully send
  186. * @TXDONE_FALLBACK: Hardware used fallback rates for retries
  187. * @TXDONE_FAILURE: Frame was not successfully send
  188. * @TXDONE_EXCESSIVE_RETRY: In addition to &TXDONE_FAILURE, the
  189. * frame transmission failed due to excessive retries.
  190. */
  191. enum txdone_entry_desc_flags {
  192. TXDONE_UNKNOWN,
  193. TXDONE_SUCCESS,
  194. TXDONE_FALLBACK,
  195. TXDONE_FAILURE,
  196. TXDONE_EXCESSIVE_RETRY,
  197. TXDONE_AMPDU,
  198. };
  199. /**
  200. * struct txdone_entry_desc: TX done entry descriptor
  201. *
  202. * Summary of information that has been read from the TX frame descriptor
  203. * after the device is done with transmission.
  204. *
  205. * @flags: TX done flags (See &enum txdone_entry_desc_flags).
  206. * @retry: Retry count.
  207. */
  208. struct txdone_entry_desc {
  209. unsigned long flags;
  210. int retry;
  211. };
  212. /**
  213. * enum txentry_desc_flags: Status flags for TX entry descriptor
  214. *
  215. * @ENTRY_TXD_RTS_FRAME: This frame is a RTS frame.
  216. * @ENTRY_TXD_CTS_FRAME: This frame is a CTS-to-self frame.
  217. * @ENTRY_TXD_GENERATE_SEQ: This frame requires sequence counter.
  218. * @ENTRY_TXD_FIRST_FRAGMENT: This is the first frame.
  219. * @ENTRY_TXD_MORE_FRAG: This frame is followed by another fragment.
  220. * @ENTRY_TXD_REQ_TIMESTAMP: Require timestamp to be inserted.
  221. * @ENTRY_TXD_BURST: This frame belongs to the same burst event.
  222. * @ENTRY_TXD_ACK: An ACK is required for this frame.
  223. * @ENTRY_TXD_RETRY_MODE: When set, the long retry count is used.
  224. * @ENTRY_TXD_ENCRYPT: This frame should be encrypted.
  225. * @ENTRY_TXD_ENCRYPT_PAIRWISE: Use pairwise key table (instead of shared).
  226. * @ENTRY_TXD_ENCRYPT_IV: Generate IV/EIV in hardware.
  227. * @ENTRY_TXD_ENCRYPT_MMIC: Generate MIC in hardware.
  228. * @ENTRY_TXD_HT_AMPDU: This frame is part of an AMPDU.
  229. * @ENTRY_TXD_HT_BW_40: Use 40MHz Bandwidth.
  230. * @ENTRY_TXD_HT_SHORT_GI: Use short GI.
  231. * @ENTRY_TXD_HT_MIMO_PS: The receiving STA is in dynamic SM PS mode.
  232. */
  233. enum txentry_desc_flags {
  234. ENTRY_TXD_RTS_FRAME,
  235. ENTRY_TXD_CTS_FRAME,
  236. ENTRY_TXD_GENERATE_SEQ,
  237. ENTRY_TXD_FIRST_FRAGMENT,
  238. ENTRY_TXD_MORE_FRAG,
  239. ENTRY_TXD_REQ_TIMESTAMP,
  240. ENTRY_TXD_BURST,
  241. ENTRY_TXD_ACK,
  242. ENTRY_TXD_RETRY_MODE,
  243. ENTRY_TXD_ENCRYPT,
  244. ENTRY_TXD_ENCRYPT_PAIRWISE,
  245. ENTRY_TXD_ENCRYPT_IV,
  246. ENTRY_TXD_ENCRYPT_MMIC,
  247. ENTRY_TXD_HT_AMPDU,
  248. ENTRY_TXD_HT_BW_40,
  249. ENTRY_TXD_HT_SHORT_GI,
  250. ENTRY_TXD_HT_MIMO_PS,
  251. };
  252. /**
  253. * struct txentry_desc: TX Entry descriptor
  254. *
  255. * Summary of information for the frame descriptor before sending a TX frame.
  256. *
  257. * @flags: Descriptor flags (See &enum queue_entry_flags).
  258. * @length: Length of the entire frame.
  259. * @header_length: Length of 802.11 header.
  260. * @length_high: PLCP length high word.
  261. * @length_low: PLCP length low word.
  262. * @signal: PLCP signal.
  263. * @service: PLCP service.
  264. * @msc: MCS.
  265. * @stbc: Use Space Time Block Coding (only available for MCS rates < 8).
  266. * @ba_size: Size of the recepients RX reorder buffer - 1.
  267. * @rate_mode: Rate mode (See @enum rate_modulation).
  268. * @mpdu_density: MDPU density.
  269. * @retry_limit: Max number of retries.
  270. * @ifs: IFS value.
  271. * @txop: IFS value for 11n capable chips.
  272. * @cipher: Cipher type used for encryption.
  273. * @key_idx: Key index used for encryption.
  274. * @iv_offset: Position where IV should be inserted by hardware.
  275. * @iv_len: Length of IV data.
  276. */
  277. struct txentry_desc {
  278. unsigned long flags;
  279. u16 length;
  280. u16 header_length;
  281. union {
  282. struct {
  283. u16 length_high;
  284. u16 length_low;
  285. u16 signal;
  286. u16 service;
  287. enum ifs ifs;
  288. } plcp;
  289. struct {
  290. u16 mcs;
  291. u8 stbc;
  292. u8 ba_size;
  293. u8 mpdu_density;
  294. enum txop txop;
  295. int wcid;
  296. } ht;
  297. } u;
  298. enum rate_modulation rate_mode;
  299. short retry_limit;
  300. enum cipher cipher;
  301. u16 key_idx;
  302. u16 iv_offset;
  303. u16 iv_len;
  304. };
  305. /**
  306. * enum queue_entry_flags: Status flags for queue entry
  307. *
  308. * @ENTRY_BCN_ASSIGNED: This entry has been assigned to an interface.
  309. * As long as this bit is set, this entry may only be touched
  310. * through the interface structure.
  311. * @ENTRY_OWNER_DEVICE_DATA: This entry is owned by the device for data
  312. * transfer (either TX or RX depending on the queue). The entry should
  313. * only be touched after the device has signaled it is done with it.
  314. * @ENTRY_DATA_PENDING: This entry contains a valid frame and is waiting
  315. * for the signal to start sending.
  316. * @ENTRY_DATA_IO_FAILED: Hardware indicated that an IO error occurred
  317. * while transferring the data to the hardware. No TX status report will
  318. * be expected from the hardware.
  319. * @ENTRY_DATA_STATUS_PENDING: The entry has been send to the device and
  320. * returned. It is now waiting for the status reporting before the
  321. * entry can be reused again.
  322. */
  323. enum queue_entry_flags {
  324. ENTRY_BCN_ASSIGNED,
  325. ENTRY_BCN_ENABLED,
  326. ENTRY_OWNER_DEVICE_DATA,
  327. ENTRY_DATA_PENDING,
  328. ENTRY_DATA_IO_FAILED,
  329. ENTRY_DATA_STATUS_PENDING,
  330. ENTRY_DATA_STATUS_SET,
  331. };
  332. /**
  333. * struct queue_entry: Entry inside the &struct data_queue
  334. *
  335. * @flags: Entry flags, see &enum queue_entry_flags.
  336. * @last_action: Timestamp of last change.
  337. * @queue: The data queue (&struct data_queue) to which this entry belongs.
  338. * @skb: The buffer which is currently being transmitted (for TX queue),
  339. * or used to directly receive data in (for RX queue).
  340. * @entry_idx: The entry index number.
  341. * @priv_data: Private data belonging to this queue entry. The pointer
  342. * points to data specific to a particular driver and queue type.
  343. * @status: Device specific status
  344. */
  345. struct queue_entry {
  346. unsigned long flags;
  347. unsigned long last_action;
  348. struct data_queue *queue;
  349. struct sk_buff *skb;
  350. unsigned int entry_idx;
  351. u32 status;
  352. void *priv_data;
  353. };
  354. /**
  355. * enum queue_index: Queue index type
  356. *
  357. * @Q_INDEX: Index pointer to the current entry in the queue, if this entry is
  358. * owned by the hardware then the queue is considered to be full.
  359. * @Q_INDEX_DMA_DONE: Index pointer for the next entry which will have been
  360. * transferred to the hardware.
  361. * @Q_INDEX_DONE: Index pointer to the next entry which will be completed by
  362. * the hardware and for which we need to run the txdone handler. If this
  363. * entry is not owned by the hardware the queue is considered to be empty.
  364. * @Q_INDEX_MAX: Keep last, used in &struct data_queue to determine the size
  365. * of the index array.
  366. */
  367. enum queue_index {
  368. Q_INDEX,
  369. Q_INDEX_DMA_DONE,
  370. Q_INDEX_DONE,
  371. Q_INDEX_MAX,
  372. };
  373. /**
  374. * enum data_queue_flags: Status flags for data queues
  375. *
  376. * @QUEUE_STARTED: The queue has been started. Fox RX queues this means the
  377. * device might be DMA'ing skbuffers. TX queues will accept skbuffers to
  378. * be transmitted and beacon queues will start beaconing the configured
  379. * beacons.
  380. * @QUEUE_PAUSED: The queue has been started but is currently paused.
  381. * When this bit is set, the queue has been stopped in mac80211,
  382. * preventing new frames to be enqueued. However, a few frames
  383. * might still appear shortly after the pausing...
  384. */
  385. enum data_queue_flags {
  386. QUEUE_STARTED,
  387. QUEUE_PAUSED,
  388. };
  389. /**
  390. * struct data_queue: Data queue
  391. *
  392. * @rt2x00dev: Pointer to main &struct rt2x00dev where this queue belongs to.
  393. * @entries: Base address of the &struct queue_entry which are
  394. * part of this queue.
  395. * @qid: The queue identification, see &enum data_queue_qid.
  396. * @flags: Entry flags, see &enum queue_entry_flags.
  397. * @status_lock: The mutex for protecting the start/stop/flush
  398. * handling on this queue.
  399. * @tx_lock: Spinlock to serialize tx operations on this queue.
  400. * @index_lock: Spinlock to protect index handling. Whenever @index, @index_done or
  401. * @index_crypt needs to be changed this lock should be grabbed to prevent
  402. * index corruption due to concurrency.
  403. * @count: Number of frames handled in the queue.
  404. * @limit: Maximum number of entries in the queue.
  405. * @threshold: Minimum number of free entries before queue is kicked by force.
  406. * @length: Number of frames in queue.
  407. * @index: Index pointers to entry positions in the queue,
  408. * use &enum queue_index to get a specific index field.
  409. * @txop: maximum burst time.
  410. * @aifs: The aifs value for outgoing frames (field ignored in RX queue).
  411. * @cw_min: The cw min value for outgoing frames (field ignored in RX queue).
  412. * @cw_max: The cw max value for outgoing frames (field ignored in RX queue).
  413. * @data_size: Maximum data size for the frames in this queue.
  414. * @desc_size: Hardware descriptor size for the data in this queue.
  415. * @priv_size: Size of per-queue_entry private data.
  416. * @usb_endpoint: Device endpoint used for communication (USB only)
  417. * @usb_maxpacket: Max packet size for given endpoint (USB only)
  418. */
  419. struct data_queue {
  420. struct rt2x00_dev *rt2x00dev;
  421. struct queue_entry *entries;
  422. enum data_queue_qid qid;
  423. unsigned long flags;
  424. struct mutex status_lock;
  425. spinlock_t tx_lock;
  426. spinlock_t index_lock;
  427. unsigned int count;
  428. unsigned short limit;
  429. unsigned short threshold;
  430. unsigned short length;
  431. unsigned short index[Q_INDEX_MAX];
  432. unsigned short txop;
  433. unsigned short aifs;
  434. unsigned short cw_min;
  435. unsigned short cw_max;
  436. unsigned short data_size;
  437. unsigned char desc_size;
  438. unsigned char winfo_size;
  439. unsigned short priv_size;
  440. unsigned short usb_endpoint;
  441. unsigned short usb_maxpacket;
  442. };
  443. /**
  444. * queue_end - Return pointer to the last queue (HELPER MACRO).
  445. * @__dev: Pointer to &struct rt2x00_dev
  446. *
  447. * Using the base rx pointer and the maximum number of available queues,
  448. * this macro will return the address of 1 position beyond the end of the
  449. * queues array.
  450. */
  451. #define queue_end(__dev) \
  452. &(__dev)->rx[(__dev)->data_queues]
  453. /**
  454. * tx_queue_end - Return pointer to the last TX queue (HELPER MACRO).
  455. * @__dev: Pointer to &struct rt2x00_dev
  456. *
  457. * Using the base tx pointer and the maximum number of available TX
  458. * queues, this macro will return the address of 1 position beyond
  459. * the end of the TX queue array.
  460. */
  461. #define tx_queue_end(__dev) \
  462. &(__dev)->tx[(__dev)->ops->tx_queues]
  463. /**
  464. * queue_next - Return pointer to next queue in list (HELPER MACRO).
  465. * @__queue: Current queue for which we need the next queue
  466. *
  467. * Using the current queue address we take the address directly
  468. * after the queue to take the next queue. Note that this macro
  469. * should be used carefully since it does not protect against
  470. * moving past the end of the list. (See macros &queue_end and
  471. * &tx_queue_end for determining the end of the queue).
  472. */
  473. #define queue_next(__queue) \
  474. &(__queue)[1]
  475. /**
  476. * queue_loop - Loop through the queues within a specific range (HELPER MACRO).
  477. * @__entry: Pointer where the current queue entry will be stored in.
  478. * @__start: Start queue pointer.
  479. * @__end: End queue pointer.
  480. *
  481. * This macro will loop through all queues between &__start and &__end.
  482. */
  483. #define queue_loop(__entry, __start, __end) \
  484. for ((__entry) = (__start); \
  485. prefetch(queue_next(__entry)), (__entry) != (__end);\
  486. (__entry) = queue_next(__entry))
  487. /**
  488. * queue_for_each - Loop through all queues
  489. * @__dev: Pointer to &struct rt2x00_dev
  490. * @__entry: Pointer where the current queue entry will be stored in.
  491. *
  492. * This macro will loop through all available queues.
  493. */
  494. #define queue_for_each(__dev, __entry) \
  495. queue_loop(__entry, (__dev)->rx, queue_end(__dev))
  496. /**
  497. * tx_queue_for_each - Loop through the TX queues
  498. * @__dev: Pointer to &struct rt2x00_dev
  499. * @__entry: Pointer where the current queue entry will be stored in.
  500. *
  501. * This macro will loop through all TX related queues excluding
  502. * the Beacon and Atim queues.
  503. */
  504. #define tx_queue_for_each(__dev, __entry) \
  505. queue_loop(__entry, (__dev)->tx, tx_queue_end(__dev))
  506. /**
  507. * txall_queue_for_each - Loop through all TX related queues
  508. * @__dev: Pointer to &struct rt2x00_dev
  509. * @__entry: Pointer where the current queue entry will be stored in.
  510. *
  511. * This macro will loop through all TX related queues including
  512. * the Beacon and Atim queues.
  513. */
  514. #define txall_queue_for_each(__dev, __entry) \
  515. queue_loop(__entry, (__dev)->tx, queue_end(__dev))
  516. /**
  517. * rt2x00queue_for_each_entry - Loop through all entries in the queue
  518. * @queue: Pointer to @data_queue
  519. * @start: &enum queue_index Pointer to start index
  520. * @end: &enum queue_index Pointer to end index
  521. * @data: Data to pass to the callback function
  522. * @fn: The function to call for each &struct queue_entry
  523. *
  524. * This will walk through all entries in the queue, in chronological
  525. * order. This means it will start at the current @start pointer
  526. * and will walk through the queue until it reaches the @end pointer.
  527. *
  528. * If fn returns true for an entry rt2x00queue_for_each_entry will stop
  529. * processing and return true as well.
  530. */
  531. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  532. enum queue_index start,
  533. enum queue_index end,
  534. void *data,
  535. bool (*fn)(struct queue_entry *entry,
  536. void *data));
  537. /**
  538. * rt2x00queue_empty - Check if the queue is empty.
  539. * @queue: Queue to check if empty.
  540. */
  541. static inline int rt2x00queue_empty(struct data_queue *queue)
  542. {
  543. return queue->length == 0;
  544. }
  545. /**
  546. * rt2x00queue_full - Check if the queue is full.
  547. * @queue: Queue to check if full.
  548. */
  549. static inline int rt2x00queue_full(struct data_queue *queue)
  550. {
  551. return queue->length == queue->limit;
  552. }
  553. /**
  554. * rt2x00queue_free - Check the number of available entries in queue.
  555. * @queue: Queue to check.
  556. */
  557. static inline int rt2x00queue_available(struct data_queue *queue)
  558. {
  559. return queue->limit - queue->length;
  560. }
  561. /**
  562. * rt2x00queue_threshold - Check if the queue is below threshold
  563. * @queue: Queue to check.
  564. */
  565. static inline int rt2x00queue_threshold(struct data_queue *queue)
  566. {
  567. return rt2x00queue_available(queue) < queue->threshold;
  568. }
  569. /**
  570. * rt2x00queue_dma_timeout - Check if a timeout occurred for DMA transfers
  571. * @entry: Queue entry to check.
  572. */
  573. static inline int rt2x00queue_dma_timeout(struct queue_entry *entry)
  574. {
  575. if (!test_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags))
  576. return false;
  577. return time_after(jiffies, entry->last_action + msecs_to_jiffies(100));
  578. }
  579. /**
  580. * _rt2x00_desc_read - Read a word from the hardware descriptor.
  581. * @desc: Base descriptor address
  582. * @word: Word index from where the descriptor should be read.
  583. * @value: Address where the descriptor value should be written into.
  584. */
  585. static inline void _rt2x00_desc_read(__le32 *desc, const u8 word, __le32 *value)
  586. {
  587. *value = desc[word];
  588. }
  589. /**
  590. * rt2x00_desc_read - Read a word from the hardware descriptor, this
  591. * function will take care of the byte ordering.
  592. * @desc: Base descriptor address
  593. * @word: Word index from where the descriptor should be read.
  594. * @value: Address where the descriptor value should be written into.
  595. */
  596. static inline void rt2x00_desc_read(__le32 *desc, const u8 word, u32 *value)
  597. {
  598. __le32 tmp;
  599. _rt2x00_desc_read(desc, word, &tmp);
  600. *value = le32_to_cpu(tmp);
  601. }
  602. /**
  603. * rt2x00_desc_write - write a word to the hardware descriptor, this
  604. * function will take care of the byte ordering.
  605. * @desc: Base descriptor address
  606. * @word: Word index from where the descriptor should be written.
  607. * @value: Value that should be written into the descriptor.
  608. */
  609. static inline void _rt2x00_desc_write(__le32 *desc, const u8 word, __le32 value)
  610. {
  611. desc[word] = value;
  612. }
  613. /**
  614. * rt2x00_desc_write - write a word to the hardware descriptor.
  615. * @desc: Base descriptor address
  616. * @word: Word index from where the descriptor should be written.
  617. * @value: Value that should be written into the descriptor.
  618. */
  619. static inline void rt2x00_desc_write(__le32 *desc, const u8 word, u32 value)
  620. {
  621. _rt2x00_desc_write(desc, word, cpu_to_le32(value));
  622. }
  623. #endif /* RT2X00QUEUE_H */