acx.h 9.7 KB

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  1. /*
  2. * This file is part of wl18xx
  3. *
  4. * Copyright (C) 2011 Texas Instruments. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * version 2 as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful, but
  11. * WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  18. * 02110-1301 USA
  19. *
  20. */
  21. #ifndef __WL18XX_ACX_H__
  22. #define __WL18XX_ACX_H__
  23. #include "../wlcore/wlcore.h"
  24. #include "../wlcore/acx.h"
  25. enum {
  26. ACX_NS_IPV6_FILTER = 0x0050,
  27. ACX_PEER_HT_OPERATION_MODE_CFG = 0x0051,
  28. ACX_CSUM_CONFIG = 0x0052,
  29. ACX_SIM_CONFIG = 0x0053,
  30. ACX_CLEAR_STATISTICS = 0x0054,
  31. ACX_AUTO_RX_STREAMING = 0x0055,
  32. ACX_PEER_CAP = 0x0056,
  33. ACX_INTERRUPT_NOTIFY = 0x0057,
  34. ACX_RX_BA_FILTER = 0x0058,
  35. ACX_AP_SLEEP_CFG = 0x0059,
  36. ACX_DYNAMIC_TRACES_CFG = 0x005A,
  37. };
  38. /* numbers of bits the length field takes (add 1 for the actual number) */
  39. #define WL18XX_HOST_IF_LEN_SIZE_FIELD 15
  40. #define WL18XX_ACX_EVENTS_VECTOR (WL1271_ACX_INTR_WATCHDOG | \
  41. WL1271_ACX_INTR_INIT_COMPLETE | \
  42. WL1271_ACX_INTR_EVENT_A | \
  43. WL1271_ACX_INTR_EVENT_B | \
  44. WL1271_ACX_INTR_CMD_COMPLETE | \
  45. WL1271_ACX_INTR_HW_AVAILABLE | \
  46. WL1271_ACX_INTR_DATA | \
  47. WL1271_ACX_SW_INTR_WATCHDOG)
  48. #define WL18XX_INTR_MASK (WL1271_ACX_INTR_WATCHDOG | \
  49. WL1271_ACX_INTR_EVENT_A | \
  50. WL1271_ACX_INTR_EVENT_B | \
  51. WL1271_ACX_INTR_HW_AVAILABLE | \
  52. WL1271_ACX_INTR_DATA | \
  53. WL1271_ACX_SW_INTR_WATCHDOG)
  54. struct wl18xx_acx_host_config_bitmap {
  55. struct acx_header header;
  56. __le32 host_cfg_bitmap;
  57. __le32 host_sdio_block_size;
  58. /* extra mem blocks per frame in TX. */
  59. __le32 extra_mem_blocks;
  60. /*
  61. * number of bits of the length field in the first TX word
  62. * (up to 15 - for using the entire 16 bits).
  63. */
  64. __le32 length_field_size;
  65. } __packed;
  66. enum {
  67. CHECKSUM_OFFLOAD_DISABLED = 0,
  68. CHECKSUM_OFFLOAD_ENABLED = 1,
  69. CHECKSUM_OFFLOAD_FAKE_RX = 2,
  70. CHECKSUM_OFFLOAD_INVALID = 0xFF
  71. };
  72. struct wl18xx_acx_checksum_state {
  73. struct acx_header header;
  74. /* enum acx_checksum_state */
  75. u8 checksum_state;
  76. u8 pad[3];
  77. } __packed;
  78. struct wl18xx_acx_error_stats {
  79. u32 error_frame_non_ctrl;
  80. u32 error_frame_ctrl;
  81. u32 error_frame_during_protection;
  82. u32 null_frame_tx_start;
  83. u32 null_frame_cts_start;
  84. u32 bar_retry;
  85. u32 num_frame_cts_nul_flid;
  86. u32 tx_abort_failure;
  87. u32 tx_resume_failure;
  88. u32 rx_cmplt_db_overflow_cnt;
  89. u32 elp_while_rx_exch;
  90. u32 elp_while_tx_exch;
  91. u32 elp_while_tx;
  92. u32 elp_while_nvic_pending;
  93. u32 rx_excessive_frame_len;
  94. u32 burst_mismatch;
  95. u32 tbc_exch_mismatch;
  96. } __packed;
  97. #define NUM_OF_RATES_INDEXES 30
  98. struct wl18xx_acx_tx_stats {
  99. u32 tx_prepared_descs;
  100. u32 tx_cmplt;
  101. u32 tx_template_prepared;
  102. u32 tx_data_prepared;
  103. u32 tx_template_programmed;
  104. u32 tx_data_programmed;
  105. u32 tx_burst_programmed;
  106. u32 tx_starts;
  107. u32 tx_stop;
  108. u32 tx_start_templates;
  109. u32 tx_start_int_templates;
  110. u32 tx_start_fw_gen;
  111. u32 tx_start_data;
  112. u32 tx_start_null_frame;
  113. u32 tx_exch;
  114. u32 tx_retry_template;
  115. u32 tx_retry_data;
  116. u32 tx_retry_per_rate[NUM_OF_RATES_INDEXES];
  117. u32 tx_exch_pending;
  118. u32 tx_exch_expiry;
  119. u32 tx_done_template;
  120. u32 tx_done_data;
  121. u32 tx_done_int_template;
  122. u32 tx_cfe1;
  123. u32 tx_cfe2;
  124. u32 frag_called;
  125. u32 frag_mpdu_alloc_failed;
  126. u32 frag_init_called;
  127. u32 frag_in_process_called;
  128. u32 frag_tkip_called;
  129. u32 frag_key_not_found;
  130. u32 frag_need_fragmentation;
  131. u32 frag_bad_mblk_num;
  132. u32 frag_failed;
  133. u32 frag_cache_hit;
  134. u32 frag_cache_miss;
  135. } __packed;
  136. struct wl18xx_acx_rx_stats {
  137. u32 rx_beacon_early_term;
  138. u32 rx_out_of_mpdu_nodes;
  139. u32 rx_hdr_overflow;
  140. u32 rx_dropped_frame;
  141. u32 rx_done_stage;
  142. u32 rx_done;
  143. u32 rx_defrag;
  144. u32 rx_defrag_end;
  145. u32 rx_cmplt;
  146. u32 rx_pre_complt;
  147. u32 rx_cmplt_task;
  148. u32 rx_phy_hdr;
  149. u32 rx_timeout;
  150. u32 rx_rts_timeout;
  151. u32 rx_timeout_wa;
  152. u32 defrag_called;
  153. u32 defrag_init_called;
  154. u32 defrag_in_process_called;
  155. u32 defrag_tkip_called;
  156. u32 defrag_need_defrag;
  157. u32 defrag_decrypt_failed;
  158. u32 decrypt_key_not_found;
  159. u32 defrag_need_decrypt;
  160. u32 rx_tkip_replays;
  161. u32 rx_xfr;
  162. } __packed;
  163. struct wl18xx_acx_isr_stats {
  164. u32 irqs;
  165. } __packed;
  166. #define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10
  167. struct wl18xx_acx_pwr_stats {
  168. u32 missing_bcns_cnt;
  169. u32 rcvd_bcns_cnt;
  170. u32 connection_out_of_sync;
  171. u32 cont_miss_bcns_spread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD];
  172. u32 rcvd_awake_bcns_cnt;
  173. u32 sleep_time_count;
  174. u32 sleep_time_avg;
  175. u32 sleep_cycle_avg;
  176. u32 sleep_percent;
  177. u32 ap_sleep_active_conf;
  178. u32 ap_sleep_user_conf;
  179. u32 ap_sleep_counter;
  180. } __packed;
  181. struct wl18xx_acx_rx_filter_stats {
  182. u32 beacon_filter;
  183. u32 arp_filter;
  184. u32 mc_filter;
  185. u32 dup_filter;
  186. u32 data_filter;
  187. u32 ibss_filter;
  188. u32 protection_filter;
  189. u32 accum_arp_pend_requests;
  190. u32 max_arp_queue_dep;
  191. } __packed;
  192. struct wl18xx_acx_rx_rate_stats {
  193. u32 rx_frames_per_rates[50];
  194. } __packed;
  195. #define AGGR_STATS_TX_AGG 16
  196. #define AGGR_STATS_RX_SIZE_LEN 16
  197. struct wl18xx_acx_aggr_stats {
  198. u32 tx_agg_rate[AGGR_STATS_TX_AGG];
  199. u32 tx_agg_len[AGGR_STATS_TX_AGG];
  200. u32 rx_size[AGGR_STATS_RX_SIZE_LEN];
  201. } __packed;
  202. #define PIPE_STATS_HW_FIFO 11
  203. struct wl18xx_acx_pipeline_stats {
  204. u32 hs_tx_stat_fifo_int;
  205. u32 hs_rx_stat_fifo_int;
  206. u32 enc_tx_stat_fifo_int;
  207. u32 enc_rx_stat_fifo_int;
  208. u32 rx_complete_stat_fifo_int;
  209. u32 pre_proc_swi;
  210. u32 post_proc_swi;
  211. u32 sec_frag_swi;
  212. u32 pre_to_defrag_swi;
  213. u32 defrag_to_rx_xfer_swi;
  214. u32 dec_packet_in;
  215. u32 dec_packet_in_fifo_full;
  216. u32 dec_packet_out;
  217. u16 pipeline_fifo_full[PIPE_STATS_HW_FIFO];
  218. u16 padding;
  219. } __packed;
  220. #define DIVERSITY_STATS_NUM_OF_ANT 2
  221. struct wl18xx_acx_diversity_stats {
  222. u32 num_of_packets_per_ant[DIVERSITY_STATS_NUM_OF_ANT];
  223. u32 total_num_of_toggles;
  224. } __packed;
  225. struct wl18xx_acx_thermal_stats {
  226. u16 irq_thr_low;
  227. u16 irq_thr_high;
  228. u16 tx_stop;
  229. u16 tx_resume;
  230. u16 false_irq;
  231. u16 adc_source_unexpected;
  232. } __packed;
  233. #define WL18XX_NUM_OF_CALIBRATIONS_ERRORS 18
  234. struct wl18xx_acx_calib_failure_stats {
  235. u16 fail_count[WL18XX_NUM_OF_CALIBRATIONS_ERRORS];
  236. u32 calib_count;
  237. } __packed;
  238. struct wl18xx_roaming_stats {
  239. s32 rssi_level;
  240. } __packed;
  241. struct wl18xx_dfs_stats {
  242. u32 num_of_radar_detections;
  243. } __packed;
  244. struct wl18xx_acx_statistics {
  245. struct acx_header header;
  246. struct wl18xx_acx_error_stats error;
  247. struct wl18xx_acx_tx_stats tx;
  248. struct wl18xx_acx_rx_stats rx;
  249. struct wl18xx_acx_isr_stats isr;
  250. struct wl18xx_acx_pwr_stats pwr;
  251. struct wl18xx_acx_rx_filter_stats rx_filter;
  252. struct wl18xx_acx_rx_rate_stats rx_rate;
  253. struct wl18xx_acx_aggr_stats aggr_size;
  254. struct wl18xx_acx_pipeline_stats pipeline;
  255. struct wl18xx_acx_diversity_stats diversity;
  256. struct wl18xx_acx_thermal_stats thermal;
  257. struct wl18xx_acx_calib_failure_stats calib;
  258. struct wl18xx_roaming_stats roaming;
  259. struct wl18xx_dfs_stats dfs;
  260. } __packed;
  261. struct wl18xx_acx_clear_statistics {
  262. struct acx_header header;
  263. };
  264. enum wlcore_bandwidth {
  265. WLCORE_BANDWIDTH_20MHZ,
  266. WLCORE_BANDWIDTH_40MHZ,
  267. };
  268. struct wlcore_peer_ht_operation_mode {
  269. struct acx_header header;
  270. u8 hlid;
  271. u8 bandwidth; /* enum wlcore_bandwidth */
  272. u8 padding[2];
  273. };
  274. /*
  275. * ACX_PEER_CAP
  276. * this struct is very similar to wl1271_acx_ht_capabilities, with the
  277. * addition of supported rates
  278. */
  279. struct wlcore_acx_peer_cap {
  280. struct acx_header header;
  281. /* bitmask of capability bits supported by the peer */
  282. __le32 ht_capabilites;
  283. /* rates supported by the remote peer */
  284. __le32 supported_rates;
  285. /* Indicates to which link these capabilities apply. */
  286. u8 hlid;
  287. /*
  288. * This the maximum A-MPDU length supported by the AP. The FW may not
  289. * exceed this length when sending A-MPDUs
  290. */
  291. u8 ampdu_max_length;
  292. /* This is the minimal spacing required when sending A-MPDUs to the AP*/
  293. u8 ampdu_min_spacing;
  294. u8 padding;
  295. } __packed;
  296. /*
  297. * ACX_INTERRUPT_NOTIFY
  298. * enable/disable fast-link/PSM notification from FW
  299. */
  300. struct wl18xx_acx_interrupt_notify {
  301. struct acx_header header;
  302. u32 enable;
  303. };
  304. /*
  305. * ACX_RX_BA_FILTER
  306. * enable/disable RX BA filtering in FW
  307. */
  308. struct wl18xx_acx_rx_ba_filter {
  309. struct acx_header header;
  310. u32 enable;
  311. };
  312. struct acx_ap_sleep_cfg {
  313. struct acx_header header;
  314. /* Duty Cycle (20-80% of staying Awake) for IDLE AP
  315. * (0: disable)
  316. */
  317. u8 idle_duty_cycle;
  318. /* Duty Cycle (20-80% of staying Awake) for Connected AP
  319. * (0: disable)
  320. */
  321. u8 connected_duty_cycle;
  322. /* Maximum stations that are allowed to be connected to AP
  323. * (255: no limit)
  324. */
  325. u8 max_stations_thresh;
  326. /* Timeout till enabling the Sleep Mechanism after data stops
  327. * [unit: 100 msec]
  328. */
  329. u8 idle_conn_thresh;
  330. } __packed;
  331. /*
  332. * ACX_DYNAMIC_TRACES_CFG
  333. * configure the FW dynamic traces
  334. */
  335. struct acx_dynamic_fw_traces_cfg {
  336. struct acx_header header;
  337. __le32 dynamic_fw_traces;
  338. } __packed;
  339. int wl18xx_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap,
  340. u32 sdio_blk_size, u32 extra_mem_blks,
  341. u32 len_field_size);
  342. int wl18xx_acx_set_checksum_state(struct wl1271 *wl);
  343. int wl18xx_acx_clear_statistics(struct wl1271 *wl);
  344. int wl18xx_acx_peer_ht_operation_mode(struct wl1271 *wl, u8 hlid, bool wide);
  345. int wl18xx_acx_set_peer_cap(struct wl1271 *wl,
  346. struct ieee80211_sta_ht_cap *ht_cap,
  347. bool allow_ht_operation,
  348. u32 rate_set, u8 hlid);
  349. int wl18xx_acx_interrupt_notify_config(struct wl1271 *wl, bool action);
  350. int wl18xx_acx_rx_ba_filter(struct wl1271 *wl, bool action);
  351. int wl18xx_acx_ap_sleep(struct wl1271 *wl);
  352. int wl18xx_acx_dynamic_fw_traces(struct wl1271 *wl);
  353. #endif /* __WL18XX_ACX_H__ */