pme.c 12 KB

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  1. /*
  2. * PCIe Native PME support
  3. *
  4. * Copyright (C) 2007 - 2009 Intel Corp
  5. * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
  6. * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
  7. *
  8. * This file is subject to the terms and conditions of the GNU General Public
  9. * License V2. See the file "COPYING" in the main directory of this archive
  10. * for more details.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/pci.h>
  14. #include <linux/kernel.h>
  15. #include <linux/errno.h>
  16. #include <linux/slab.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/device.h>
  20. #include <linux/pcieport_if.h>
  21. #include <linux/pm_runtime.h>
  22. #include "../pci.h"
  23. #include "portdrv.h"
  24. /*
  25. * If this switch is set, MSI will not be used for PCIe PME signaling. This
  26. * causes the PCIe port driver to use INTx interrupts only, but it turns out
  27. * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
  28. * wake-up from system sleep states.
  29. */
  30. bool pcie_pme_msi_disabled;
  31. static int __init pcie_pme_setup(char *str)
  32. {
  33. if (!strncmp(str, "nomsi", 5))
  34. pcie_pme_msi_disabled = true;
  35. return 1;
  36. }
  37. __setup("pcie_pme=", pcie_pme_setup);
  38. enum pme_suspend_level {
  39. PME_SUSPEND_NONE = 0,
  40. PME_SUSPEND_WAKEUP,
  41. PME_SUSPEND_NOIRQ,
  42. };
  43. struct pcie_pme_service_data {
  44. spinlock_t lock;
  45. struct pcie_device *srv;
  46. struct work_struct work;
  47. enum pme_suspend_level suspend_level;
  48. };
  49. /**
  50. * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
  51. * @dev: PCIe root port or event collector.
  52. * @enable: Enable or disable the interrupt.
  53. */
  54. void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
  55. {
  56. if (enable)
  57. pcie_capability_set_word(dev, PCI_EXP_RTCTL,
  58. PCI_EXP_RTCTL_PMEIE);
  59. else
  60. pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
  61. PCI_EXP_RTCTL_PMEIE);
  62. }
  63. /**
  64. * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
  65. * @bus: PCI bus to scan.
  66. *
  67. * Scan given PCI bus and all buses under it for devices asserting PME#.
  68. */
  69. static bool pcie_pme_walk_bus(struct pci_bus *bus)
  70. {
  71. struct pci_dev *dev;
  72. bool ret = false;
  73. list_for_each_entry(dev, &bus->devices, bus_list) {
  74. /* Skip PCIe devices in case we started from a root port. */
  75. if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
  76. if (dev->pme_poll)
  77. dev->pme_poll = false;
  78. pci_wakeup_event(dev);
  79. pm_request_resume(&dev->dev);
  80. ret = true;
  81. }
  82. if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
  83. ret = true;
  84. }
  85. return ret;
  86. }
  87. /**
  88. * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
  89. * @bus: Secondary bus of the bridge.
  90. * @devfn: Device/function number to check.
  91. *
  92. * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
  93. * PCIe PME message. In such that case the bridge should use the Requester ID
  94. * of device/function number 0 on its secondary bus.
  95. */
  96. static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
  97. {
  98. struct pci_dev *dev;
  99. bool found = false;
  100. if (devfn)
  101. return false;
  102. dev = pci_dev_get(bus->self);
  103. if (!dev)
  104. return false;
  105. if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
  106. down_read(&pci_bus_sem);
  107. if (pcie_pme_walk_bus(bus))
  108. found = true;
  109. up_read(&pci_bus_sem);
  110. }
  111. pci_dev_put(dev);
  112. return found;
  113. }
  114. /**
  115. * pcie_pme_handle_request - Find device that generated PME and handle it.
  116. * @port: Root port or event collector that generated the PME interrupt.
  117. * @req_id: PCIe Requester ID of the device that generated the PME.
  118. */
  119. static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
  120. {
  121. u8 busnr = req_id >> 8, devfn = req_id & 0xff;
  122. struct pci_bus *bus;
  123. struct pci_dev *dev;
  124. bool found = false;
  125. /* First, check if the PME is from the root port itself. */
  126. if (port->devfn == devfn && port->bus->number == busnr) {
  127. if (port->pme_poll)
  128. port->pme_poll = false;
  129. if (pci_check_pme_status(port)) {
  130. pm_request_resume(&port->dev);
  131. found = true;
  132. } else {
  133. /*
  134. * Apparently, the root port generated the PME on behalf
  135. * of a non-PCIe device downstream. If this is done by
  136. * a root port, the Requester ID field in its status
  137. * register may contain either the root port's, or the
  138. * source device's information (PCI Express Base
  139. * Specification, Rev. 2.0, Section 6.1.9).
  140. */
  141. down_read(&pci_bus_sem);
  142. found = pcie_pme_walk_bus(port->subordinate);
  143. up_read(&pci_bus_sem);
  144. }
  145. goto out;
  146. }
  147. /* Second, find the bus the source device is on. */
  148. bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
  149. if (!bus)
  150. goto out;
  151. /* Next, check if the PME is from a PCIe-PCI bridge. */
  152. found = pcie_pme_from_pci_bridge(bus, devfn);
  153. if (found)
  154. goto out;
  155. /* Finally, try to find the PME source on the bus. */
  156. down_read(&pci_bus_sem);
  157. list_for_each_entry(dev, &bus->devices, bus_list) {
  158. pci_dev_get(dev);
  159. if (dev->devfn == devfn) {
  160. found = true;
  161. break;
  162. }
  163. pci_dev_put(dev);
  164. }
  165. up_read(&pci_bus_sem);
  166. if (found) {
  167. /* The device is there, but we have to check its PME status. */
  168. found = pci_check_pme_status(dev);
  169. if (found) {
  170. if (dev->pme_poll)
  171. dev->pme_poll = false;
  172. pci_wakeup_event(dev);
  173. pm_request_resume(&dev->dev);
  174. }
  175. pci_dev_put(dev);
  176. } else if (devfn) {
  177. /*
  178. * The device is not there, but we can still try to recover by
  179. * assuming that the PME was reported by a PCIe-PCI bridge that
  180. * used devfn different from zero.
  181. */
  182. dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
  183. busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
  184. found = pcie_pme_from_pci_bridge(bus, 0);
  185. }
  186. out:
  187. if (!found)
  188. dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
  189. }
  190. /**
  191. * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
  192. * @work: Work structure giving access to service data.
  193. */
  194. static void pcie_pme_work_fn(struct work_struct *work)
  195. {
  196. struct pcie_pme_service_data *data =
  197. container_of(work, struct pcie_pme_service_data, work);
  198. struct pci_dev *port = data->srv->port;
  199. u32 rtsta;
  200. spin_lock_irq(&data->lock);
  201. for (;;) {
  202. if (data->suspend_level != PME_SUSPEND_NONE)
  203. break;
  204. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  205. if (rtsta == (u32) ~0)
  206. break;
  207. if (rtsta & PCI_EXP_RTSTA_PME) {
  208. /*
  209. * Clear PME status of the port. If there are other
  210. * pending PMEs, the status will be set again.
  211. */
  212. pcie_clear_root_pme_status(port);
  213. spin_unlock_irq(&data->lock);
  214. pcie_pme_handle_request(port, rtsta & 0xffff);
  215. spin_lock_irq(&data->lock);
  216. continue;
  217. }
  218. /* No need to loop if there are no more PMEs pending. */
  219. if (!(rtsta & PCI_EXP_RTSTA_PENDING))
  220. break;
  221. spin_unlock_irq(&data->lock);
  222. cpu_relax();
  223. spin_lock_irq(&data->lock);
  224. }
  225. if (data->suspend_level == PME_SUSPEND_NONE)
  226. pcie_pme_interrupt_enable(port, true);
  227. spin_unlock_irq(&data->lock);
  228. }
  229. /**
  230. * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
  231. * @irq: Interrupt vector.
  232. * @context: Interrupt context pointer.
  233. */
  234. static irqreturn_t pcie_pme_irq(int irq, void *context)
  235. {
  236. struct pci_dev *port;
  237. struct pcie_pme_service_data *data;
  238. u32 rtsta;
  239. unsigned long flags;
  240. port = ((struct pcie_device *)context)->port;
  241. data = get_service_data((struct pcie_device *)context);
  242. spin_lock_irqsave(&data->lock, flags);
  243. pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
  244. if (rtsta == (u32) ~0 || !(rtsta & PCI_EXP_RTSTA_PME)) {
  245. spin_unlock_irqrestore(&data->lock, flags);
  246. return IRQ_NONE;
  247. }
  248. pcie_pme_interrupt_enable(port, false);
  249. spin_unlock_irqrestore(&data->lock, flags);
  250. /* We don't use pm_wq, because it's freezable. */
  251. schedule_work(&data->work);
  252. return IRQ_HANDLED;
  253. }
  254. /**
  255. * pcie_pme_set_native - Set the PME interrupt flag for given device.
  256. * @dev: PCI device to handle.
  257. * @ign: Ignored.
  258. */
  259. static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
  260. {
  261. dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
  262. device_set_run_wake(&dev->dev, true);
  263. dev->pme_interrupt = true;
  264. return 0;
  265. }
  266. /**
  267. * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
  268. * @port: PCIe root port or event collector to handle.
  269. *
  270. * For each device below given root port, including the port itself (or for each
  271. * root complex integrated endpoint if @port is a root complex event collector)
  272. * set the flag indicating that it can signal run-time wake-up events via PCIe
  273. * PME interrupts.
  274. */
  275. static void pcie_pme_mark_devices(struct pci_dev *port)
  276. {
  277. pcie_pme_set_native(port, NULL);
  278. if (port->subordinate) {
  279. pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
  280. } else {
  281. struct pci_bus *bus = port->bus;
  282. struct pci_dev *dev;
  283. /* Check if this is a root port event collector. */
  284. if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
  285. return;
  286. down_read(&pci_bus_sem);
  287. list_for_each_entry(dev, &bus->devices, bus_list)
  288. if (pci_is_pcie(dev)
  289. && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
  290. pcie_pme_set_native(dev, NULL);
  291. up_read(&pci_bus_sem);
  292. }
  293. }
  294. /**
  295. * pcie_pme_probe - Initialize PCIe PME service for given root port.
  296. * @srv: PCIe service to initialize.
  297. */
  298. static int pcie_pme_probe(struct pcie_device *srv)
  299. {
  300. struct pci_dev *port;
  301. struct pcie_pme_service_data *data;
  302. int ret;
  303. data = kzalloc(sizeof(*data), GFP_KERNEL);
  304. if (!data)
  305. return -ENOMEM;
  306. spin_lock_init(&data->lock);
  307. INIT_WORK(&data->work, pcie_pme_work_fn);
  308. data->srv = srv;
  309. set_service_data(srv, data);
  310. port = srv->port;
  311. pcie_pme_interrupt_enable(port, false);
  312. pcie_clear_root_pme_status(port);
  313. ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
  314. if (ret) {
  315. kfree(data);
  316. } else {
  317. pcie_pme_mark_devices(port);
  318. pcie_pme_interrupt_enable(port, true);
  319. }
  320. return ret;
  321. }
  322. static bool pcie_pme_check_wakeup(struct pci_bus *bus)
  323. {
  324. struct pci_dev *dev;
  325. if (!bus)
  326. return false;
  327. list_for_each_entry(dev, &bus->devices, bus_list)
  328. if (device_may_wakeup(&dev->dev)
  329. || pcie_pme_check_wakeup(dev->subordinate))
  330. return true;
  331. return false;
  332. }
  333. /**
  334. * pcie_pme_suspend - Suspend PCIe PME service device.
  335. * @srv: PCIe service device to suspend.
  336. */
  337. static int pcie_pme_suspend(struct pcie_device *srv)
  338. {
  339. struct pcie_pme_service_data *data = get_service_data(srv);
  340. struct pci_dev *port = srv->port;
  341. bool wakeup;
  342. int ret;
  343. if (device_may_wakeup(&port->dev)) {
  344. wakeup = true;
  345. } else {
  346. down_read(&pci_bus_sem);
  347. wakeup = pcie_pme_check_wakeup(port->subordinate);
  348. up_read(&pci_bus_sem);
  349. }
  350. spin_lock_irq(&data->lock);
  351. if (wakeup) {
  352. ret = enable_irq_wake(srv->irq);
  353. data->suspend_level = PME_SUSPEND_WAKEUP;
  354. }
  355. if (!wakeup || ret) {
  356. struct pci_dev *port = srv->port;
  357. pcie_pme_interrupt_enable(port, false);
  358. pcie_clear_root_pme_status(port);
  359. data->suspend_level = PME_SUSPEND_NOIRQ;
  360. }
  361. spin_unlock_irq(&data->lock);
  362. synchronize_irq(srv->irq);
  363. return 0;
  364. }
  365. /**
  366. * pcie_pme_resume - Resume PCIe PME service device.
  367. * @srv - PCIe service device to resume.
  368. */
  369. static int pcie_pme_resume(struct pcie_device *srv)
  370. {
  371. struct pcie_pme_service_data *data = get_service_data(srv);
  372. spin_lock_irq(&data->lock);
  373. if (data->suspend_level == PME_SUSPEND_NOIRQ) {
  374. struct pci_dev *port = srv->port;
  375. pcie_clear_root_pme_status(port);
  376. pcie_pme_interrupt_enable(port, true);
  377. } else {
  378. disable_irq_wake(srv->irq);
  379. }
  380. data->suspend_level = PME_SUSPEND_NONE;
  381. spin_unlock_irq(&data->lock);
  382. return 0;
  383. }
  384. /**
  385. * pcie_pme_remove - Prepare PCIe PME service device for removal.
  386. * @srv - PCIe service device to remove.
  387. */
  388. static void pcie_pme_remove(struct pcie_device *srv)
  389. {
  390. pcie_pme_suspend(srv);
  391. free_irq(srv->irq, srv);
  392. kfree(get_service_data(srv));
  393. }
  394. static struct pcie_port_service_driver pcie_pme_driver = {
  395. .name = "pcie_pme",
  396. .port_type = PCI_EXP_TYPE_ROOT_PORT,
  397. .service = PCIE_PORT_SERVICE_PME,
  398. .probe = pcie_pme_probe,
  399. .suspend = pcie_pme_suspend,
  400. .resume = pcie_pme_resume,
  401. .remove = pcie_pme_remove,
  402. };
  403. /**
  404. * pcie_pme_service_init - Register the PCIe PME service driver.
  405. */
  406. static int __init pcie_pme_service_init(void)
  407. {
  408. return pcie_port_service_register(&pcie_pme_driver);
  409. }
  410. module_init(pcie_pme_service_init);