rom.c 6.4 KB

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  1. /*
  2. * drivers/pci/rom.c
  3. *
  4. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  5. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  6. *
  7. * PCI ROM access routines
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/export.h>
  11. #include <linux/pci.h>
  12. #include <linux/slab.h>
  13. #include "pci.h"
  14. /**
  15. * pci_enable_rom - enable ROM decoding for a PCI device
  16. * @pdev: PCI device to enable
  17. *
  18. * Enable ROM decoding on @dev. This involves simply turning on the last
  19. * bit of the PCI ROM BAR. Note that some cards may share address decoders
  20. * between the ROM and other resources, so enabling it may disable access
  21. * to MMIO registers or other card memory.
  22. */
  23. int pci_enable_rom(struct pci_dev *pdev)
  24. {
  25. struct resource *res = pdev->resource + PCI_ROM_RESOURCE;
  26. struct pci_bus_region region;
  27. u32 rom_addr;
  28. if (!res->flags)
  29. return -1;
  30. /*
  31. * Ideally pci_update_resource() would update the ROM BAR address,
  32. * and we would only set the enable bit here. But apparently some
  33. * devices have buggy ROM BARs that read as zero when disabled.
  34. */
  35. pcibios_resource_to_bus(pdev->bus, &region, res);
  36. pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
  37. rom_addr &= ~PCI_ROM_ADDRESS_MASK;
  38. rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
  39. pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
  40. return 0;
  41. }
  42. EXPORT_SYMBOL_GPL(pci_enable_rom);
  43. /**
  44. * pci_disable_rom - disable ROM decoding for a PCI device
  45. * @pdev: PCI device to disable
  46. *
  47. * Disable ROM decoding on a PCI device by turning off the last bit in the
  48. * ROM BAR.
  49. */
  50. void pci_disable_rom(struct pci_dev *pdev)
  51. {
  52. u32 rom_addr;
  53. pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
  54. rom_addr &= ~PCI_ROM_ADDRESS_ENABLE;
  55. pci_write_config_dword(pdev, pdev->rom_base_reg, rom_addr);
  56. }
  57. EXPORT_SYMBOL_GPL(pci_disable_rom);
  58. /**
  59. * pci_get_rom_size - obtain the actual size of the ROM image
  60. * @pdev: target PCI device
  61. * @rom: kernel virtual pointer to image of ROM
  62. * @size: size of PCI window
  63. * return: size of actual ROM image
  64. *
  65. * Determine the actual length of the ROM image.
  66. * The PCI window size could be much larger than the
  67. * actual image size.
  68. */
  69. size_t pci_get_rom_size(struct pci_dev *pdev, void __iomem *rom, size_t size)
  70. {
  71. void __iomem *image;
  72. int last_image;
  73. unsigned length;
  74. image = rom;
  75. do {
  76. void __iomem *pds;
  77. /* Standard PCI ROMs start out with these bytes 55 AA */
  78. if (readb(image) != 0x55) {
  79. dev_err(&pdev->dev, "Invalid ROM contents\n");
  80. break;
  81. }
  82. if (readb(image + 1) != 0xAA)
  83. break;
  84. /* get the PCI data structure and check its signature */
  85. pds = image + readw(image + 24);
  86. if (readb(pds) != 'P')
  87. break;
  88. if (readb(pds + 1) != 'C')
  89. break;
  90. if (readb(pds + 2) != 'I')
  91. break;
  92. if (readb(pds + 3) != 'R')
  93. break;
  94. last_image = readb(pds + 21) & 0x80;
  95. length = readw(pds + 16);
  96. image += length * 512;
  97. } while (length && !last_image);
  98. /* never return a size larger than the PCI resource window */
  99. /* there are known ROMs that get the size wrong */
  100. return min((size_t)(image - rom), size);
  101. }
  102. /**
  103. * pci_map_rom - map a PCI ROM to kernel space
  104. * @pdev: pointer to pci device struct
  105. * @size: pointer to receive size of pci window over ROM
  106. *
  107. * Return: kernel virtual pointer to image of ROM
  108. *
  109. * Map a PCI ROM into kernel space. If ROM is boot video ROM,
  110. * the shadow BIOS copy will be returned instead of the
  111. * actual ROM.
  112. */
  113. void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
  114. {
  115. struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
  116. loff_t start;
  117. void __iomem *rom;
  118. /*
  119. * IORESOURCE_ROM_SHADOW set on x86, x86_64 and IA64 supports legacy
  120. * memory map if the VGA enable bit of the Bridge Control register is
  121. * set for embedded VGA.
  122. */
  123. if (res->flags & IORESOURCE_ROM_SHADOW) {
  124. /* primary video rom always starts here */
  125. start = (loff_t)0xC0000;
  126. *size = 0x20000; /* cover C000:0 through E000:0 */
  127. } else {
  128. if (res->flags &
  129. (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) {
  130. *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  131. return (void __iomem *)(unsigned long)
  132. pci_resource_start(pdev, PCI_ROM_RESOURCE);
  133. } else {
  134. /* assign the ROM an address if it doesn't have one */
  135. if (res->parent == NULL &&
  136. pci_assign_resource(pdev, PCI_ROM_RESOURCE))
  137. return NULL;
  138. start = pci_resource_start(pdev, PCI_ROM_RESOURCE);
  139. *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  140. if (*size == 0)
  141. return NULL;
  142. /* Enable ROM space decodes */
  143. if (pci_enable_rom(pdev))
  144. return NULL;
  145. }
  146. }
  147. rom = ioremap(start, *size);
  148. if (!rom) {
  149. /* restore enable if ioremap fails */
  150. if (!(res->flags & (IORESOURCE_ROM_ENABLE |
  151. IORESOURCE_ROM_SHADOW |
  152. IORESOURCE_ROM_COPY)))
  153. pci_disable_rom(pdev);
  154. return NULL;
  155. }
  156. /*
  157. * Try to find the true size of the ROM since sometimes the PCI window
  158. * size is much larger than the actual size of the ROM.
  159. * True size is important if the ROM is going to be copied.
  160. */
  161. *size = pci_get_rom_size(pdev, rom, *size);
  162. return rom;
  163. }
  164. EXPORT_SYMBOL(pci_map_rom);
  165. /**
  166. * pci_unmap_rom - unmap the ROM from kernel space
  167. * @pdev: pointer to pci device struct
  168. * @rom: virtual address of the previous mapping
  169. *
  170. * Remove a mapping of a previously mapped ROM
  171. */
  172. void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
  173. {
  174. struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
  175. if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
  176. return;
  177. iounmap(rom);
  178. /* Disable again before continuing, leave enabled if pci=rom */
  179. if (!(res->flags & (IORESOURCE_ROM_ENABLE | IORESOURCE_ROM_SHADOW)))
  180. pci_disable_rom(pdev);
  181. }
  182. EXPORT_SYMBOL(pci_unmap_rom);
  183. /**
  184. * pci_cleanup_rom - free the ROM copy created by pci_map_rom_copy
  185. * @pdev: pointer to pci device struct
  186. *
  187. * Free the copied ROM if we allocated one.
  188. */
  189. void pci_cleanup_rom(struct pci_dev *pdev)
  190. {
  191. struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
  192. if (res->flags & IORESOURCE_ROM_COPY) {
  193. kfree((void *)(unsigned long)res->start);
  194. res->flags |= IORESOURCE_UNSET;
  195. res->flags &= ~IORESOURCE_ROM_COPY;
  196. res->start = 0;
  197. res->end = 0;
  198. }
  199. }
  200. /**
  201. * pci_platform_rom - provides a pointer to any ROM image provided by the
  202. * platform
  203. * @pdev: pointer to pci device struct
  204. * @size: pointer to receive size of pci window over ROM
  205. */
  206. void __iomem *pci_platform_rom(struct pci_dev *pdev, size_t *size)
  207. {
  208. if (pdev->rom && pdev->romlen) {
  209. *size = pdev->romlen;
  210. return phys_to_virt((phys_addr_t)pdev->rom);
  211. }
  212. return NULL;
  213. }
  214. EXPORT_SYMBOL(pci_platform_rom);