soc_common.h 5.0 KB

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  1. /*
  2. * linux/drivers/pcmcia/soc_common.h
  3. *
  4. * Copyright (C) 2000 John G Dorsey <john+@cs.cmu.edu>
  5. *
  6. * This file contains definitions for the PCMCIA support code common to
  7. * integrated SOCs like the SA-11x0 and PXA2xx microprocessors.
  8. */
  9. #ifndef _ASM_ARCH_PCMCIA
  10. #define _ASM_ARCH_PCMCIA
  11. /* include the world */
  12. #include <linux/clk.h>
  13. #include <linux/cpufreq.h>
  14. #include <pcmcia/ss.h>
  15. #include <pcmcia/cistpl.h>
  16. struct device;
  17. struct pcmcia_low_level;
  18. /*
  19. * This structure encapsulates per-socket state which we might need to
  20. * use when responding to a Card Services query of some kind.
  21. */
  22. struct soc_pcmcia_socket {
  23. struct pcmcia_socket socket;
  24. /*
  25. * Info from low level handler
  26. */
  27. unsigned int nr;
  28. struct clk *clk;
  29. /*
  30. * Core PCMCIA state
  31. */
  32. const struct pcmcia_low_level *ops;
  33. unsigned int status;
  34. socket_state_t cs_state;
  35. unsigned short spd_io[MAX_IO_WIN];
  36. unsigned short spd_mem[MAX_WIN];
  37. unsigned short spd_attr[MAX_WIN];
  38. struct resource res_skt;
  39. struct resource res_io;
  40. struct resource res_mem;
  41. struct resource res_attr;
  42. void __iomem *virt_io;
  43. struct {
  44. int gpio;
  45. unsigned int irq;
  46. const char *name;
  47. } stat[4];
  48. #define SOC_STAT_CD 0 /* Card detect */
  49. #define SOC_STAT_BVD1 1 /* BATDEAD / IOSTSCHG */
  50. #define SOC_STAT_BVD2 2 /* BATWARN / IOSPKR */
  51. #define SOC_STAT_RDY 3 /* Ready / Interrupt */
  52. unsigned int irq_state;
  53. struct timer_list poll_timer;
  54. struct list_head node;
  55. };
  56. struct skt_dev_info {
  57. int nskt;
  58. struct soc_pcmcia_socket skt[0];
  59. };
  60. struct pcmcia_state {
  61. unsigned detect: 1,
  62. ready: 1,
  63. bvd1: 1,
  64. bvd2: 1,
  65. wrprot: 1,
  66. vs_3v: 1,
  67. vs_Xv: 1;
  68. };
  69. struct pcmcia_low_level {
  70. struct module *owner;
  71. /* first socket in system */
  72. int first;
  73. /* nr of sockets */
  74. int nr;
  75. int (*hw_init)(struct soc_pcmcia_socket *);
  76. void (*hw_shutdown)(struct soc_pcmcia_socket *);
  77. void (*socket_state)(struct soc_pcmcia_socket *, struct pcmcia_state *);
  78. int (*configure_socket)(struct soc_pcmcia_socket *, const socket_state_t *);
  79. /*
  80. * Enable card status IRQs on (re-)initialisation. This can
  81. * be called at initialisation, power management event, or
  82. * pcmcia event.
  83. */
  84. void (*socket_init)(struct soc_pcmcia_socket *);
  85. /*
  86. * Disable card status IRQs and PCMCIA bus on suspend.
  87. */
  88. void (*socket_suspend)(struct soc_pcmcia_socket *);
  89. /*
  90. * Hardware specific timing routines.
  91. * If provided, the get_timing routine overrides the SOC default.
  92. */
  93. unsigned int (*get_timing)(struct soc_pcmcia_socket *, unsigned int, unsigned int);
  94. int (*set_timing)(struct soc_pcmcia_socket *);
  95. int (*show_timing)(struct soc_pcmcia_socket *, char *);
  96. #ifdef CONFIG_CPU_FREQ
  97. /*
  98. * CPUFREQ support.
  99. */
  100. int (*frequency_change)(struct soc_pcmcia_socket *, unsigned long, struct cpufreq_freqs *);
  101. #endif
  102. };
  103. struct soc_pcmcia_timing {
  104. unsigned short io;
  105. unsigned short mem;
  106. unsigned short attr;
  107. };
  108. extern void soc_common_pcmcia_get_timing(struct soc_pcmcia_socket *, struct soc_pcmcia_timing *);
  109. void soc_pcmcia_init_one(struct soc_pcmcia_socket *skt,
  110. struct pcmcia_low_level *ops, struct device *dev);
  111. void soc_pcmcia_remove_one(struct soc_pcmcia_socket *skt);
  112. int soc_pcmcia_add_one(struct soc_pcmcia_socket *skt);
  113. #ifdef CONFIG_PCMCIA_DEBUG
  114. extern void soc_pcmcia_debug(struct soc_pcmcia_socket *skt, const char *func,
  115. int lvl, const char *fmt, ...);
  116. #define debug(skt, lvl, fmt, arg...) \
  117. soc_pcmcia_debug(skt, __func__, lvl, fmt , ## arg)
  118. #else
  119. #define debug(skt, lvl, fmt, arg...) do { } while (0)
  120. #endif
  121. /*
  122. * The PC Card Standard, Release 7, section 4.13.4, says that twIORD
  123. * has a minimum value of 165ns. Section 4.13.5 says that twIOWR has
  124. * a minimum value of 165ns, as well. Section 4.7.2 (describing
  125. * common and attribute memory write timing) says that twWE has a
  126. * minimum value of 150ns for a 250ns cycle time (for 5V operation;
  127. * see section 4.7.4), or 300ns for a 600ns cycle time (for 3.3V
  128. * operation, also section 4.7.4). Section 4.7.3 says that taOE
  129. * has a maximum value of 150ns for a 300ns cycle time (for 5V
  130. * operation), or 300ns for a 600ns cycle time (for 3.3V operation).
  131. *
  132. * When configuring memory maps, Card Services appears to adopt the policy
  133. * that a memory access time of "0" means "use the default." The default
  134. * PCMCIA I/O command width time is 165ns. The default PCMCIA 5V attribute
  135. * and memory command width time is 150ns; the PCMCIA 3.3V attribute and
  136. * memory command width time is 300ns.
  137. */
  138. #define SOC_PCMCIA_IO_ACCESS (165)
  139. #define SOC_PCMCIA_5V_MEM_ACCESS (150)
  140. #define SOC_PCMCIA_3V_MEM_ACCESS (300)
  141. #define SOC_PCMCIA_ATTR_MEM_ACCESS (300)
  142. /*
  143. * The socket driver actually works nicely in interrupt-driven form,
  144. * so the (relatively infrequent) polling is "just to be sure."
  145. */
  146. #define SOC_PCMCIA_POLL_PERIOD (2*HZ)
  147. /* I/O pins replacing memory pins
  148. * (PCMCIA System Architecture, 2nd ed., by Don Anderson, p.75)
  149. *
  150. * These signals change meaning when going from memory-only to
  151. * memory-or-I/O interface:
  152. */
  153. #define iostschg bvd1
  154. #define iospkr bvd2
  155. #endif