pinctrl-mtk-common.h 8.1 KB

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  1. /*
  2. * Copyright (c) 2014 MediaTek Inc.
  3. * Author: Hongzhou.Yang <hongzhou.yang@mediatek.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. */
  14. #ifndef __PINCTRL_MTK_COMMON_H
  15. #define __PINCTRL_MTK_COMMON_H
  16. #include <linux/pinctrl/pinctrl.h>
  17. #include <linux/regmap.h>
  18. #include <linux/pinctrl/pinconf-generic.h>
  19. #define NO_EINT_SUPPORT 255
  20. #define MT_EDGE_SENSITIVE 0
  21. #define MT_LEVEL_SENSITIVE 1
  22. #define EINT_DBNC_SET_DBNC_BITS 4
  23. #define EINT_DBNC_RST_BIT (0x1 << 1)
  24. #define EINT_DBNC_SET_EN (0x1 << 0)
  25. #define MTK_PINCTRL_NOT_SUPPORT (0xffff)
  26. struct mtk_desc_function {
  27. const char *name;
  28. unsigned char muxval;
  29. };
  30. struct mtk_desc_eint {
  31. unsigned char eintmux;
  32. unsigned char eintnum;
  33. };
  34. struct mtk_desc_pin {
  35. struct pinctrl_pin_desc pin;
  36. const struct mtk_desc_eint eint;
  37. const struct mtk_desc_function *functions;
  38. };
  39. #define MTK_PIN(_pin, _pad, _chip, _eint, ...) \
  40. { \
  41. .pin = _pin, \
  42. .eint = _eint, \
  43. .functions = (struct mtk_desc_function[]){ \
  44. __VA_ARGS__, { } }, \
  45. }
  46. #define MTK_EINT_FUNCTION(_eintmux, _eintnum) \
  47. { \
  48. .eintmux = _eintmux, \
  49. .eintnum = _eintnum, \
  50. }
  51. #define MTK_FUNCTION(_val, _name) \
  52. { \
  53. .muxval = _val, \
  54. .name = _name, \
  55. }
  56. #define SET_ADDR(x, y) (x + (y->devdata->port_align))
  57. #define CLR_ADDR(x, y) (x + (y->devdata->port_align << 1))
  58. struct mtk_pinctrl_group {
  59. const char *name;
  60. unsigned long config;
  61. unsigned pin;
  62. };
  63. /**
  64. * struct mtk_drv_group_desc - Provide driving group data.
  65. * @max_drv: The maximum current of this group.
  66. * @min_drv: The minimum current of this group.
  67. * @low_bit: The lowest bit of this group.
  68. * @high_bit: The highest bit of this group.
  69. * @step: The step current of this group.
  70. */
  71. struct mtk_drv_group_desc {
  72. unsigned char min_drv;
  73. unsigned char max_drv;
  74. unsigned char low_bit;
  75. unsigned char high_bit;
  76. unsigned char step;
  77. };
  78. #define MTK_DRV_GRP(_min, _max, _low, _high, _step) \
  79. { \
  80. .min_drv = _min, \
  81. .max_drv = _max, \
  82. .low_bit = _low, \
  83. .high_bit = _high, \
  84. .step = _step, \
  85. }
  86. /**
  87. * struct mtk_pin_drv_grp - Provide each pin driving info.
  88. * @pin: The pin number.
  89. * @offset: The offset of driving register for this pin.
  90. * @bit: The bit of driving register for this pin.
  91. * @grp: The group for this pin belongs to.
  92. */
  93. struct mtk_pin_drv_grp {
  94. unsigned short pin;
  95. unsigned short offset;
  96. unsigned char bit;
  97. unsigned char grp;
  98. };
  99. #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \
  100. { \
  101. .pin = _pin, \
  102. .offset = _offset, \
  103. .bit = _bit, \
  104. .grp = _grp, \
  105. }
  106. /**
  107. * struct mtk_pin_spec_pupd_set_samereg
  108. * - For special pins' pull up/down setting which resides in same register
  109. * @pin: The pin number.
  110. * @offset: The offset of special pull up/down setting register.
  111. * @pupd_bit: The pull up/down bit in this register.
  112. * @r0_bit: The r0 bit of pull resistor.
  113. * @r1_bit: The r1 bit of pull resistor.
  114. */
  115. struct mtk_pin_spec_pupd_set_samereg {
  116. unsigned short pin;
  117. unsigned short offset;
  118. unsigned char pupd_bit;
  119. unsigned char r1_bit;
  120. unsigned char r0_bit;
  121. };
  122. #define MTK_PIN_PUPD_SPEC_SR(_pin, _offset, _pupd, _r1, _r0) \
  123. { \
  124. .pin = _pin, \
  125. .offset = _offset, \
  126. .pupd_bit = _pupd, \
  127. .r1_bit = _r1, \
  128. .r0_bit = _r0, \
  129. }
  130. /**
  131. * struct mtk_pin_ies_set - For special pins' ies and smt setting.
  132. * @start: The start pin number of those special pins.
  133. * @end: The end pin number of those special pins.
  134. * @offset: The offset of special setting register.
  135. * @bit: The bit of special setting register.
  136. */
  137. struct mtk_pin_ies_smt_set {
  138. unsigned short start;
  139. unsigned short end;
  140. unsigned short offset;
  141. unsigned char bit;
  142. };
  143. #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \
  144. { \
  145. .start = _start, \
  146. .end = _end, \
  147. .bit = _bit, \
  148. .offset = _offset, \
  149. }
  150. struct mtk_eint_offsets {
  151. const char *name;
  152. unsigned int stat;
  153. unsigned int ack;
  154. unsigned int mask;
  155. unsigned int mask_set;
  156. unsigned int mask_clr;
  157. unsigned int sens;
  158. unsigned int sens_set;
  159. unsigned int sens_clr;
  160. unsigned int soft;
  161. unsigned int soft_set;
  162. unsigned int soft_clr;
  163. unsigned int pol;
  164. unsigned int pol_set;
  165. unsigned int pol_clr;
  166. unsigned int dom_en;
  167. unsigned int dbnc_ctrl;
  168. unsigned int dbnc_set;
  169. unsigned int dbnc_clr;
  170. u8 port_mask;
  171. u8 ports;
  172. };
  173. /**
  174. * struct mtk_pinctrl_devdata - Provide HW GPIO related data.
  175. * @pins: An array describing all pins the pin controller affects.
  176. * @npins: The number of entries in @pins.
  177. *
  178. * @grp_desc: The driving group info.
  179. * @pin_drv_grp: The driving group for all pins.
  180. * @spec_pull_set: Each SoC may have special pins for pull up/down setting,
  181. * these pins' pull setting are very different, they have separate pull
  182. * up/down bit, R0 and R1 resistor bit, so they need special pull setting.
  183. * If special setting is success, this should return 0, otherwise it should
  184. * return non-zero value.
  185. * @spec_ies_smt_set: Some pins are irregular, their input enable and smt
  186. * control register are discontinuous, but they are mapping together. That
  187. * means when user set smt, input enable is set at the same time. So they
  188. * also need special control. If special control is success, this should
  189. * return 0, otherwise return non-zero value.
  190. *
  191. * @dir_offset: The direction register offset.
  192. * @pullen_offset: The pull-up/pull-down enable register offset.
  193. * @pinmux_offset: The pinmux register offset.
  194. *
  195. * @type1_start: Some chips have two base addresses for pull select register,
  196. * that means some pins use the first address and others use the second. This
  197. * member record the start of pin number to use the second address.
  198. * @type1_end: The end of pin number to use the second address.
  199. *
  200. * @port_shf: The shift between two registers.
  201. * @port_mask: The mask of register.
  202. * @port_align: Provide clear register and set register step.
  203. */
  204. struct mtk_pinctrl_devdata {
  205. const struct mtk_desc_pin *pins;
  206. unsigned int npins;
  207. const struct mtk_drv_group_desc *grp_desc;
  208. unsigned int n_grp_cls;
  209. const struct mtk_pin_drv_grp *pin_drv_grp;
  210. unsigned int n_pin_drv_grps;
  211. int (*spec_pull_set)(struct regmap *reg, unsigned int pin,
  212. unsigned char align, bool isup, unsigned int arg);
  213. int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin,
  214. unsigned char align, int value, enum pin_config_param arg);
  215. unsigned int dir_offset;
  216. unsigned int ies_offset;
  217. unsigned int smt_offset;
  218. unsigned int pullen_offset;
  219. unsigned int pullsel_offset;
  220. unsigned int drv_offset;
  221. unsigned int dout_offset;
  222. unsigned int din_offset;
  223. unsigned int pinmux_offset;
  224. unsigned short type1_start;
  225. unsigned short type1_end;
  226. unsigned char port_shf;
  227. unsigned char port_mask;
  228. unsigned char port_align;
  229. struct mtk_eint_offsets eint_offsets;
  230. unsigned int ap_num;
  231. unsigned int db_cnt;
  232. };
  233. struct mtk_pinctrl {
  234. struct regmap *regmap1;
  235. struct regmap *regmap2;
  236. struct pinctrl_desc pctl_desc;
  237. struct device *dev;
  238. struct gpio_chip *chip;
  239. struct mtk_pinctrl_group *groups;
  240. unsigned ngroups;
  241. const char **grp_names;
  242. struct pinctrl_dev *pctl_dev;
  243. const struct mtk_pinctrl_devdata *devdata;
  244. void __iomem *eint_reg_base;
  245. struct irq_domain *domain;
  246. int *eint_dual_edges;
  247. u32 *wake_mask;
  248. u32 *cur_mask;
  249. };
  250. int mtk_pctrl_init(struct platform_device *pdev,
  251. const struct mtk_pinctrl_devdata *data,
  252. struct regmap *regmap);
  253. int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap,
  254. const struct mtk_pin_spec_pupd_set_samereg *pupd_infos,
  255. unsigned int info_num, unsigned int pin,
  256. unsigned char align, bool isup, unsigned int r1r0);
  257. int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap,
  258. const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num,
  259. unsigned int pin, unsigned char align, int value);
  260. extern const struct dev_pm_ops mtk_eint_pm_ops;
  261. #endif /* __PINCTRL_MTK_COMMON_H */