pinctrl-ab8505.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381
  1. /*
  2. * Copyright (C) ST-Ericsson SA 2012
  3. *
  4. * Author: Patrice Chotard <patrice.chotard@stericsson.com> for ST-Ericsson.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/kernel.h>
  11. #include <linux/gpio.h>
  12. #include <linux/pinctrl/pinctrl.h>
  13. #include <linux/mfd/abx500/ab8500.h>
  14. #include "pinctrl-abx500.h"
  15. /* All the pins that can be used for GPIO and some other functions */
  16. #define ABX500_GPIO(offset) (offset)
  17. #define AB8505_PIN_N4 ABX500_GPIO(1)
  18. #define AB8505_PIN_R5 ABX500_GPIO(2)
  19. #define AB8505_PIN_P5 ABX500_GPIO(3)
  20. /* hole */
  21. #define AB8505_PIN_B16 ABX500_GPIO(10)
  22. #define AB8505_PIN_B17 ABX500_GPIO(11)
  23. /* hole */
  24. #define AB8505_PIN_D17 ABX500_GPIO(13)
  25. #define AB8505_PIN_C16 ABX500_GPIO(14)
  26. /* hole */
  27. #define AB8505_PIN_P2 ABX500_GPIO(17)
  28. #define AB8505_PIN_N3 ABX500_GPIO(18)
  29. #define AB8505_PIN_T1 ABX500_GPIO(19)
  30. #define AB8505_PIN_P3 ABX500_GPIO(20)
  31. /* hole */
  32. #define AB8505_PIN_H14 ABX500_GPIO(34)
  33. /* hole */
  34. #define AB8505_PIN_J15 ABX500_GPIO(40)
  35. #define AB8505_PIN_J14 ABX500_GPIO(41)
  36. /* hole */
  37. #define AB8505_PIN_L4 ABX500_GPIO(50)
  38. /* hole */
  39. #define AB8505_PIN_D16 ABX500_GPIO(52)
  40. #define AB8505_PIN_D15 ABX500_GPIO(53)
  41. /* indicates the higher GPIO number */
  42. #define AB8505_GPIO_MAX_NUMBER 53
  43. /*
  44. * The names of the pins are denoted by GPIO number and ball name, even
  45. * though they can be used for other things than GPIO, this is the first
  46. * column in the table of the data sheet and often used on schematics and
  47. * such.
  48. */
  49. static const struct pinctrl_pin_desc ab8505_pins[] = {
  50. PINCTRL_PIN(AB8505_PIN_N4, "GPIO1_N4"),
  51. PINCTRL_PIN(AB8505_PIN_R5, "GPIO2_R5"),
  52. PINCTRL_PIN(AB8505_PIN_P5, "GPIO3_P5"),
  53. /* hole */
  54. PINCTRL_PIN(AB8505_PIN_B16, "GPIO10_B16"),
  55. PINCTRL_PIN(AB8505_PIN_B17, "GPIO11_B17"),
  56. /* hole */
  57. PINCTRL_PIN(AB8505_PIN_D17, "GPIO13_D17"),
  58. PINCTRL_PIN(AB8505_PIN_C16, "GPIO14_C16"),
  59. /* hole */
  60. PINCTRL_PIN(AB8505_PIN_P2, "GPIO17_P2"),
  61. PINCTRL_PIN(AB8505_PIN_N3, "GPIO18_N3"),
  62. PINCTRL_PIN(AB8505_PIN_T1, "GPIO19_T1"),
  63. PINCTRL_PIN(AB8505_PIN_P3, "GPIO20_P3"),
  64. /* hole */
  65. PINCTRL_PIN(AB8505_PIN_H14, "GPIO34_H14"),
  66. /* hole */
  67. PINCTRL_PIN(AB8505_PIN_J15, "GPIO40_J15"),
  68. PINCTRL_PIN(AB8505_PIN_J14, "GPIO41_J14"),
  69. /* hole */
  70. PINCTRL_PIN(AB8505_PIN_L4, "GPIO50_L4"),
  71. /* hole */
  72. PINCTRL_PIN(AB8505_PIN_D16, "GPIO52_D16"),
  73. PINCTRL_PIN(AB8505_PIN_D15, "GPIO53_D15"),
  74. };
  75. /*
  76. * Maps local GPIO offsets to local pin numbers
  77. */
  78. static const struct abx500_pinrange ab8505_pinranges[] = {
  79. ABX500_PINRANGE(1, 3, ABX500_ALT_A),
  80. ABX500_PINRANGE(10, 2, ABX500_DEFAULT),
  81. ABX500_PINRANGE(13, 1, ABX500_DEFAULT),
  82. ABX500_PINRANGE(14, 1, ABX500_ALT_A),
  83. ABX500_PINRANGE(17, 4, ABX500_ALT_A),
  84. ABX500_PINRANGE(34, 1, ABX500_ALT_A),
  85. ABX500_PINRANGE(40, 2, ABX500_ALT_A),
  86. ABX500_PINRANGE(50, 1, ABX500_DEFAULT),
  87. ABX500_PINRANGE(52, 2, ABX500_ALT_A),
  88. };
  89. /*
  90. * Read the pin group names like this:
  91. * sysclkreq2_d_1 = first groups of pins for sysclkreq2 on default function
  92. *
  93. * The groups are arranged as sets per altfunction column, so we can
  94. * mux in one group at a time by selecting the same altfunction for them
  95. * all. When functions require pins on different altfunctions, you need
  96. * to combine several groups.
  97. */
  98. /* default column */
  99. static const unsigned sysclkreq2_d_1_pins[] = { AB8505_PIN_N4 };
  100. static const unsigned sysclkreq3_d_1_pins[] = { AB8505_PIN_R5 };
  101. static const unsigned sysclkreq4_d_1_pins[] = { AB8505_PIN_P5 };
  102. static const unsigned gpio10_d_1_pins[] = { AB8505_PIN_B16 };
  103. static const unsigned gpio11_d_1_pins[] = { AB8505_PIN_B17 };
  104. static const unsigned gpio13_d_1_pins[] = { AB8505_PIN_D17 };
  105. static const unsigned pwmout1_d_1_pins[] = { AB8505_PIN_C16 };
  106. /* audio data interface 2*/
  107. static const unsigned adi2_d_1_pins[] = { AB8505_PIN_P2, AB8505_PIN_N3,
  108. AB8505_PIN_T1, AB8505_PIN_P3 };
  109. static const unsigned extcpena_d_1_pins[] = { AB8505_PIN_H14 };
  110. /* modem SDA/SCL */
  111. static const unsigned modsclsda_d_1_pins[] = { AB8505_PIN_J15, AB8505_PIN_J14 };
  112. static const unsigned gpio50_d_1_pins[] = { AB8505_PIN_L4 };
  113. static const unsigned resethw_d_1_pins[] = { AB8505_PIN_D16 };
  114. static const unsigned service_d_1_pins[] = { AB8505_PIN_D15 };
  115. /* Altfunction A column */
  116. static const unsigned gpio1_a_1_pins[] = { AB8505_PIN_N4 };
  117. static const unsigned gpio2_a_1_pins[] = { AB8505_PIN_R5 };
  118. static const unsigned gpio3_a_1_pins[] = { AB8505_PIN_P5 };
  119. static const unsigned hiqclkena_a_1_pins[] = { AB8505_PIN_B16 };
  120. static const unsigned pdmclk_a_1_pins[] = { AB8505_PIN_B17 };
  121. static const unsigned uarttxdata_a_1_pins[] = { AB8505_PIN_D17 };
  122. static const unsigned gpio14_a_1_pins[] = { AB8505_PIN_C16 };
  123. static const unsigned gpio17_a_1_pins[] = { AB8505_PIN_P2 };
  124. static const unsigned gpio18_a_1_pins[] = { AB8505_PIN_N3 };
  125. static const unsigned gpio19_a_1_pins[] = { AB8505_PIN_T1 };
  126. static const unsigned gpio20_a_1_pins[] = { AB8505_PIN_P3 };
  127. static const unsigned gpio34_a_1_pins[] = { AB8505_PIN_H14 };
  128. static const unsigned gpio40_a_1_pins[] = { AB8505_PIN_J15 };
  129. static const unsigned gpio41_a_1_pins[] = { AB8505_PIN_J14 };
  130. static const unsigned uartrxdata_a_1_pins[] = { AB8505_PIN_J14 };
  131. static const unsigned gpio50_a_1_pins[] = { AB8505_PIN_L4 };
  132. static const unsigned gpio52_a_1_pins[] = { AB8505_PIN_D16 };
  133. static const unsigned gpio53_a_1_pins[] = { AB8505_PIN_D15 };
  134. /* Altfunction B colum */
  135. static const unsigned pdmdata_b_1_pins[] = { AB8505_PIN_B16 };
  136. static const unsigned extvibrapwm1_b_1_pins[] = { AB8505_PIN_D17 };
  137. static const unsigned extvibrapwm2_b_1_pins[] = { AB8505_PIN_L4 };
  138. /* Altfunction C column */
  139. static const unsigned usbvdat_c_1_pins[] = { AB8505_PIN_D17 };
  140. #define AB8505_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
  141. .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
  142. static const struct abx500_pingroup ab8505_groups[] = {
  143. AB8505_PIN_GROUP(sysclkreq2_d_1, ABX500_DEFAULT),
  144. AB8505_PIN_GROUP(sysclkreq3_d_1, ABX500_DEFAULT),
  145. AB8505_PIN_GROUP(sysclkreq4_d_1, ABX500_DEFAULT),
  146. AB8505_PIN_GROUP(gpio10_d_1, ABX500_DEFAULT),
  147. AB8505_PIN_GROUP(gpio11_d_1, ABX500_DEFAULT),
  148. AB8505_PIN_GROUP(gpio13_d_1, ABX500_DEFAULT),
  149. AB8505_PIN_GROUP(pwmout1_d_1, ABX500_DEFAULT),
  150. AB8505_PIN_GROUP(adi2_d_1, ABX500_DEFAULT),
  151. AB8505_PIN_GROUP(extcpena_d_1, ABX500_DEFAULT),
  152. AB8505_PIN_GROUP(modsclsda_d_1, ABX500_DEFAULT),
  153. AB8505_PIN_GROUP(gpio50_d_1, ABX500_DEFAULT),
  154. AB8505_PIN_GROUP(resethw_d_1, ABX500_DEFAULT),
  155. AB8505_PIN_GROUP(service_d_1, ABX500_DEFAULT),
  156. AB8505_PIN_GROUP(gpio1_a_1, ABX500_ALT_A),
  157. AB8505_PIN_GROUP(gpio2_a_1, ABX500_ALT_A),
  158. AB8505_PIN_GROUP(gpio3_a_1, ABX500_ALT_A),
  159. AB8505_PIN_GROUP(hiqclkena_a_1, ABX500_ALT_A),
  160. AB8505_PIN_GROUP(pdmclk_a_1, ABX500_ALT_A),
  161. AB8505_PIN_GROUP(uarttxdata_a_1, ABX500_ALT_A),
  162. AB8505_PIN_GROUP(gpio14_a_1, ABX500_ALT_A),
  163. AB8505_PIN_GROUP(gpio17_a_1, ABX500_ALT_A),
  164. AB8505_PIN_GROUP(gpio18_a_1, ABX500_ALT_A),
  165. AB8505_PIN_GROUP(gpio19_a_1, ABX500_ALT_A),
  166. AB8505_PIN_GROUP(gpio20_a_1, ABX500_ALT_A),
  167. AB8505_PIN_GROUP(gpio34_a_1, ABX500_ALT_A),
  168. AB8505_PIN_GROUP(gpio40_a_1, ABX500_ALT_A),
  169. AB8505_PIN_GROUP(gpio41_a_1, ABX500_ALT_A),
  170. AB8505_PIN_GROUP(uartrxdata_a_1, ABX500_ALT_A),
  171. AB8505_PIN_GROUP(gpio52_a_1, ABX500_ALT_A),
  172. AB8505_PIN_GROUP(gpio53_a_1, ABX500_ALT_A),
  173. AB8505_PIN_GROUP(pdmdata_b_1, ABX500_ALT_B),
  174. AB8505_PIN_GROUP(extvibrapwm1_b_1, ABX500_ALT_B),
  175. AB8505_PIN_GROUP(extvibrapwm2_b_1, ABX500_ALT_B),
  176. AB8505_PIN_GROUP(usbvdat_c_1, ABX500_ALT_C),
  177. };
  178. /* We use this macro to define the groups applicable to a function */
  179. #define AB8505_FUNC_GROUPS(a, b...) \
  180. static const char * const a##_groups[] = { b };
  181. AB8505_FUNC_GROUPS(sysclkreq, "sysclkreq2_d_1", "sysclkreq3_d_1",
  182. "sysclkreq4_d_1");
  183. AB8505_FUNC_GROUPS(gpio, "gpio1_a_1", "gpio2_a_1", "gpio3_a_1",
  184. "gpio10_d_1", "gpio11_d_1", "gpio13_d_1", "gpio14_a_1",
  185. "gpio17_a_1", "gpio18_a_1", "gpio19_a_1", "gpio20_a_1",
  186. "gpio34_a_1", "gpio40_a_1", "gpio41_a_1", "gpio50_d_1",
  187. "gpio52_a_1", "gpio53_a_1");
  188. AB8505_FUNC_GROUPS(pwmout, "pwmout1_d_1");
  189. AB8505_FUNC_GROUPS(adi2, "adi2_d_1");
  190. AB8505_FUNC_GROUPS(extcpena, "extcpena_d_1");
  191. AB8505_FUNC_GROUPS(modsclsda, "modsclsda_d_1");
  192. AB8505_FUNC_GROUPS(resethw, "resethw_d_1");
  193. AB8505_FUNC_GROUPS(service, "service_d_1");
  194. AB8505_FUNC_GROUPS(hiqclkena, "hiqclkena_a_1");
  195. AB8505_FUNC_GROUPS(pdm, "pdmclk_a_1", "pdmdata_b_1");
  196. AB8505_FUNC_GROUPS(uartdata, "uarttxdata_a_1", "uartrxdata_a_1");
  197. AB8505_FUNC_GROUPS(extvibra, "extvibrapwm1_b_1", "extvibrapwm2_b_1");
  198. AB8505_FUNC_GROUPS(usbvdat, "usbvdat_c_1");
  199. #define FUNCTION(fname) \
  200. { \
  201. .name = #fname, \
  202. .groups = fname##_groups, \
  203. .ngroups = ARRAY_SIZE(fname##_groups), \
  204. }
  205. static const struct abx500_function ab8505_functions[] = {
  206. FUNCTION(sysclkreq),
  207. FUNCTION(gpio),
  208. FUNCTION(pwmout),
  209. FUNCTION(adi2),
  210. FUNCTION(extcpena),
  211. FUNCTION(modsclsda),
  212. FUNCTION(resethw),
  213. FUNCTION(service),
  214. FUNCTION(hiqclkena),
  215. FUNCTION(pdm),
  216. FUNCTION(uartdata),
  217. FUNCTION(extvibra),
  218. FUNCTION(extvibra),
  219. FUNCTION(usbvdat),
  220. };
  221. /*
  222. * this table translates what's is in the AB8505 specification regarding the
  223. * balls alternate functions (as for DB, default, ALT_A, ALT_B and ALT_C).
  224. * ALTERNATE_FUNCTIONS(GPIO_NUMBER, GPIOSEL bit, ALTERNATFUNC bit1,
  225. * ALTERNATEFUNC bit2, ALTA val, ALTB val, ALTC val),
  226. *
  227. * example :
  228. *
  229. * ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2),
  230. * means that pin AB8505_PIN_D18 (pin 13) supports 4 mux (default/ALT_A,
  231. * ALT_B and ALT_C), so GPIOSEL and ALTERNATFUNC registers are used to
  232. * select the mux. ALTA, ALTB and ALTC val indicates values to write in
  233. * ALTERNATFUNC register. We need to specifies these values as SOC
  234. * designers didn't apply the same logic on how to select mux in the
  235. * ABx500 family.
  236. *
  237. * As this pins supports at least ALT_B mux, default mux is
  238. * selected by writing 1 in GPIOSEL bit :
  239. *
  240. * | GPIOSEL bit=4 | alternatfunc bit2=4 | alternatfunc bit1=3
  241. * default | 1 | 0 | 0
  242. * alt_A | 0 | 0 | 1
  243. * alt_B | 0 | 0 | 0
  244. * alt_C | 0 | 1 | 0
  245. *
  246. * ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED),
  247. * means that pin AB9540_PIN_R4 (pin 1) supports 2 mux, so only GPIOSEL
  248. * register is used to select the mux. As this pins doesn't support at
  249. * least ALT_B mux, default mux is by writing 0 in GPIOSEL bit :
  250. *
  251. * | GPIOSEL bit=0 | alternatfunc bit2= | alternatfunc bit1=
  252. * default | 0 | 0 | 0
  253. * alt_A | 1 | 0 | 0
  254. */
  255. static struct
  256. alternate_functions ab8505_alternate_functions[AB8505_GPIO_MAX_NUMBER + 1] = {
  257. ALTERNATE_FUNCTIONS(0, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO0 */
  258. ALTERNATE_FUNCTIONS(1, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO1, altA controlled by bit 0 */
  259. ALTERNATE_FUNCTIONS(2, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO2, altA controlled by bit 1 */
  260. ALTERNATE_FUNCTIONS(3, 2, UNUSED, UNUSED, 0, 0, 0), /* GPIO3, altA controlled by bit 2*/
  261. ALTERNATE_FUNCTIONS(4, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO4, bit 3 reserved */
  262. ALTERNATE_FUNCTIONS(5, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO5, bit 4 reserved */
  263. ALTERNATE_FUNCTIONS(6, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO6, bit 5 reserved */
  264. ALTERNATE_FUNCTIONS(7, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO7, bit 6 reserved */
  265. ALTERNATE_FUNCTIONS(8, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO8, bit 7 reserved */
  266. ALTERNATE_FUNCTIONS(9, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO9, bit 0 reserved */
  267. ALTERNATE_FUNCTIONS(10, 1, 0, UNUSED, 1, 0, 0), /* GPIO10, altA and altB controlled by bit 0 */
  268. ALTERNATE_FUNCTIONS(11, 2, 1, UNUSED, 0, 0, 0), /* GPIO11, altA controlled by bit 2 */
  269. ALTERNATE_FUNCTIONS(12, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO12, bit3 reserved */
  270. ALTERNATE_FUNCTIONS(13, 4, 3, 4, 1, 0, 2), /* GPIO13, altA altB and altC controlled by bit 3 and 4 */
  271. ALTERNATE_FUNCTIONS(14, 5, UNUSED, UNUSED, 0, 0, 0), /* GPIO14, altA controlled by bit 5 */
  272. ALTERNATE_FUNCTIONS(15, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 6 reserved */
  273. ALTERNATE_FUNCTIONS(16, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO15, bit 7 reserved */
  274. /*
  275. * pins 17 to 20 are special case, only bit 0 is used to select
  276. * alternate function for these 4 pins.
  277. * bits 1 to 3 are reserved
  278. */
  279. ALTERNATE_FUNCTIONS(17, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO17, altA controlled by bit 0 */
  280. ALTERNATE_FUNCTIONS(18, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO18, altA controlled by bit 0 */
  281. ALTERNATE_FUNCTIONS(19, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO19, altA controlled by bit 0 */
  282. ALTERNATE_FUNCTIONS(20, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO20, altA controlled by bit 0 */
  283. ALTERNATE_FUNCTIONS(21, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO21, bit 4 reserved */
  284. ALTERNATE_FUNCTIONS(22, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO22, bit 5 reserved */
  285. ALTERNATE_FUNCTIONS(23, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO23, bit 6 reserved */
  286. ALTERNATE_FUNCTIONS(24, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO24, bit 7 reserved */
  287. ALTERNATE_FUNCTIONS(25, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO25, bit 0 reserved */
  288. ALTERNATE_FUNCTIONS(26, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO26, bit 1 reserved */
  289. ALTERNATE_FUNCTIONS(27, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO27, bit 2 reserved */
  290. ALTERNATE_FUNCTIONS(28, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO28, bit 3 reserved */
  291. ALTERNATE_FUNCTIONS(29, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO29, bit 4 reserved */
  292. ALTERNATE_FUNCTIONS(30, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO30, bit 5 reserved */
  293. ALTERNATE_FUNCTIONS(31, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO31, bit 6 reserved */
  294. ALTERNATE_FUNCTIONS(32, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO32, bit 7 reserved */
  295. ALTERNATE_FUNCTIONS(33, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO33, bit 0 reserved */
  296. ALTERNATE_FUNCTIONS(34, 1, UNUSED, UNUSED, 0, 0, 0), /* GPIO34, altA controlled by bit 1 */
  297. ALTERNATE_FUNCTIONS(35, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO35, bit 2 reserved */
  298. ALTERNATE_FUNCTIONS(36, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO36, bit 2 reserved */
  299. ALTERNATE_FUNCTIONS(37, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO37, bit 2 reserved */
  300. ALTERNATE_FUNCTIONS(38, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO38, bit 2 reserved */
  301. ALTERNATE_FUNCTIONS(39, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO39, bit 2 reserved */
  302. ALTERNATE_FUNCTIONS(40, 7, UNUSED, UNUSED, 0, 0, 0), /* GPIO40, altA controlled by bit 7*/
  303. ALTERNATE_FUNCTIONS(41, 0, UNUSED, UNUSED, 0, 0, 0), /* GPIO41, altA controlled by bit 0 */
  304. ALTERNATE_FUNCTIONS(42, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO42, bit 1 reserved */
  305. ALTERNATE_FUNCTIONS(43, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO43, bit 2 reserved */
  306. ALTERNATE_FUNCTIONS(44, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO44, bit 3 reserved */
  307. ALTERNATE_FUNCTIONS(45, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO45, bit 4 reserved */
  308. ALTERNATE_FUNCTIONS(46, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO46, bit 5 reserved */
  309. ALTERNATE_FUNCTIONS(47, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO47, bit 6 reserved */
  310. ALTERNATE_FUNCTIONS(48, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO48, bit 7 reserved */
  311. ALTERNATE_FUNCTIONS(49, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
  312. ALTERNATE_FUNCTIONS(50, 1, 2, UNUSED, 1, 0, 0), /* GPIO50, altA controlled by bit 1 */
  313. ALTERNATE_FUNCTIONS(51, UNUSED, UNUSED, UNUSED, 0, 0, 0), /* no GPIO49, bit 0 reserved */
  314. ALTERNATE_FUNCTIONS(52, 3, UNUSED, UNUSED, 0, 0, 0), /* GPIO52, altA controlled by bit 3 */
  315. ALTERNATE_FUNCTIONS(53, 4, UNUSED, UNUSED, 0, 0, 0), /* GPIO53, altA controlled by bit 4 */
  316. };
  317. /*
  318. * For AB8505 Only some GPIOs are interrupt capable, and they are
  319. * organized in discontiguous clusters:
  320. *
  321. * GPIO10 to GPIO11
  322. * GPIO13
  323. * GPIO40 and GPIO41
  324. * GPIO50
  325. * GPIO52 to GPIO53
  326. */
  327. static struct abx500_gpio_irq_cluster ab8505_gpio_irq_cluster[] = {
  328. GPIO_IRQ_CLUSTER(10, 11, AB8500_INT_GPIO10R),
  329. GPIO_IRQ_CLUSTER(13, 13, AB8500_INT_GPIO13R),
  330. GPIO_IRQ_CLUSTER(40, 41, AB8500_INT_GPIO40R),
  331. GPIO_IRQ_CLUSTER(50, 50, AB9540_INT_GPIO50R),
  332. GPIO_IRQ_CLUSTER(52, 53, AB9540_INT_GPIO52R),
  333. };
  334. static struct abx500_pinctrl_soc_data ab8505_soc = {
  335. .gpio_ranges = ab8505_pinranges,
  336. .gpio_num_ranges = ARRAY_SIZE(ab8505_pinranges),
  337. .pins = ab8505_pins,
  338. .npins = ARRAY_SIZE(ab8505_pins),
  339. .functions = ab8505_functions,
  340. .nfunctions = ARRAY_SIZE(ab8505_functions),
  341. .groups = ab8505_groups,
  342. .ngroups = ARRAY_SIZE(ab8505_groups),
  343. .alternate_functions = ab8505_alternate_functions,
  344. .gpio_irq_cluster = ab8505_gpio_irq_cluster,
  345. .ngpio_irq_cluster = ARRAY_SIZE(ab8505_gpio_irq_cluster),
  346. .irq_gpio_rising_offset = AB8500_INT_GPIO6R,
  347. .irq_gpio_falling_offset = AB8500_INT_GPIO6F,
  348. .irq_gpio_factor = 1,
  349. };
  350. void
  351. abx500_pinctrl_ab8505_init(struct abx500_pinctrl_soc_data **soc)
  352. {
  353. *soc = &ab8505_soc;
  354. }