pinctrl-nomadik-db8500.c 51 KB

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  1. #include <linux/kernel.h>
  2. #include <linux/pinctrl/pinctrl.h>
  3. #include "pinctrl-nomadik.h"
  4. /* All the pins that can be used for GPIO and some other functions */
  5. #define _GPIO(offset) (offset)
  6. #define DB8500_PIN_AJ5 _GPIO(0)
  7. #define DB8500_PIN_AJ3 _GPIO(1)
  8. #define DB8500_PIN_AH4 _GPIO(2)
  9. #define DB8500_PIN_AH3 _GPIO(3)
  10. #define DB8500_PIN_AH6 _GPIO(4)
  11. #define DB8500_PIN_AG6 _GPIO(5)
  12. #define DB8500_PIN_AF6 _GPIO(6)
  13. #define DB8500_PIN_AG5 _GPIO(7)
  14. #define DB8500_PIN_AD5 _GPIO(8)
  15. #define DB8500_PIN_AE4 _GPIO(9)
  16. #define DB8500_PIN_AF5 _GPIO(10)
  17. #define DB8500_PIN_AG4 _GPIO(11)
  18. #define DB8500_PIN_AC4 _GPIO(12)
  19. #define DB8500_PIN_AF3 _GPIO(13)
  20. #define DB8500_PIN_AE3 _GPIO(14)
  21. #define DB8500_PIN_AC3 _GPIO(15)
  22. #define DB8500_PIN_AD3 _GPIO(16)
  23. #define DB8500_PIN_AD4 _GPIO(17)
  24. #define DB8500_PIN_AC2 _GPIO(18)
  25. #define DB8500_PIN_AC1 _GPIO(19)
  26. #define DB8500_PIN_AB4 _GPIO(20)
  27. #define DB8500_PIN_AB3 _GPIO(21)
  28. #define DB8500_PIN_AA3 _GPIO(22)
  29. #define DB8500_PIN_AA4 _GPIO(23)
  30. #define DB8500_PIN_AB2 _GPIO(24)
  31. #define DB8500_PIN_Y4 _GPIO(25)
  32. #define DB8500_PIN_Y2 _GPIO(26)
  33. #define DB8500_PIN_AA2 _GPIO(27)
  34. #define DB8500_PIN_AA1 _GPIO(28)
  35. #define DB8500_PIN_W2 _GPIO(29)
  36. #define DB8500_PIN_W3 _GPIO(30)
  37. #define DB8500_PIN_V3 _GPIO(31)
  38. #define DB8500_PIN_V2 _GPIO(32)
  39. #define DB8500_PIN_AF2 _GPIO(33)
  40. #define DB8500_PIN_AE1 _GPIO(34)
  41. #define DB8500_PIN_AE2 _GPIO(35)
  42. #define DB8500_PIN_AG2 _GPIO(36)
  43. /* Hole */
  44. #define DB8500_PIN_F3 _GPIO(64)
  45. #define DB8500_PIN_F1 _GPIO(65)
  46. #define DB8500_PIN_G3 _GPIO(66)
  47. #define DB8500_PIN_G2 _GPIO(67)
  48. #define DB8500_PIN_E1 _GPIO(68)
  49. #define DB8500_PIN_E2 _GPIO(69)
  50. #define DB8500_PIN_G5 _GPIO(70)
  51. #define DB8500_PIN_G4 _GPIO(71)
  52. #define DB8500_PIN_H4 _GPIO(72)
  53. #define DB8500_PIN_H3 _GPIO(73)
  54. #define DB8500_PIN_J3 _GPIO(74)
  55. #define DB8500_PIN_H2 _GPIO(75)
  56. #define DB8500_PIN_J2 _GPIO(76)
  57. #define DB8500_PIN_H1 _GPIO(77)
  58. #define DB8500_PIN_F4 _GPIO(78)
  59. #define DB8500_PIN_E3 _GPIO(79)
  60. #define DB8500_PIN_E4 _GPIO(80)
  61. #define DB8500_PIN_D2 _GPIO(81)
  62. #define DB8500_PIN_C1 _GPIO(82)
  63. #define DB8500_PIN_D3 _GPIO(83)
  64. #define DB8500_PIN_C2 _GPIO(84)
  65. #define DB8500_PIN_D5 _GPIO(85)
  66. #define DB8500_PIN_C6 _GPIO(86)
  67. #define DB8500_PIN_B3 _GPIO(87)
  68. #define DB8500_PIN_C4 _GPIO(88)
  69. #define DB8500_PIN_E6 _GPIO(89)
  70. #define DB8500_PIN_A3 _GPIO(90)
  71. #define DB8500_PIN_B6 _GPIO(91)
  72. #define DB8500_PIN_D6 _GPIO(92)
  73. #define DB8500_PIN_B7 _GPIO(93)
  74. #define DB8500_PIN_D7 _GPIO(94)
  75. #define DB8500_PIN_E8 _GPIO(95)
  76. #define DB8500_PIN_D8 _GPIO(96)
  77. #define DB8500_PIN_D9 _GPIO(97)
  78. /* Hole */
  79. #define DB8500_PIN_A5 _GPIO(128)
  80. #define DB8500_PIN_B4 _GPIO(129)
  81. #define DB8500_PIN_C8 _GPIO(130)
  82. #define DB8500_PIN_A12 _GPIO(131)
  83. #define DB8500_PIN_C10 _GPIO(132)
  84. #define DB8500_PIN_B10 _GPIO(133)
  85. #define DB8500_PIN_B9 _GPIO(134)
  86. #define DB8500_PIN_A9 _GPIO(135)
  87. #define DB8500_PIN_C7 _GPIO(136)
  88. #define DB8500_PIN_A7 _GPIO(137)
  89. #define DB8500_PIN_C5 _GPIO(138)
  90. #define DB8500_PIN_C9 _GPIO(139)
  91. #define DB8500_PIN_B11 _GPIO(140)
  92. #define DB8500_PIN_C12 _GPIO(141)
  93. #define DB8500_PIN_C11 _GPIO(142)
  94. #define DB8500_PIN_D12 _GPIO(143)
  95. #define DB8500_PIN_B13 _GPIO(144)
  96. #define DB8500_PIN_C13 _GPIO(145)
  97. #define DB8500_PIN_D13 _GPIO(146)
  98. #define DB8500_PIN_C15 _GPIO(147)
  99. #define DB8500_PIN_B16 _GPIO(148)
  100. #define DB8500_PIN_B14 _GPIO(149)
  101. #define DB8500_PIN_C14 _GPIO(150)
  102. #define DB8500_PIN_D17 _GPIO(151)
  103. #define DB8500_PIN_D16 _GPIO(152)
  104. #define DB8500_PIN_B17 _GPIO(153)
  105. #define DB8500_PIN_C16 _GPIO(154)
  106. #define DB8500_PIN_C19 _GPIO(155)
  107. #define DB8500_PIN_C17 _GPIO(156)
  108. #define DB8500_PIN_A18 _GPIO(157)
  109. #define DB8500_PIN_C18 _GPIO(158)
  110. #define DB8500_PIN_B19 _GPIO(159)
  111. #define DB8500_PIN_B20 _GPIO(160)
  112. #define DB8500_PIN_D21 _GPIO(161)
  113. #define DB8500_PIN_D20 _GPIO(162)
  114. #define DB8500_PIN_C20 _GPIO(163)
  115. #define DB8500_PIN_B21 _GPIO(164)
  116. #define DB8500_PIN_C21 _GPIO(165)
  117. #define DB8500_PIN_A22 _GPIO(166)
  118. #define DB8500_PIN_B24 _GPIO(167)
  119. #define DB8500_PIN_C22 _GPIO(168)
  120. #define DB8500_PIN_D22 _GPIO(169)
  121. #define DB8500_PIN_C23 _GPIO(170)
  122. #define DB8500_PIN_D23 _GPIO(171)
  123. /* Hole */
  124. #define DB8500_PIN_AJ27 _GPIO(192)
  125. #define DB8500_PIN_AH27 _GPIO(193)
  126. #define DB8500_PIN_AF27 _GPIO(194)
  127. #define DB8500_PIN_AG28 _GPIO(195)
  128. #define DB8500_PIN_AG26 _GPIO(196)
  129. #define DB8500_PIN_AH24 _GPIO(197)
  130. #define DB8500_PIN_AG25 _GPIO(198)
  131. #define DB8500_PIN_AH23 _GPIO(199)
  132. #define DB8500_PIN_AH26 _GPIO(200)
  133. #define DB8500_PIN_AF24 _GPIO(201)
  134. #define DB8500_PIN_AF25 _GPIO(202)
  135. #define DB8500_PIN_AE23 _GPIO(203)
  136. #define DB8500_PIN_AF23 _GPIO(204)
  137. #define DB8500_PIN_AG23 _GPIO(205)
  138. #define DB8500_PIN_AG24 _GPIO(206)
  139. #define DB8500_PIN_AJ23 _GPIO(207)
  140. #define DB8500_PIN_AH16 _GPIO(208)
  141. #define DB8500_PIN_AG15 _GPIO(209)
  142. #define DB8500_PIN_AJ15 _GPIO(210)
  143. #define DB8500_PIN_AG14 _GPIO(211)
  144. #define DB8500_PIN_AF13 _GPIO(212)
  145. #define DB8500_PIN_AG13 _GPIO(213)
  146. #define DB8500_PIN_AH15 _GPIO(214)
  147. #define DB8500_PIN_AH13 _GPIO(215)
  148. #define DB8500_PIN_AG12 _GPIO(216)
  149. #define DB8500_PIN_AH12 _GPIO(217)
  150. #define DB8500_PIN_AH11 _GPIO(218)
  151. #define DB8500_PIN_AG10 _GPIO(219)
  152. #define DB8500_PIN_AH10 _GPIO(220)
  153. #define DB8500_PIN_AJ11 _GPIO(221)
  154. #define DB8500_PIN_AJ9 _GPIO(222)
  155. #define DB8500_PIN_AH9 _GPIO(223)
  156. #define DB8500_PIN_AG9 _GPIO(224)
  157. #define DB8500_PIN_AG8 _GPIO(225)
  158. #define DB8500_PIN_AF8 _GPIO(226)
  159. #define DB8500_PIN_AH7 _GPIO(227)
  160. #define DB8500_PIN_AJ6 _GPIO(228)
  161. #define DB8500_PIN_AG7 _GPIO(229)
  162. #define DB8500_PIN_AF7 _GPIO(230)
  163. /* Hole */
  164. #define DB8500_PIN_AF28 _GPIO(256)
  165. #define DB8500_PIN_AE29 _GPIO(257)
  166. #define DB8500_PIN_AD29 _GPIO(258)
  167. #define DB8500_PIN_AC29 _GPIO(259)
  168. #define DB8500_PIN_AD28 _GPIO(260)
  169. #define DB8500_PIN_AD26 _GPIO(261)
  170. #define DB8500_PIN_AE26 _GPIO(262)
  171. #define DB8500_PIN_AG29 _GPIO(263)
  172. #define DB8500_PIN_AE27 _GPIO(264)
  173. #define DB8500_PIN_AD27 _GPIO(265)
  174. #define DB8500_PIN_AC28 _GPIO(266)
  175. #define DB8500_PIN_AC27 _GPIO(267)
  176. /*
  177. * The names of the pins are denoted by GPIO number and ball name, even
  178. * though they can be used for other things than GPIO, this is the first
  179. * column in the table of the data sheet and often used on schematics and
  180. * such.
  181. */
  182. static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
  183. PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
  184. PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
  185. PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
  186. PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
  187. PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
  188. PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
  189. PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
  190. PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
  191. PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
  192. PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
  193. PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
  194. PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
  195. PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
  196. PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
  197. PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
  198. PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
  199. PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
  200. PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
  201. PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
  202. PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
  203. PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
  204. PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
  205. PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
  206. PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
  207. PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
  208. PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
  209. PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
  210. PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
  211. PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
  212. PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
  213. PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
  214. PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
  215. PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
  216. PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
  217. PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
  218. PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
  219. PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
  220. /* Hole */
  221. PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
  222. PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
  223. PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
  224. PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
  225. PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
  226. PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
  227. PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
  228. PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
  229. PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
  230. PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
  231. PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
  232. PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
  233. PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
  234. PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
  235. PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
  236. PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
  237. PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
  238. PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
  239. PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
  240. PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
  241. PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
  242. PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
  243. PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
  244. PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
  245. PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
  246. PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
  247. PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
  248. PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
  249. PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
  250. PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
  251. PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
  252. PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
  253. PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
  254. PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
  255. /* Hole */
  256. PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
  257. PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
  258. PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
  259. PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
  260. PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
  261. PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
  262. PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
  263. PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
  264. PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
  265. PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
  266. PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
  267. PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
  268. PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
  269. PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
  270. PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
  271. PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
  272. PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
  273. PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
  274. PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
  275. PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
  276. PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
  277. PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
  278. PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
  279. PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
  280. PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
  281. PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
  282. PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
  283. PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
  284. PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
  285. PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
  286. PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
  287. PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
  288. PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
  289. PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
  290. PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
  291. PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
  292. PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
  293. PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
  294. PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
  295. PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
  296. PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
  297. PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
  298. PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
  299. PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
  300. /* Hole */
  301. PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
  302. PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
  303. PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
  304. PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
  305. PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
  306. PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
  307. PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
  308. PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
  309. PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
  310. PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
  311. PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
  312. PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
  313. PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
  314. PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
  315. PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
  316. PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
  317. PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
  318. PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
  319. PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
  320. PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
  321. PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
  322. PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
  323. PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
  324. PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
  325. PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
  326. PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
  327. PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
  328. PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
  329. PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
  330. PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
  331. PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
  332. PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
  333. PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
  334. PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
  335. PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
  336. PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
  337. PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
  338. PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
  339. PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
  340. /* Hole */
  341. PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
  342. PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
  343. PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
  344. PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
  345. PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
  346. PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
  347. PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
  348. PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
  349. PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
  350. PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
  351. PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
  352. PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
  353. };
  354. /*
  355. * Read the pin group names like this:
  356. * u0_a_1 = first groups of pins for uart0 on alt function a
  357. * i2c2_b_2 = second group of pins for i2c2 on alt function b
  358. *
  359. * The groups are arranged as sets per altfunction column, so we can
  360. * mux in one group at a time by selecting the same altfunction for them
  361. * all. When functions require pins on different altfunctions, you need
  362. * to combine several groups.
  363. */
  364. /* Altfunction A column */
  365. static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
  366. DB8500_PIN_AH4, DB8500_PIN_AH3 };
  367. static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
  368. static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
  369. /* Image processor I2C line, this is driven by image processor firmware */
  370. static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
  371. static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
  372. /* MSP0 can only be on these pins, but TXD and RXD can be flipped */
  373. static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
  374. static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
  375. static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
  376. /* Basic pins of the MMC/SD card 0 interface */
  377. static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
  378. DB8500_PIN_AB4, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
  379. DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
  380. /* Often only 4 bits are used, then these are not needed (only used for MMC) */
  381. static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
  382. DB8500_PIN_V3, DB8500_PIN_V2};
  383. static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 };
  384. /* MSP1 can only be on these pins, but TXD and RXD can be flipped */
  385. static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
  386. static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
  387. /* LCD interface */
  388. static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
  389. DB8500_PIN_G3, DB8500_PIN_G2 };
  390. static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
  391. static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
  392. static const unsigned lcd_d0_d7_a_1_pins[] = {
  393. DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
  394. DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
  395. /* D8 thru D11 often used as TVOUT lines */
  396. static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
  397. DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
  398. static const unsigned lcd_d12_d23_a_1_pins[] = {
  399. DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
  400. DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
  401. DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
  402. static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
  403. DB8500_PIN_D8, DB8500_PIN_D9 };
  404. static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
  405. static const unsigned kp_a_2_pins[] = {
  406. DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
  407. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
  408. DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
  409. DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
  410. /* MC2 has 8 data lines and no direction control, so only for (e)MMC */
  411. static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
  412. DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
  413. DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
  414. DB8500_PIN_C5 };
  415. static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
  416. DB8500_PIN_C12, DB8500_PIN_C11 };
  417. static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
  418. DB8500_PIN_C13, DB8500_PIN_D13 };
  419. static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
  420. /*
  421. * Image processor GPIO pins are named "ipgpio" and have their own
  422. * numberspace
  423. */
  424. static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
  425. static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
  426. /* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
  427. static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
  428. DB8500_PIN_D23 };
  429. /*
  430. * This MSP cannot switch RX and TX, SCK in a separate group since this
  431. * seems to be optional.
  432. */
  433. static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
  434. static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
  435. DB8500_PIN_AG28, DB8500_PIN_AG26 };
  436. static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
  437. DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
  438. DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
  439. DB8500_PIN_AJ23 };
  440. /* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
  441. static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
  442. DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
  443. DB8500_PIN_AH15 };
  444. static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
  445. DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 };
  446. static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
  447. DB8500_PIN_AH12, DB8500_PIN_AH11 };
  448. static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
  449. DB8500_PIN_AJ11 };
  450. static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
  451. DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
  452. static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
  453. DB8500_PIN_AG9, DB8500_PIN_AG8 };
  454. static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };
  455. static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };
  456. static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };
  457. static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };
  458. static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
  459. DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
  460. DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
  461. DB8500_PIN_AC28, DB8500_PIN_AC27 };
  462. /* Altfunction B column */
  463. static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
  464. static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
  465. static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
  466. static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
  467. static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
  468. static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
  469. static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
  470. /* Just RX and TX for UART2 */
  471. static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
  472. static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
  473. static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
  474. static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
  475. static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
  476. DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
  477. static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
  478. static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
  479. DB8500_PIN_V3, DB8500_PIN_V2 };
  480. static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
  481. static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
  482. DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
  483. DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
  484. DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
  485. DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
  486. DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
  487. static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
  488. DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
  489. static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
  490. DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
  491. DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
  492. DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
  493. DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
  494. DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
  495. DB8500_PIN_C9 };
  496. /* This chip select pin can be "ps0" in alt C so have it separately */
  497. static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
  498. /* This chip select pin can be "ps1" in alt C so have it separately */
  499. static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
  500. static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
  501. static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
  502. static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
  503. static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
  504. static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
  505. DB8500_PIN_C23, DB8500_PIN_D23 };
  506. static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
  507. DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
  508. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
  509. DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
  510. DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
  511. static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
  512. static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
  513. static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
  514. DB8500_PIN_AG13, DB8500_PIN_AH15 };
  515. static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
  516. DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
  517. DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
  518. DB8500_PIN_AG8 };
  519. static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
  520. static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
  521. static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
  522. /* Altfunction C column */
  523. static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
  524. DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
  525. static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
  526. static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
  527. static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
  528. static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
  529. static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
  530. static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
  531. /* Optional 4-bit Memory Stick interface */
  532. static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
  533. DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
  534. DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
  535. static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
  536. static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
  537. static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
  538. static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
  539. DB8500_PIN_AE2, DB8500_PIN_AG2 };
  540. static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
  541. static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
  542. static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
  543. static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
  544. static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
  545. static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
  546. DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
  547. static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
  548. static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
  549. static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
  550. static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
  551. static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
  552. static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
  553. DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
  554. DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
  555. DB8500_PIN_D9 };
  556. static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
  557. static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
  558. DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
  559. DB8500_PIN_C23, DB8500_PIN_D23 };
  560. static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
  561. static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
  562. static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
  563. static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
  564. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
  565. static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
  566. static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
  567. static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
  568. DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
  569. static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
  570. static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
  571. static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };
  572. static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };
  573. static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
  574. static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
  575. DB8500_PIN_AG9, DB8500_PIN_AG8 };
  576. static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
  577. static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
  578. /* Other C1 column */
  579. static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };
  580. static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
  581. DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
  582. static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };
  583. static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };
  584. static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
  585. DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
  586. DB8500_PIN_J2, DB8500_PIN_H1 };
  587. static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
  588. DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
  589. DB8500_PIN_D6, DB8500_PIN_B7 };
  590. static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };
  591. static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };
  592. static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };
  593. static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };
  594. static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
  595. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
  596. static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,
  597. DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22,
  598. DB8500_PIN_B24, DB8500_PIN_C22 };
  599. static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };
  600. static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
  601. DB8500_PIN_AH12, DB8500_PIN_AH11 };
  602. static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
  603. DB8500_PIN_AH11 };
  604. /* Other C2 column */
  605. static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,
  606. DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
  607. static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
  608. DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
  609. DB8500_PIN_J2, DB8500_PIN_H1 };
  610. static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
  611. DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
  612. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
  613. DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
  614. DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
  615. /* Other C3 column */
  616. static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,
  617. DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 };
  618. static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
  619. DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
  620. static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };
  621. static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };
  622. static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
  623. DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
  624. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
  625. DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
  626. DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
  627. /* Other C4 column */
  628. static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
  629. DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 };
  630. static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
  631. DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
  632. DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
  633. DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
  634. DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
  635. #define DB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
  636. .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
  637. static const struct nmk_pingroup nmk_db8500_groups[] = {
  638. /* Altfunction A column */
  639. DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
  640. DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
  641. DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
  642. DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
  643. DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
  644. DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
  645. DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
  646. DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
  647. DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
  648. DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
  649. DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
  650. DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
  651. DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
  652. DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
  653. DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
  654. DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
  655. DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
  656. DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
  657. DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
  658. DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
  659. DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
  660. DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
  661. DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
  662. DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
  663. DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
  664. DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
  665. DB8500_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A),
  666. DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
  667. DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
  668. DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
  669. DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
  670. DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
  671. DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
  672. DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
  673. DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
  674. DB8500_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A),
  675. DB8500_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A),
  676. DB8500_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A),
  677. DB8500_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A),
  678. DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
  679. /* Altfunction B column */
  680. DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
  681. DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
  682. DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
  683. DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
  684. DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
  685. DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
  686. DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
  687. DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
  688. DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
  689. DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
  690. DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
  691. DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
  692. DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
  693. DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
  694. DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
  695. DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
  696. DB8500_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
  697. DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
  698. DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
  699. DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
  700. DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
  701. DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
  702. DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
  703. DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
  704. DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
  705. DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
  706. DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
  707. DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
  708. DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
  709. DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
  710. DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
  711. DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
  712. DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
  713. /* Altfunction C column */
  714. DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
  715. DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
  716. DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
  717. DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
  718. DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
  719. DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
  720. DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
  721. DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
  722. DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
  723. DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
  724. DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
  725. DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
  726. DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
  727. DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
  728. DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
  729. DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
  730. DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
  731. DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
  732. DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
  733. DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
  734. DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
  735. DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
  736. DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
  737. DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
  738. DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
  739. DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
  740. DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
  741. DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
  742. DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
  743. DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
  744. DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
  745. DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
  746. DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
  747. DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
  748. DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
  749. DB8500_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C),
  750. DB8500_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C),
  751. DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
  752. DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
  753. DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
  754. DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
  755. /* Other alt C1 column */
  756. DB8500_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1),
  757. DB8500_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1),
  758. DB8500_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1),
  759. DB8500_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1),
  760. DB8500_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1),
  761. DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
  762. DB8500_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1),
  763. DB8500_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1),
  764. DB8500_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1),
  765. DB8500_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1),
  766. DB8500_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1),
  767. DB8500_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1),
  768. DB8500_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1),
  769. DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
  770. DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
  771. /* Other alt C2 column */
  772. DB8500_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2),
  773. DB8500_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2),
  774. DB8500_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2),
  775. /* Other alt C3 column */
  776. DB8500_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3),
  777. DB8500_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3),
  778. DB8500_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3),
  779. DB8500_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3),
  780. DB8500_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3),
  781. /* Other alt C4 column */
  782. DB8500_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4),
  783. DB8500_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4),
  784. };
  785. /* We use this macro to define the groups applicable to a function */
  786. #define DB8500_FUNC_GROUPS(a, b...) \
  787. static const char * const a##_groups[] = { b };
  788. DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
  789. DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
  790. /*
  791. * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
  792. * only available on two pins in alternative function C
  793. */
  794. DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
  795. "u2rxtx_c_2", "u2rxtx_c_3", "u2rx_oc1_1");
  796. DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
  797. /*
  798. * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
  799. * switched around by selecting the altfunction A or B. The SCK pin is
  800. * only available on the altfunction B.
  801. */
  802. DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
  803. "msp0txrx_b_1", "msp0sck_b_1");
  804. DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_dat47_a_1", "mc0dat31dir_a_1");
  805. /* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
  806. DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
  807. DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
  808. DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
  809. "lcd_d8_d11_a_1", "lcd_d12_d23_a_1", "lcd_b_1");
  810. DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_a_2", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
  811. DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");
  812. DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
  813. DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
  814. DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
  815. /* The image processor has 8 GPIO pins that can be muxed out */
  816. DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
  817. "ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
  818. "ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
  819. "ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
  820. "ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
  821. /* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
  822. DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
  823. DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
  824. DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
  825. DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
  826. DB8500_FUNC_GROUPS(clkout, "clkout1_a_1", "clkout1_a_2", "clkout1_c_1",
  827. "clkout2_a_1", "clkout2_a_2", "clkout2_c_1");
  828. DB8500_FUNC_GROUPS(usb, "usb_a_1");
  829. DB8500_FUNC_GROUPS(trig, "trig_b_1");
  830. DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
  831. DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
  832. DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
  833. /*
  834. * The modem UART can output its RX and TX pins in some different places,
  835. * so select one of each.
  836. */
  837. DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
  838. "uartmodrx_c_1", "uartmod_tx_c_1", "uartmodrx_oc1_1",
  839. "uartmodtx_oc1_1", "uartmodrx_oc3_1", "uartmodtx_oc3_1");
  840. DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1", "stmmod_oc1_1",
  841. "stmmod_oc3_1", "stmmod_oc3_2");
  842. DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
  843. /* Select between CS0 on alt B or PS1 on alt C */
  844. DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
  845. "smps0_c_1", "smps1_c_1");
  846. DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
  847. DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
  848. DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
  849. DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
  850. DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
  851. DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
  852. DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
  853. DB8500_FUNC_GROUPS(ms, "ms_c_1");
  854. DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
  855. DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2", "stmape_oc1_1");
  856. DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
  857. DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
  858. DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
  859. DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
  860. DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
  861. DB8500_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
  862. DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
  863. DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1", "ptma9_oc2_1");
  864. DB8500_FUNC_GROUPS(rf, "rf_oc1_1", "rf_oc1_2");
  865. DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1", "hxgpio_oc1_1");
  866. DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1", "etmr4_oc3_1");
  867. DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
  868. #define FUNCTION(fname) \
  869. { \
  870. .name = #fname, \
  871. .groups = fname##_groups, \
  872. .ngroups = ARRAY_SIZE(fname##_groups), \
  873. }
  874. static const struct nmk_function nmk_db8500_functions[] = {
  875. FUNCTION(u0),
  876. FUNCTION(u1),
  877. FUNCTION(u2),
  878. FUNCTION(ipi2c),
  879. FUNCTION(msp0),
  880. FUNCTION(mc0),
  881. FUNCTION(msp1),
  882. FUNCTION(lcdb),
  883. FUNCTION(lcd),
  884. FUNCTION(kp),
  885. FUNCTION(mc2),
  886. FUNCTION(ssp1),
  887. FUNCTION(ssp0),
  888. FUNCTION(i2c0),
  889. FUNCTION(ipgpio),
  890. FUNCTION(msp2),
  891. FUNCTION(mc4),
  892. FUNCTION(mc1),
  893. FUNCTION(hsi),
  894. FUNCTION(clkout),
  895. FUNCTION(usb),
  896. FUNCTION(trig),
  897. FUNCTION(i2c4),
  898. FUNCTION(i2c1),
  899. FUNCTION(i2c2),
  900. FUNCTION(uartmod),
  901. FUNCTION(stmmod),
  902. FUNCTION(spi3),
  903. FUNCTION(sm),
  904. FUNCTION(lcda),
  905. FUNCTION(ddrtrig),
  906. FUNCTION(pwl),
  907. FUNCTION(spi1),
  908. FUNCTION(mc3),
  909. FUNCTION(ipjtag),
  910. FUNCTION(slim0),
  911. FUNCTION(ms),
  912. FUNCTION(iptrigout),
  913. FUNCTION(stmape),
  914. FUNCTION(mc5),
  915. FUNCTION(usbsim),
  916. FUNCTION(i2c3),
  917. FUNCTION(spi0),
  918. FUNCTION(spi2),
  919. FUNCTION(remap),
  920. FUNCTION(ptm),
  921. FUNCTION(rf),
  922. FUNCTION(hx),
  923. FUNCTION(etm),
  924. FUNCTION(hwobs),
  925. };
  926. static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
  927. PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */
  928. true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */
  929. false, 0, 0,
  930. false, 0, 0
  931. ),
  932. PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */
  933. true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */
  934. true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
  935. false, 0, 0
  936. ),
  937. PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */
  938. true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */
  939. false, 0, 0,
  940. false, 0, 0
  941. ),
  942. PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */
  943. true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */
  944. false, 0, 0,
  945. false, 0, 0
  946. ),
  947. PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */
  948. true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */
  949. false, 0, 0,
  950. false, 0, 0
  951. ),
  952. PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */
  953. true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */
  954. false, 0, 0,
  955. false, 0, 0
  956. ),
  957. PRCM_GPIOCR_ALTCX(29, false, 0, 0,
  958. false, 0, 0,
  959. true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
  960. false, 0, 0
  961. ),
  962. PRCM_GPIOCR_ALTCX(30, false, 0, 0,
  963. false, 0, 0,
  964. true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
  965. false, 0, 0
  966. ),
  967. PRCM_GPIOCR_ALTCX(31, false, 0, 0,
  968. false, 0, 0,
  969. true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
  970. false, 0, 0
  971. ),
  972. PRCM_GPIOCR_ALTCX(32, false, 0, 0,
  973. false, 0, 0,
  974. true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
  975. false, 0, 0
  976. ),
  977. PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
  978. false, 0, 0,
  979. false, 0, 0,
  980. false, 0, 0
  981. ),
  982. PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
  983. false, 0, 0,
  984. false, 0, 0,
  985. false, 0, 0
  986. ),
  987. PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */
  988. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  989. true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
  990. true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */
  991. ),
  992. PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */
  993. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  994. true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
  995. true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */
  996. ),
  997. PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */
  998. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  999. true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
  1000. true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */
  1001. ),
  1002. PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */
  1003. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  1004. true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
  1005. true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */
  1006. ),
  1007. PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */
  1008. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  1009. true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
  1010. true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */
  1011. ),
  1012. PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */
  1013. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  1014. true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
  1015. false, 0, 0
  1016. ),
  1017. PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */
  1018. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  1019. true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
  1020. false, 0, 0
  1021. ),
  1022. PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */
  1023. true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
  1024. false, 0, 0,
  1025. true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */
  1026. ),
  1027. PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */
  1028. false, 0, 0,
  1029. false, 0, 0,
  1030. false, 0, 0
  1031. ),
  1032. PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */
  1033. false, 0, 0,
  1034. false, 0, 0,
  1035. false, 0, 0
  1036. ),
  1037. PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */
  1038. false, 0, 0,
  1039. false, 0, 0,
  1040. false, 0, 0
  1041. ),
  1042. PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */
  1043. false, 0, 0,
  1044. false, 0, 0,
  1045. false, 0, 0
  1046. ),
  1047. PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */
  1048. false, 0, 0,
  1049. false, 0, 0,
  1050. false, 0, 0
  1051. ),
  1052. PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */
  1053. false, 0, 0,
  1054. false, 0, 0,
  1055. false, 0, 0
  1056. ),
  1057. PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */
  1058. false, 0, 0,
  1059. false, 0, 0,
  1060. false, 0, 0
  1061. ),
  1062. PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */
  1063. false, 0, 0,
  1064. false, 0, 0,
  1065. false, 0, 0
  1066. ),
  1067. PRCM_GPIOCR_ALTCX(96, true, PRCM_IDX_GPIOCR2, 3, /* RF_INT */
  1068. false, 0, 0,
  1069. false, 0, 0,
  1070. false, 0, 0
  1071. ),
  1072. PRCM_GPIOCR_ALTCX(97, true, PRCM_IDX_GPIOCR2, 1, /* RF_CTRL */
  1073. false, 0, 0,
  1074. false, 0, 0,
  1075. false, 0, 0
  1076. ),
  1077. PRCM_GPIOCR_ALTCX(151, false, 0, 0,
  1078. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */
  1079. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1080. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */
  1081. ),
  1082. PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */
  1083. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */
  1084. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1085. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */
  1086. ),
  1087. PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
  1088. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */
  1089. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1090. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */
  1091. ),
  1092. PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
  1093. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */
  1094. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1095. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */
  1096. ),
  1097. PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
  1098. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */
  1099. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1100. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */
  1101. ),
  1102. PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
  1103. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */
  1104. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1105. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */
  1106. ),
  1107. PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
  1108. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */
  1109. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1110. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */
  1111. ),
  1112. PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
  1113. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */
  1114. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1115. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */
  1116. ),
  1117. PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
  1118. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */
  1119. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1120. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */
  1121. ),
  1122. PRCM_GPIOCR_ALTCX(160, false, 0, 0,
  1123. true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */
  1124. true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
  1125. true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */
  1126. ),
  1127. PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */
  1128. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */
  1129. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1130. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */
  1131. ),
  1132. PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */
  1133. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */
  1134. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1135. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */
  1136. ),
  1137. PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */
  1138. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */
  1139. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1140. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */
  1141. ),
  1142. PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */
  1143. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */
  1144. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1145. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */
  1146. ),
  1147. PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */
  1148. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */
  1149. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1150. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */
  1151. ),
  1152. PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */
  1153. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */
  1154. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1155. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */
  1156. ),
  1157. PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */
  1158. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */
  1159. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1160. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */
  1161. ),
  1162. PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */
  1163. true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */
  1164. true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
  1165. true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */
  1166. ),
  1167. PRCM_GPIOCR_ALTCX(170, true, PRCM_IDX_GPIOCR2, 2, /* RF_INT */
  1168. false, 0, 0,
  1169. false, 0, 0,
  1170. false, 0, 0
  1171. ),
  1172. PRCM_GPIOCR_ALTCX(171, true, PRCM_IDX_GPIOCR2, 0, /* RF_CTRL */
  1173. false, 0, 0,
  1174. false, 0, 0,
  1175. false, 0, 0
  1176. ),
  1177. PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */
  1178. false, 0, 0,
  1179. false, 0, 0,
  1180. false, 0, 0
  1181. ),
  1182. PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */
  1183. false, 0, 0,
  1184. false, 0, 0,
  1185. false, 0, 0
  1186. ),
  1187. PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */
  1188. false, 0, 0,
  1189. false, 0, 0,
  1190. false, 0, 0
  1191. ),
  1192. PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */
  1193. false, 0, 0,
  1194. false, 0, 0,
  1195. false, 0, 0
  1196. ),
  1197. };
  1198. static const u16 db8500_prcm_gpiocr_regs[] = {
  1199. [PRCM_IDX_GPIOCR1] = 0x138,
  1200. [PRCM_IDX_GPIOCR2] = 0x574,
  1201. };
  1202. static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
  1203. .pins = nmk_db8500_pins,
  1204. .npins = ARRAY_SIZE(nmk_db8500_pins),
  1205. .functions = nmk_db8500_functions,
  1206. .nfunctions = ARRAY_SIZE(nmk_db8500_functions),
  1207. .groups = nmk_db8500_groups,
  1208. .ngroups = ARRAY_SIZE(nmk_db8500_groups),
  1209. .altcx_pins = db8500_altcx_pins,
  1210. .npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
  1211. .prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
  1212. };
  1213. void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
  1214. {
  1215. *soc = &nmk_db8500_soc;
  1216. }