rtc-ds1302.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255
  1. /*
  2. * Dallas DS1302 RTC Support
  3. *
  4. * Copyright (C) 2002 David McCullough
  5. * Copyright (C) 2003 - 2007 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License version 2. See the file "COPYING" in the main directory of
  9. * this archive for more details.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/rtc.h>
  16. #include <linux/io.h>
  17. #include <linux/bcd.h>
  18. #define DRV_NAME "rtc-ds1302"
  19. #define DRV_VERSION "0.1.1"
  20. #define RTC_CMD_READ 0x81 /* Read command */
  21. #define RTC_CMD_WRITE 0x80 /* Write command */
  22. #define RTC_CMD_WRITE_ENABLE 0x00 /* Write enable */
  23. #define RTC_CMD_WRITE_DISABLE 0x80 /* Write disable */
  24. #define RTC_ADDR_RAM0 0x20 /* Address of RAM0 */
  25. #define RTC_ADDR_TCR 0x08 /* Address of trickle charge register */
  26. #define RTC_ADDR_CTRL 0x07 /* Address of control register */
  27. #define RTC_ADDR_YEAR 0x06 /* Address of year register */
  28. #define RTC_ADDR_DAY 0x05 /* Address of day of week register */
  29. #define RTC_ADDR_MON 0x04 /* Address of month register */
  30. #define RTC_ADDR_DATE 0x03 /* Address of day of month register */
  31. #define RTC_ADDR_HOUR 0x02 /* Address of hour register */
  32. #define RTC_ADDR_MIN 0x01 /* Address of minute register */
  33. #define RTC_ADDR_SEC 0x00 /* Address of second register */
  34. #ifdef CONFIG_SH_SECUREEDGE5410
  35. #include <asm/rtc.h>
  36. #include <mach/secureedge5410.h>
  37. #define RTC_RESET 0x1000
  38. #define RTC_IODATA 0x0800
  39. #define RTC_SCLK 0x0400
  40. #define set_dp(x) SECUREEDGE_WRITE_IOPORT(x, 0x1c00)
  41. #define get_dp() SECUREEDGE_READ_IOPORT()
  42. #define ds1302_set_tx()
  43. #define ds1302_set_rx()
  44. static inline int ds1302_hw_init(void)
  45. {
  46. return 0;
  47. }
  48. static inline void ds1302_reset(void)
  49. {
  50. set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
  51. }
  52. static inline void ds1302_clock(void)
  53. {
  54. set_dp(get_dp() | RTC_SCLK); /* clock high */
  55. set_dp(get_dp() & ~RTC_SCLK); /* clock low */
  56. }
  57. static inline void ds1302_start(void)
  58. {
  59. set_dp(get_dp() | RTC_RESET);
  60. }
  61. static inline void ds1302_stop(void)
  62. {
  63. set_dp(get_dp() & ~RTC_RESET);
  64. }
  65. static inline void ds1302_txbit(int bit)
  66. {
  67. set_dp((get_dp() & ~RTC_IODATA) | (bit ? RTC_IODATA : 0));
  68. }
  69. static inline int ds1302_rxbit(void)
  70. {
  71. return !!(get_dp() & RTC_IODATA);
  72. }
  73. #else
  74. #error "Add support for your platform"
  75. #endif
  76. static void ds1302_sendbits(unsigned int val)
  77. {
  78. int i;
  79. ds1302_set_tx();
  80. for (i = 8; (i); i--, val >>= 1) {
  81. ds1302_txbit(val & 0x1);
  82. ds1302_clock();
  83. }
  84. }
  85. static unsigned int ds1302_recvbits(void)
  86. {
  87. unsigned int val;
  88. int i;
  89. ds1302_set_rx();
  90. for (i = 0, val = 0; (i < 8); i++) {
  91. val |= (ds1302_rxbit() << i);
  92. ds1302_clock();
  93. }
  94. return val;
  95. }
  96. static unsigned int ds1302_readbyte(unsigned int addr)
  97. {
  98. unsigned int val;
  99. ds1302_reset();
  100. ds1302_start();
  101. ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_READ);
  102. val = ds1302_recvbits();
  103. ds1302_stop();
  104. return val;
  105. }
  106. static void ds1302_writebyte(unsigned int addr, unsigned int val)
  107. {
  108. ds1302_reset();
  109. ds1302_start();
  110. ds1302_sendbits(((addr & 0x3f) << 1) | RTC_CMD_WRITE);
  111. ds1302_sendbits(val);
  112. ds1302_stop();
  113. }
  114. static int ds1302_rtc_read_time(struct device *dev, struct rtc_time *tm)
  115. {
  116. tm->tm_sec = bcd2bin(ds1302_readbyte(RTC_ADDR_SEC));
  117. tm->tm_min = bcd2bin(ds1302_readbyte(RTC_ADDR_MIN));
  118. tm->tm_hour = bcd2bin(ds1302_readbyte(RTC_ADDR_HOUR));
  119. tm->tm_wday = bcd2bin(ds1302_readbyte(RTC_ADDR_DAY));
  120. tm->tm_mday = bcd2bin(ds1302_readbyte(RTC_ADDR_DATE));
  121. tm->tm_mon = bcd2bin(ds1302_readbyte(RTC_ADDR_MON)) - 1;
  122. tm->tm_year = bcd2bin(ds1302_readbyte(RTC_ADDR_YEAR));
  123. if (tm->tm_year < 70)
  124. tm->tm_year += 100;
  125. dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  126. "mday=%d, mon=%d, year=%d, wday=%d\n",
  127. __func__,
  128. tm->tm_sec, tm->tm_min, tm->tm_hour,
  129. tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday);
  130. return rtc_valid_tm(tm);
  131. }
  132. static int ds1302_rtc_set_time(struct device *dev, struct rtc_time *tm)
  133. {
  134. ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_ENABLE);
  135. /* Stop RTC */
  136. ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
  137. ds1302_writebyte(RTC_ADDR_SEC, bin2bcd(tm->tm_sec));
  138. ds1302_writebyte(RTC_ADDR_MIN, bin2bcd(tm->tm_min));
  139. ds1302_writebyte(RTC_ADDR_HOUR, bin2bcd(tm->tm_hour));
  140. ds1302_writebyte(RTC_ADDR_DAY, bin2bcd(tm->tm_wday));
  141. ds1302_writebyte(RTC_ADDR_DATE, bin2bcd(tm->tm_mday));
  142. ds1302_writebyte(RTC_ADDR_MON, bin2bcd(tm->tm_mon + 1));
  143. ds1302_writebyte(RTC_ADDR_YEAR, bin2bcd(tm->tm_year % 100));
  144. /* Start RTC */
  145. ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) & ~0x80);
  146. ds1302_writebyte(RTC_ADDR_CTRL, RTC_CMD_WRITE_DISABLE);
  147. return 0;
  148. }
  149. static int ds1302_rtc_ioctl(struct device *dev, unsigned int cmd,
  150. unsigned long arg)
  151. {
  152. switch (cmd) {
  153. #ifdef RTC_SET_CHARGE
  154. case RTC_SET_CHARGE:
  155. {
  156. int tcs_val;
  157. if (copy_from_user(&tcs_val, (int __user *)arg, sizeof(int)))
  158. return -EFAULT;
  159. ds1302_writebyte(RTC_ADDR_TCR, (0xa0 | tcs_val * 0xf));
  160. return 0;
  161. }
  162. #endif
  163. }
  164. return -ENOIOCTLCMD;
  165. }
  166. static struct rtc_class_ops ds1302_rtc_ops = {
  167. .read_time = ds1302_rtc_read_time,
  168. .set_time = ds1302_rtc_set_time,
  169. .ioctl = ds1302_rtc_ioctl,
  170. };
  171. static int __init ds1302_rtc_probe(struct platform_device *pdev)
  172. {
  173. struct rtc_device *rtc;
  174. if (ds1302_hw_init()) {
  175. dev_err(&pdev->dev, "Failed to init communication channel");
  176. return -EINVAL;
  177. }
  178. /* Reset */
  179. ds1302_reset();
  180. /* Write a magic value to the DS1302 RAM, and see if it sticks. */
  181. ds1302_writebyte(RTC_ADDR_RAM0, 0x42);
  182. if (ds1302_readbyte(RTC_ADDR_RAM0) != 0x42) {
  183. dev_err(&pdev->dev, "Failed to probe");
  184. return -ENODEV;
  185. }
  186. rtc = devm_rtc_device_register(&pdev->dev, "ds1302",
  187. &ds1302_rtc_ops, THIS_MODULE);
  188. if (IS_ERR(rtc))
  189. return PTR_ERR(rtc);
  190. platform_set_drvdata(pdev, rtc);
  191. return 0;
  192. }
  193. static struct platform_driver ds1302_platform_driver = {
  194. .driver = {
  195. .name = DRV_NAME,
  196. },
  197. };
  198. module_platform_driver_probe(ds1302_platform_driver, ds1302_rtc_probe);
  199. MODULE_DESCRIPTION("Dallas DS1302 RTC driver");
  200. MODULE_VERSION(DRV_VERSION);
  201. MODULE_AUTHOR("Paul Mundt, David McCullough");
  202. MODULE_LICENSE("GPL v2");