rtc-ds1343.c 16 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750
  1. /* rtc-ds1343.c
  2. *
  3. * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
  4. * Real Time Clock
  5. *
  6. * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
  7. * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. */
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/device.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/regmap.h>
  20. #include <linux/rtc.h>
  21. #include <linux/bcd.h>
  22. #include <linux/pm.h>
  23. #include <linux/pm_wakeirq.h>
  24. #include <linux/slab.h>
  25. #define DS1343_DRV_VERSION "01.00"
  26. #define DALLAS_MAXIM_DS1343 0
  27. #define DALLAS_MAXIM_DS1344 1
  28. /* RTC DS1343 Registers */
  29. #define DS1343_SECONDS_REG 0x00
  30. #define DS1343_MINUTES_REG 0x01
  31. #define DS1343_HOURS_REG 0x02
  32. #define DS1343_DAY_REG 0x03
  33. #define DS1343_DATE_REG 0x04
  34. #define DS1343_MONTH_REG 0x05
  35. #define DS1343_YEAR_REG 0x06
  36. #define DS1343_ALM0_SEC_REG 0x07
  37. #define DS1343_ALM0_MIN_REG 0x08
  38. #define DS1343_ALM0_HOUR_REG 0x09
  39. #define DS1343_ALM0_DAY_REG 0x0A
  40. #define DS1343_ALM1_SEC_REG 0x0B
  41. #define DS1343_ALM1_MIN_REG 0x0C
  42. #define DS1343_ALM1_HOUR_REG 0x0D
  43. #define DS1343_ALM1_DAY_REG 0x0E
  44. #define DS1343_CONTROL_REG 0x0F
  45. #define DS1343_STATUS_REG 0x10
  46. #define DS1343_TRICKLE_REG 0x11
  47. #define DS1343_NVRAM 0x20
  48. #define DS1343_NVRAM_LEN 96
  49. /* DS1343 Control Registers bits */
  50. #define DS1343_EOSC 0x80
  51. #define DS1343_DOSF 0x20
  52. #define DS1343_EGFIL 0x10
  53. #define DS1343_SQW 0x08
  54. #define DS1343_INTCN 0x04
  55. #define DS1343_A1IE 0x02
  56. #define DS1343_A0IE 0x01
  57. /* DS1343 Status Registers bits */
  58. #define DS1343_OSF 0x80
  59. #define DS1343_IRQF1 0x02
  60. #define DS1343_IRQF0 0x01
  61. /* DS1343 Trickle Charger Registers bits */
  62. #define DS1343_TRICKLE_MAGIC 0xa0
  63. #define DS1343_TRICKLE_DS1 0x08
  64. #define DS1343_TRICKLE_1K 0x01
  65. #define DS1343_TRICKLE_2K 0x02
  66. #define DS1343_TRICKLE_4K 0x03
  67. static const struct spi_device_id ds1343_id[] = {
  68. { "ds1343", DALLAS_MAXIM_DS1343 },
  69. { "ds1344", DALLAS_MAXIM_DS1344 },
  70. { }
  71. };
  72. MODULE_DEVICE_TABLE(spi, ds1343_id);
  73. struct ds1343_priv {
  74. struct spi_device *spi;
  75. struct rtc_device *rtc;
  76. struct regmap *map;
  77. struct mutex mutex;
  78. unsigned int irqen;
  79. int irq;
  80. int alarm_sec;
  81. int alarm_min;
  82. int alarm_hour;
  83. int alarm_mday;
  84. };
  85. static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  86. {
  87. switch (cmd) {
  88. #ifdef RTC_SET_CHARGE
  89. case RTC_SET_CHARGE:
  90. {
  91. int val;
  92. if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
  93. return -EFAULT;
  94. return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
  95. }
  96. break;
  97. #endif
  98. }
  99. return -ENOIOCTLCMD;
  100. }
  101. static ssize_t ds1343_show_glitchfilter(struct device *dev,
  102. struct device_attribute *attr, char *buf)
  103. {
  104. struct ds1343_priv *priv = dev_get_drvdata(dev);
  105. int glitch_filt_status, data;
  106. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  107. glitch_filt_status = !!(data & DS1343_EGFIL);
  108. if (glitch_filt_status)
  109. return sprintf(buf, "enabled\n");
  110. else
  111. return sprintf(buf, "disabled\n");
  112. }
  113. static ssize_t ds1343_store_glitchfilter(struct device *dev,
  114. struct device_attribute *attr,
  115. const char *buf, size_t count)
  116. {
  117. struct ds1343_priv *priv = dev_get_drvdata(dev);
  118. int data;
  119. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  120. if (strncmp(buf, "enabled", 7) == 0)
  121. data |= DS1343_EGFIL;
  122. else if (strncmp(buf, "disabled", 8) == 0)
  123. data &= ~(DS1343_EGFIL);
  124. else
  125. return -EINVAL;
  126. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  127. return count;
  128. }
  129. static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
  130. ds1343_store_glitchfilter);
  131. static ssize_t ds1343_nvram_write(struct file *filp, struct kobject *kobj,
  132. struct bin_attribute *attr,
  133. char *buf, loff_t off, size_t count)
  134. {
  135. int ret;
  136. unsigned char address;
  137. struct device *dev = kobj_to_dev(kobj);
  138. struct ds1343_priv *priv = dev_get_drvdata(dev);
  139. address = DS1343_NVRAM + off;
  140. ret = regmap_bulk_write(priv->map, address, buf, count);
  141. if (ret < 0)
  142. dev_err(&priv->spi->dev, "Error in nvram write %d", ret);
  143. return (ret < 0) ? ret : count;
  144. }
  145. static ssize_t ds1343_nvram_read(struct file *filp, struct kobject *kobj,
  146. struct bin_attribute *attr,
  147. char *buf, loff_t off, size_t count)
  148. {
  149. int ret;
  150. unsigned char address;
  151. struct device *dev = kobj_to_dev(kobj);
  152. struct ds1343_priv *priv = dev_get_drvdata(dev);
  153. address = DS1343_NVRAM + off;
  154. ret = regmap_bulk_read(priv->map, address, buf, count);
  155. if (ret < 0)
  156. dev_err(&priv->spi->dev, "Error in nvram read %d\n", ret);
  157. return (ret < 0) ? ret : count;
  158. }
  159. static struct bin_attribute nvram_attr = {
  160. .attr.name = "nvram",
  161. .attr.mode = S_IRUGO | S_IWUSR,
  162. .read = ds1343_nvram_read,
  163. .write = ds1343_nvram_write,
  164. .size = DS1343_NVRAM_LEN,
  165. };
  166. static ssize_t ds1343_show_alarmstatus(struct device *dev,
  167. struct device_attribute *attr, char *buf)
  168. {
  169. struct ds1343_priv *priv = dev_get_drvdata(dev);
  170. int alarmstatus, data;
  171. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  172. alarmstatus = !!(data & DS1343_A0IE);
  173. if (alarmstatus)
  174. return sprintf(buf, "enabled\n");
  175. else
  176. return sprintf(buf, "disabled\n");
  177. }
  178. static DEVICE_ATTR(alarm_status, S_IRUGO, ds1343_show_alarmstatus, NULL);
  179. static ssize_t ds1343_show_alarmmode(struct device *dev,
  180. struct device_attribute *attr, char *buf)
  181. {
  182. struct ds1343_priv *priv = dev_get_drvdata(dev);
  183. int alarm_mode, data;
  184. char *alarm_str;
  185. regmap_read(priv->map, DS1343_ALM0_SEC_REG, &data);
  186. alarm_mode = (data & 0x80) >> 4;
  187. regmap_read(priv->map, DS1343_ALM0_MIN_REG, &data);
  188. alarm_mode |= (data & 0x80) >> 5;
  189. regmap_read(priv->map, DS1343_ALM0_HOUR_REG, &data);
  190. alarm_mode |= (data & 0x80) >> 6;
  191. regmap_read(priv->map, DS1343_ALM0_DAY_REG, &data);
  192. alarm_mode |= (data & 0x80) >> 7;
  193. switch (alarm_mode) {
  194. case 15:
  195. alarm_str = "each second";
  196. break;
  197. case 7:
  198. alarm_str = "seconds match";
  199. break;
  200. case 3:
  201. alarm_str = "minutes and seconds match";
  202. break;
  203. case 1:
  204. alarm_str = "hours, minutes and seconds match";
  205. break;
  206. case 0:
  207. alarm_str = "day, hours, minutes and seconds match";
  208. break;
  209. default:
  210. alarm_str = "invalid";
  211. break;
  212. }
  213. return sprintf(buf, "%s\n", alarm_str);
  214. }
  215. static DEVICE_ATTR(alarm_mode, S_IRUGO, ds1343_show_alarmmode, NULL);
  216. static ssize_t ds1343_show_tricklecharger(struct device *dev,
  217. struct device_attribute *attr, char *buf)
  218. {
  219. struct ds1343_priv *priv = dev_get_drvdata(dev);
  220. int data;
  221. char *diodes = "disabled", *resistors = " ";
  222. regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
  223. if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
  224. switch (data & 0x0c) {
  225. case DS1343_TRICKLE_DS1:
  226. diodes = "one diode,";
  227. break;
  228. default:
  229. diodes = "no diode,";
  230. break;
  231. }
  232. switch (data & 0x03) {
  233. case DS1343_TRICKLE_1K:
  234. resistors = "1k Ohm";
  235. break;
  236. case DS1343_TRICKLE_2K:
  237. resistors = "2k Ohm";
  238. break;
  239. case DS1343_TRICKLE_4K:
  240. resistors = "4k Ohm";
  241. break;
  242. default:
  243. diodes = "disabled";
  244. break;
  245. }
  246. }
  247. return sprintf(buf, "%s %s\n", diodes, resistors);
  248. }
  249. static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
  250. static int ds1343_sysfs_register(struct device *dev)
  251. {
  252. struct ds1343_priv *priv = dev_get_drvdata(dev);
  253. int err;
  254. err = device_create_file(dev, &dev_attr_glitch_filter);
  255. if (err)
  256. return err;
  257. err = device_create_file(dev, &dev_attr_trickle_charger);
  258. if (err)
  259. goto error1;
  260. err = device_create_bin_file(dev, &nvram_attr);
  261. if (err)
  262. goto error2;
  263. if (priv->irq <= 0)
  264. return err;
  265. err = device_create_file(dev, &dev_attr_alarm_mode);
  266. if (err)
  267. goto error3;
  268. err = device_create_file(dev, &dev_attr_alarm_status);
  269. if (!err)
  270. return err;
  271. device_remove_file(dev, &dev_attr_alarm_mode);
  272. error3:
  273. device_remove_bin_file(dev, &nvram_attr);
  274. error2:
  275. device_remove_file(dev, &dev_attr_trickle_charger);
  276. error1:
  277. device_remove_file(dev, &dev_attr_glitch_filter);
  278. return err;
  279. }
  280. static void ds1343_sysfs_unregister(struct device *dev)
  281. {
  282. struct ds1343_priv *priv = dev_get_drvdata(dev);
  283. device_remove_file(dev, &dev_attr_glitch_filter);
  284. device_remove_file(dev, &dev_attr_trickle_charger);
  285. device_remove_bin_file(dev, &nvram_attr);
  286. if (priv->irq <= 0)
  287. return;
  288. device_remove_file(dev, &dev_attr_alarm_status);
  289. device_remove_file(dev, &dev_attr_alarm_mode);
  290. }
  291. static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
  292. {
  293. struct ds1343_priv *priv = dev_get_drvdata(dev);
  294. unsigned char buf[7];
  295. int res;
  296. res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
  297. if (res)
  298. return res;
  299. dt->tm_sec = bcd2bin(buf[0]);
  300. dt->tm_min = bcd2bin(buf[1]);
  301. dt->tm_hour = bcd2bin(buf[2] & 0x3F);
  302. dt->tm_wday = bcd2bin(buf[3]) - 1;
  303. dt->tm_mday = bcd2bin(buf[4]);
  304. dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1;
  305. dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */
  306. return rtc_valid_tm(dt);
  307. }
  308. static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
  309. {
  310. struct ds1343_priv *priv = dev_get_drvdata(dev);
  311. int res;
  312. res = regmap_write(priv->map, DS1343_SECONDS_REG,
  313. bin2bcd(dt->tm_sec));
  314. if (res)
  315. return res;
  316. res = regmap_write(priv->map, DS1343_MINUTES_REG,
  317. bin2bcd(dt->tm_min));
  318. if (res)
  319. return res;
  320. res = regmap_write(priv->map, DS1343_HOURS_REG,
  321. bin2bcd(dt->tm_hour) & 0x3F);
  322. if (res)
  323. return res;
  324. res = regmap_write(priv->map, DS1343_DAY_REG,
  325. bin2bcd(dt->tm_wday + 1));
  326. if (res)
  327. return res;
  328. res = regmap_write(priv->map, DS1343_DATE_REG,
  329. bin2bcd(dt->tm_mday));
  330. if (res)
  331. return res;
  332. res = regmap_write(priv->map, DS1343_MONTH_REG,
  333. bin2bcd(dt->tm_mon + 1));
  334. if (res)
  335. return res;
  336. dt->tm_year %= 100;
  337. res = regmap_write(priv->map, DS1343_YEAR_REG,
  338. bin2bcd(dt->tm_year));
  339. if (res)
  340. return res;
  341. return 0;
  342. }
  343. static int ds1343_update_alarm(struct device *dev)
  344. {
  345. struct ds1343_priv *priv = dev_get_drvdata(dev);
  346. unsigned int control, stat;
  347. unsigned char buf[4];
  348. int res = 0;
  349. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  350. if (res)
  351. return res;
  352. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  353. if (res)
  354. return res;
  355. control &= ~(DS1343_A0IE);
  356. stat &= ~(DS1343_IRQF0);
  357. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  358. if (res)
  359. return res;
  360. res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
  361. if (res)
  362. return res;
  363. buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
  364. 0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
  365. buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
  366. 0x80 : bin2bcd(priv->alarm_min) & 0x7F;
  367. buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
  368. 0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
  369. buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
  370. 0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
  371. res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
  372. if (res)
  373. return res;
  374. if (priv->irqen) {
  375. control |= DS1343_A0IE;
  376. res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
  377. }
  378. return res;
  379. }
  380. static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  381. {
  382. struct ds1343_priv *priv = dev_get_drvdata(dev);
  383. int res = 0;
  384. unsigned int stat;
  385. if (priv->irq <= 0)
  386. return -EINVAL;
  387. mutex_lock(&priv->mutex);
  388. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  389. if (res)
  390. goto out;
  391. alarm->enabled = !!(priv->irqen & RTC_AF);
  392. alarm->pending = !!(stat & DS1343_IRQF0);
  393. alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
  394. alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
  395. alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
  396. alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
  397. alarm->time.tm_mon = -1;
  398. alarm->time.tm_year = -1;
  399. alarm->time.tm_wday = -1;
  400. alarm->time.tm_yday = -1;
  401. alarm->time.tm_isdst = -1;
  402. out:
  403. mutex_unlock(&priv->mutex);
  404. return res;
  405. }
  406. static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
  407. {
  408. struct ds1343_priv *priv = dev_get_drvdata(dev);
  409. int res = 0;
  410. if (priv->irq <= 0)
  411. return -EINVAL;
  412. mutex_lock(&priv->mutex);
  413. priv->alarm_sec = alarm->time.tm_sec;
  414. priv->alarm_min = alarm->time.tm_min;
  415. priv->alarm_hour = alarm->time.tm_hour;
  416. priv->alarm_mday = alarm->time.tm_mday;
  417. if (alarm->enabled)
  418. priv->irqen |= RTC_AF;
  419. res = ds1343_update_alarm(dev);
  420. mutex_unlock(&priv->mutex);
  421. return res;
  422. }
  423. static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
  424. {
  425. struct ds1343_priv *priv = dev_get_drvdata(dev);
  426. int res = 0;
  427. if (priv->irq <= 0)
  428. return -EINVAL;
  429. mutex_lock(&priv->mutex);
  430. if (enabled)
  431. priv->irqen |= RTC_AF;
  432. else
  433. priv->irqen &= ~RTC_AF;
  434. res = ds1343_update_alarm(dev);
  435. mutex_unlock(&priv->mutex);
  436. return res;
  437. }
  438. static irqreturn_t ds1343_thread(int irq, void *dev_id)
  439. {
  440. struct ds1343_priv *priv = dev_id;
  441. unsigned int stat, control;
  442. int res = 0;
  443. mutex_lock(&priv->mutex);
  444. res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
  445. if (res)
  446. goto out;
  447. if (stat & DS1343_IRQF0) {
  448. stat &= ~DS1343_IRQF0;
  449. regmap_write(priv->map, DS1343_STATUS_REG, stat);
  450. res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
  451. if (res)
  452. goto out;
  453. control &= ~DS1343_A0IE;
  454. regmap_write(priv->map, DS1343_CONTROL_REG, control);
  455. rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
  456. }
  457. out:
  458. mutex_unlock(&priv->mutex);
  459. return IRQ_HANDLED;
  460. }
  461. static const struct rtc_class_ops ds1343_rtc_ops = {
  462. .ioctl = ds1343_ioctl,
  463. .read_time = ds1343_read_time,
  464. .set_time = ds1343_set_time,
  465. .read_alarm = ds1343_read_alarm,
  466. .set_alarm = ds1343_set_alarm,
  467. .alarm_irq_enable = ds1343_alarm_irq_enable,
  468. };
  469. static int ds1343_probe(struct spi_device *spi)
  470. {
  471. struct ds1343_priv *priv;
  472. struct regmap_config config;
  473. unsigned int data;
  474. int res;
  475. memset(&config, 0, sizeof(config));
  476. config.reg_bits = 8;
  477. config.val_bits = 8;
  478. config.write_flag_mask = 0x80;
  479. priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
  480. if (!priv)
  481. return -ENOMEM;
  482. priv->spi = spi;
  483. mutex_init(&priv->mutex);
  484. /* RTC DS1347 works in spi mode 3 and
  485. * its chip select is active high
  486. */
  487. spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
  488. spi->bits_per_word = 8;
  489. res = spi_setup(spi);
  490. if (res)
  491. return res;
  492. spi_set_drvdata(spi, priv);
  493. priv->map = devm_regmap_init_spi(spi, &config);
  494. if (IS_ERR(priv->map)) {
  495. dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
  496. return PTR_ERR(priv->map);
  497. }
  498. res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
  499. if (res)
  500. return res;
  501. regmap_read(priv->map, DS1343_CONTROL_REG, &data);
  502. data |= DS1343_INTCN;
  503. data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
  504. regmap_write(priv->map, DS1343_CONTROL_REG, data);
  505. regmap_read(priv->map, DS1343_STATUS_REG, &data);
  506. data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
  507. regmap_write(priv->map, DS1343_STATUS_REG, data);
  508. priv->rtc = devm_rtc_device_register(&spi->dev, "ds1343",
  509. &ds1343_rtc_ops, THIS_MODULE);
  510. if (IS_ERR(priv->rtc)) {
  511. dev_err(&spi->dev, "unable to register rtc ds1343\n");
  512. return PTR_ERR(priv->rtc);
  513. }
  514. priv->irq = spi->irq;
  515. if (priv->irq >= 0) {
  516. res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
  517. ds1343_thread, IRQF_ONESHOT,
  518. "ds1343", priv);
  519. if (res) {
  520. priv->irq = -1;
  521. dev_err(&spi->dev,
  522. "unable to request irq for rtc ds1343\n");
  523. } else {
  524. device_init_wakeup(&spi->dev, true);
  525. dev_pm_set_wake_irq(&spi->dev, spi->irq);
  526. }
  527. }
  528. res = ds1343_sysfs_register(&spi->dev);
  529. if (res)
  530. dev_err(&spi->dev,
  531. "unable to create sysfs entries for rtc ds1343\n");
  532. return 0;
  533. }
  534. static int ds1343_remove(struct spi_device *spi)
  535. {
  536. struct ds1343_priv *priv = spi_get_drvdata(spi);
  537. if (spi->irq) {
  538. mutex_lock(&priv->mutex);
  539. priv->irqen &= ~RTC_AF;
  540. mutex_unlock(&priv->mutex);
  541. dev_pm_clear_wake_irq(&spi->dev);
  542. device_init_wakeup(&spi->dev, false);
  543. devm_free_irq(&spi->dev, spi->irq, priv);
  544. }
  545. spi_set_drvdata(spi, NULL);
  546. ds1343_sysfs_unregister(&spi->dev);
  547. return 0;
  548. }
  549. #ifdef CONFIG_PM_SLEEP
  550. static int ds1343_suspend(struct device *dev)
  551. {
  552. struct spi_device *spi = to_spi_device(dev);
  553. if (spi->irq >= 0 && device_may_wakeup(dev))
  554. enable_irq_wake(spi->irq);
  555. return 0;
  556. }
  557. static int ds1343_resume(struct device *dev)
  558. {
  559. struct spi_device *spi = to_spi_device(dev);
  560. if (spi->irq >= 0 && device_may_wakeup(dev))
  561. disable_irq_wake(spi->irq);
  562. return 0;
  563. }
  564. #endif
  565. static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
  566. static struct spi_driver ds1343_driver = {
  567. .driver = {
  568. .name = "ds1343",
  569. .pm = &ds1343_pm,
  570. },
  571. .probe = ds1343_probe,
  572. .remove = ds1343_remove,
  573. .id_table = ds1343_id,
  574. };
  575. module_spi_driver(ds1343_driver);
  576. MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
  577. MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
  578. "Ankur Srivastava <sankurece@gmail.com>");
  579. MODULE_LICENSE("GPL v2");
  580. MODULE_VERSION(DS1343_DRV_VERSION);