rtc-msm6242.c 6.8 KB

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  1. /*
  2. * Oki MSM6242 RTC Driver
  3. *
  4. * Copyright 2009 Geert Uytterhoeven
  5. *
  6. * Based on the A2000 TOD code in arch/m68k/amiga/config.c
  7. * Copyright (C) 1993 Hamish Macdonald
  8. */
  9. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10. #include <linux/delay.h>
  11. #include <linux/io.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/rtc.h>
  16. #include <linux/slab.h>
  17. enum {
  18. MSM6242_SECOND1 = 0x0, /* 1-second digit register */
  19. MSM6242_SECOND10 = 0x1, /* 10-second digit register */
  20. MSM6242_MINUTE1 = 0x2, /* 1-minute digit register */
  21. MSM6242_MINUTE10 = 0x3, /* 10-minute digit register */
  22. MSM6242_HOUR1 = 0x4, /* 1-hour digit register */
  23. MSM6242_HOUR10 = 0x5, /* PM/AM, 10-hour digit register */
  24. MSM6242_DAY1 = 0x6, /* 1-day digit register */
  25. MSM6242_DAY10 = 0x7, /* 10-day digit register */
  26. MSM6242_MONTH1 = 0x8, /* 1-month digit register */
  27. MSM6242_MONTH10 = 0x9, /* 10-month digit register */
  28. MSM6242_YEAR1 = 0xa, /* 1-year digit register */
  29. MSM6242_YEAR10 = 0xb, /* 10-year digit register */
  30. MSM6242_WEEK = 0xc, /* Week register */
  31. MSM6242_CD = 0xd, /* Control Register D */
  32. MSM6242_CE = 0xe, /* Control Register E */
  33. MSM6242_CF = 0xf, /* Control Register F */
  34. };
  35. #define MSM6242_HOUR10_AM (0 << 2)
  36. #define MSM6242_HOUR10_PM (1 << 2)
  37. #define MSM6242_HOUR10_HR_MASK (3 << 0)
  38. #define MSM6242_WEEK_SUNDAY 0
  39. #define MSM6242_WEEK_MONDAY 1
  40. #define MSM6242_WEEK_TUESDAY 2
  41. #define MSM6242_WEEK_WEDNESDAY 3
  42. #define MSM6242_WEEK_THURSDAY 4
  43. #define MSM6242_WEEK_FRIDAY 5
  44. #define MSM6242_WEEK_SATURDAY 6
  45. #define MSM6242_CD_30_S_ADJ (1 << 3) /* 30-second adjustment */
  46. #define MSM6242_CD_IRQ_FLAG (1 << 2)
  47. #define MSM6242_CD_BUSY (1 << 1)
  48. #define MSM6242_CD_HOLD (1 << 0)
  49. #define MSM6242_CE_T_MASK (3 << 2)
  50. #define MSM6242_CE_T_64HZ (0 << 2) /* period 1/64 second */
  51. #define MSM6242_CE_T_1HZ (1 << 2) /* period 1 second */
  52. #define MSM6242_CE_T_1MINUTE (2 << 2) /* period 1 minute */
  53. #define MSM6242_CE_T_1HOUR (3 << 2) /* period 1 hour */
  54. #define MSM6242_CE_ITRPT_STND (1 << 1)
  55. #define MSM6242_CE_MASK (1 << 0) /* STD.P output control */
  56. #define MSM6242_CF_TEST (1 << 3)
  57. #define MSM6242_CF_12H (0 << 2)
  58. #define MSM6242_CF_24H (1 << 2)
  59. #define MSM6242_CF_STOP (1 << 1)
  60. #define MSM6242_CF_REST (1 << 0) /* reset */
  61. struct msm6242_priv {
  62. u32 __iomem *regs;
  63. struct rtc_device *rtc;
  64. };
  65. static inline unsigned int msm6242_read(struct msm6242_priv *priv,
  66. unsigned int reg)
  67. {
  68. return __raw_readl(&priv->regs[reg]) & 0xf;
  69. }
  70. static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val,
  71. unsigned int reg)
  72. {
  73. __raw_writel(val, &priv->regs[reg]);
  74. }
  75. static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val,
  76. unsigned int reg)
  77. {
  78. msm6242_write(priv, msm6242_read(priv, reg) | val, reg);
  79. }
  80. static inline void msm6242_clear(struct msm6242_priv *priv, unsigned int val,
  81. unsigned int reg)
  82. {
  83. msm6242_write(priv, msm6242_read(priv, reg) & ~val, reg);
  84. }
  85. static void msm6242_lock(struct msm6242_priv *priv)
  86. {
  87. int cnt = 5;
  88. msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
  89. while ((msm6242_read(priv, MSM6242_CD) & MSM6242_CD_BUSY) && cnt) {
  90. msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
  91. udelay(70);
  92. msm6242_set(priv, MSM6242_CD_HOLD, MSM6242_CD);
  93. cnt--;
  94. }
  95. if (!cnt)
  96. pr_warn("timed out waiting for RTC (0x%x)\n",
  97. msm6242_read(priv, MSM6242_CD));
  98. }
  99. static void msm6242_unlock(struct msm6242_priv *priv)
  100. {
  101. msm6242_clear(priv, MSM6242_CD_HOLD, MSM6242_CD);
  102. }
  103. static int msm6242_read_time(struct device *dev, struct rtc_time *tm)
  104. {
  105. struct msm6242_priv *priv = dev_get_drvdata(dev);
  106. msm6242_lock(priv);
  107. tm->tm_sec = msm6242_read(priv, MSM6242_SECOND10) * 10 +
  108. msm6242_read(priv, MSM6242_SECOND1);
  109. tm->tm_min = msm6242_read(priv, MSM6242_MINUTE10) * 10 +
  110. msm6242_read(priv, MSM6242_MINUTE1);
  111. tm->tm_hour = (msm6242_read(priv, MSM6242_HOUR10 & 3)) * 10 +
  112. msm6242_read(priv, MSM6242_HOUR1);
  113. tm->tm_mday = msm6242_read(priv, MSM6242_DAY10) * 10 +
  114. msm6242_read(priv, MSM6242_DAY1);
  115. tm->tm_wday = msm6242_read(priv, MSM6242_WEEK);
  116. tm->tm_mon = msm6242_read(priv, MSM6242_MONTH10) * 10 +
  117. msm6242_read(priv, MSM6242_MONTH1) - 1;
  118. tm->tm_year = msm6242_read(priv, MSM6242_YEAR10) * 10 +
  119. msm6242_read(priv, MSM6242_YEAR1);
  120. if (tm->tm_year <= 69)
  121. tm->tm_year += 100;
  122. if (!(msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)) {
  123. unsigned int pm = msm6242_read(priv, MSM6242_HOUR10) &
  124. MSM6242_HOUR10_PM;
  125. if (!pm && tm->tm_hour == 12)
  126. tm->tm_hour = 0;
  127. else if (pm && tm->tm_hour != 12)
  128. tm->tm_hour += 12;
  129. }
  130. msm6242_unlock(priv);
  131. return rtc_valid_tm(tm);
  132. }
  133. static int msm6242_set_time(struct device *dev, struct rtc_time *tm)
  134. {
  135. struct msm6242_priv *priv = dev_get_drvdata(dev);
  136. msm6242_lock(priv);
  137. msm6242_write(priv, tm->tm_sec / 10, MSM6242_SECOND10);
  138. msm6242_write(priv, tm->tm_sec % 10, MSM6242_SECOND1);
  139. msm6242_write(priv, tm->tm_min / 10, MSM6242_MINUTE10);
  140. msm6242_write(priv, tm->tm_min % 10, MSM6242_MINUTE1);
  141. if (msm6242_read(priv, MSM6242_CF) & MSM6242_CF_24H)
  142. msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
  143. else if (tm->tm_hour >= 12)
  144. msm6242_write(priv, MSM6242_HOUR10_PM + (tm->tm_hour - 12) / 10,
  145. MSM6242_HOUR10);
  146. else
  147. msm6242_write(priv, tm->tm_hour / 10, MSM6242_HOUR10);
  148. msm6242_write(priv, tm->tm_hour % 10, MSM6242_HOUR1);
  149. msm6242_write(priv, tm->tm_mday / 10, MSM6242_DAY10);
  150. msm6242_write(priv, tm->tm_mday % 10, MSM6242_DAY1);
  151. if (tm->tm_wday != -1)
  152. msm6242_write(priv, tm->tm_wday, MSM6242_WEEK);
  153. msm6242_write(priv, (tm->tm_mon + 1) / 10, MSM6242_MONTH10);
  154. msm6242_write(priv, (tm->tm_mon + 1) % 10, MSM6242_MONTH1);
  155. if (tm->tm_year >= 100)
  156. tm->tm_year -= 100;
  157. msm6242_write(priv, tm->tm_year / 10, MSM6242_YEAR10);
  158. msm6242_write(priv, tm->tm_year % 10, MSM6242_YEAR1);
  159. msm6242_unlock(priv);
  160. return 0;
  161. }
  162. static const struct rtc_class_ops msm6242_rtc_ops = {
  163. .read_time = msm6242_read_time,
  164. .set_time = msm6242_set_time,
  165. };
  166. static int __init msm6242_rtc_probe(struct platform_device *pdev)
  167. {
  168. struct resource *res;
  169. struct msm6242_priv *priv;
  170. struct rtc_device *rtc;
  171. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  172. if (!res)
  173. return -ENODEV;
  174. priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
  175. if (!priv)
  176. return -ENOMEM;
  177. priv->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
  178. if (!priv->regs)
  179. return -ENOMEM;
  180. platform_set_drvdata(pdev, priv);
  181. rtc = devm_rtc_device_register(&pdev->dev, "rtc-msm6242",
  182. &msm6242_rtc_ops, THIS_MODULE);
  183. if (IS_ERR(rtc))
  184. return PTR_ERR(rtc);
  185. priv->rtc = rtc;
  186. return 0;
  187. }
  188. static struct platform_driver msm6242_rtc_driver = {
  189. .driver = {
  190. .name = "rtc-msm6242",
  191. },
  192. };
  193. module_platform_driver_probe(msm6242_rtc_driver, msm6242_rtc_probe);
  194. MODULE_AUTHOR("Geert Uytterhoeven <geert@linux-m68k.org>");
  195. MODULE_LICENSE("GPL");
  196. MODULE_DESCRIPTION("Oki MSM6242 RTC driver");
  197. MODULE_ALIAS("platform:rtc-msm6242");