rtc-rs5c372.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699
  1. /*
  2. * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  3. *
  4. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  5. * Copyright (C) 2006 Tower Technologies
  6. * Copyright (C) 2008 Paul Mundt
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/rtc.h>
  14. #include <linux/bcd.h>
  15. #include <linux/slab.h>
  16. #include <linux/module.h>
  17. #define DRV_VERSION "0.6"
  18. /*
  19. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  20. * each other. Differences center on pinout (e.g. how many interrupts,
  21. * output clock, etc) and how the control registers are used. The '372
  22. * is significant only because that's the one this driver first supported.
  23. */
  24. #define RS5C372_REG_SECS 0
  25. #define RS5C372_REG_MINS 1
  26. #define RS5C372_REG_HOURS 2
  27. #define RS5C372_REG_WDAY 3
  28. #define RS5C372_REG_DAY 4
  29. #define RS5C372_REG_MONTH 5
  30. #define RS5C372_REG_YEAR 6
  31. #define RS5C372_REG_TRIM 7
  32. # define RS5C372_TRIM_XSL 0x80
  33. # define RS5C372_TRIM_MASK 0x7F
  34. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  35. #define RS5C_REG_ALARM_A_HOURS 9
  36. #define RS5C_REG_ALARM_A_WDAY 10
  37. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  38. #define RS5C_REG_ALARM_B_HOURS 12
  39. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  40. #define RS5C_REG_CTRL1 14
  41. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  42. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  43. # define RV5C387_CTRL1_24 (1 << 5)
  44. # define RS5C372A_CTRL1_SL1 (1 << 5)
  45. # define RS5C_CTRL1_CT_MASK (7 << 0)
  46. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  47. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  48. #define RS5C_REG_CTRL2 15
  49. # define RS5C372_CTRL2_24 (1 << 5)
  50. # define R2025_CTRL2_XST (1 << 5)
  51. # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */
  52. # define RS5C_CTRL2_CTFG (1 << 2)
  53. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  54. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  55. /* to read (style 1) or write registers starting at R */
  56. #define RS5C_ADDR(R) (((R) << 4) | 0)
  57. enum rtc_type {
  58. rtc_undef = 0,
  59. rtc_r2025sd,
  60. rtc_r2221tl,
  61. rtc_rs5c372a,
  62. rtc_rs5c372b,
  63. rtc_rv5c386,
  64. rtc_rv5c387a,
  65. };
  66. static const struct i2c_device_id rs5c372_id[] = {
  67. { "r2025sd", rtc_r2025sd },
  68. { "r2221tl", rtc_r2221tl },
  69. { "rs5c372a", rtc_rs5c372a },
  70. { "rs5c372b", rtc_rs5c372b },
  71. { "rv5c386", rtc_rv5c386 },
  72. { "rv5c387a", rtc_rv5c387a },
  73. { }
  74. };
  75. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  76. /* REVISIT: this assumes that:
  77. * - we're in the 21st century, so it's safe to ignore the century
  78. * bit for rv5c38[67] (REG_MONTH bit 7);
  79. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  80. */
  81. struct rs5c372 {
  82. struct i2c_client *client;
  83. struct rtc_device *rtc;
  84. enum rtc_type type;
  85. unsigned time24:1;
  86. unsigned has_irq:1;
  87. unsigned smbus:1;
  88. char buf[17];
  89. char *regs;
  90. };
  91. static int rs5c_get_regs(struct rs5c372 *rs5c)
  92. {
  93. struct i2c_client *client = rs5c->client;
  94. struct i2c_msg msgs[] = {
  95. {
  96. .addr = client->addr,
  97. .flags = I2C_M_RD,
  98. .len = sizeof(rs5c->buf),
  99. .buf = rs5c->buf
  100. },
  101. };
  102. /* This implements the third reading method from the datasheet, using
  103. * an internal address that's reset after each transaction (by STOP)
  104. * to 0x0f ... so we read extra registers, and skip the first one.
  105. *
  106. * The first method doesn't work with the iop3xx adapter driver, on at
  107. * least 80219 chips; this works around that bug.
  108. *
  109. * The third method on the other hand doesn't work for the SMBus-only
  110. * configurations, so we use the the first method there, stripping off
  111. * the extra register in the process.
  112. */
  113. if (rs5c->smbus) {
  114. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  115. int size = sizeof(rs5c->buf) - 1;
  116. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  117. rs5c->buf + 1) != size) {
  118. dev_warn(&client->dev, "can't read registers\n");
  119. return -EIO;
  120. }
  121. } else {
  122. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  123. dev_warn(&client->dev, "can't read registers\n");
  124. return -EIO;
  125. }
  126. }
  127. dev_dbg(&client->dev,
  128. "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n",
  129. rs5c->regs + 0, rs5c->regs[3],
  130. rs5c->regs + 4, rs5c->regs[7],
  131. rs5c->regs + 8, rs5c->regs + 11,
  132. rs5c->regs[14], rs5c->regs[15]);
  133. return 0;
  134. }
  135. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  136. {
  137. unsigned hour;
  138. if (rs5c->time24)
  139. return bcd2bin(reg & 0x3f);
  140. hour = bcd2bin(reg & 0x1f);
  141. if (hour == 12)
  142. hour = 0;
  143. if (reg & 0x20)
  144. hour += 12;
  145. return hour;
  146. }
  147. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  148. {
  149. if (rs5c->time24)
  150. return bin2bcd(hour);
  151. if (hour > 12)
  152. return 0x20 | bin2bcd(hour - 12);
  153. if (hour == 12)
  154. return 0x20 | bin2bcd(12);
  155. if (hour == 0)
  156. return bin2bcd(12);
  157. return bin2bcd(hour);
  158. }
  159. static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm)
  160. {
  161. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  162. int status = rs5c_get_regs(rs5c);
  163. if (status < 0)
  164. return status;
  165. tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  166. tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  167. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  168. tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  169. tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  170. /* tm->tm_mon is zero-based */
  171. tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  172. /* year is 1900 + tm->tm_year */
  173. tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  174. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  175. "mday=%d, mon=%d, year=%d, wday=%d\n",
  176. __func__,
  177. tm->tm_sec, tm->tm_min, tm->tm_hour,
  178. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  179. /* rtc might need initialization */
  180. return rtc_valid_tm(tm);
  181. }
  182. static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
  183. {
  184. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  185. unsigned char buf[7];
  186. int addr;
  187. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  188. "mday=%d, mon=%d, year=%d, wday=%d\n",
  189. __func__,
  190. tm->tm_sec, tm->tm_min, tm->tm_hour,
  191. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  192. addr = RS5C_ADDR(RS5C372_REG_SECS);
  193. buf[0] = bin2bcd(tm->tm_sec);
  194. buf[1] = bin2bcd(tm->tm_min);
  195. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  196. buf[3] = bin2bcd(tm->tm_wday);
  197. buf[4] = bin2bcd(tm->tm_mday);
  198. buf[5] = bin2bcd(tm->tm_mon + 1);
  199. buf[6] = bin2bcd(tm->tm_year - 100);
  200. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  201. dev_err(&client->dev, "%s: write error\n", __func__);
  202. return -EIO;
  203. }
  204. return 0;
  205. }
  206. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  207. #define NEED_TRIM
  208. #endif
  209. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  210. #define NEED_TRIM
  211. #endif
  212. #ifdef NEED_TRIM
  213. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  214. {
  215. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  216. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  217. if (osc)
  218. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  219. if (trim) {
  220. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  221. tmp &= RS5C372_TRIM_MASK;
  222. if (tmp & 0x3e) {
  223. int t = tmp & 0x3f;
  224. if (tmp & 0x40)
  225. t = (~t | (s8)0xc0) + 1;
  226. else
  227. t = t - 1;
  228. tmp = t * 2;
  229. } else
  230. tmp = 0;
  231. *trim = tmp;
  232. }
  233. return 0;
  234. }
  235. #endif
  236. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  237. {
  238. return rs5c372_get_datetime(to_i2c_client(dev), tm);
  239. }
  240. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  241. {
  242. return rs5c372_set_datetime(to_i2c_client(dev), tm);
  243. }
  244. static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  245. {
  246. struct i2c_client *client = to_i2c_client(dev);
  247. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  248. unsigned char buf;
  249. int status, addr;
  250. buf = rs5c->regs[RS5C_REG_CTRL1];
  251. if (!rs5c->has_irq)
  252. return -EINVAL;
  253. status = rs5c_get_regs(rs5c);
  254. if (status < 0)
  255. return status;
  256. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  257. if (enabled)
  258. buf |= RS5C_CTRL1_AALE;
  259. else
  260. buf &= ~RS5C_CTRL1_AALE;
  261. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  262. dev_warn(dev, "can't update alarm\n");
  263. status = -EIO;
  264. } else
  265. rs5c->regs[RS5C_REG_CTRL1] = buf;
  266. return status;
  267. }
  268. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  269. * which only exposes a polled programming interface; and since
  270. * these calls map directly to those EFI requests; we don't demand
  271. * we have an IRQ for this chip when we go through this API.
  272. *
  273. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  274. * though, managed through RTC_AIE_{ON,OFF} requests.
  275. */
  276. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  277. {
  278. struct i2c_client *client = to_i2c_client(dev);
  279. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  280. int status;
  281. status = rs5c_get_regs(rs5c);
  282. if (status < 0)
  283. return status;
  284. /* report alarm time */
  285. t->time.tm_sec = 0;
  286. t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  287. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  288. t->time.tm_mday = -1;
  289. t->time.tm_mon = -1;
  290. t->time.tm_year = -1;
  291. t->time.tm_wday = -1;
  292. t->time.tm_yday = -1;
  293. t->time.tm_isdst = -1;
  294. /* ... and status */
  295. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  296. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  297. return 0;
  298. }
  299. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  300. {
  301. struct i2c_client *client = to_i2c_client(dev);
  302. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  303. int status, addr, i;
  304. unsigned char buf[3];
  305. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  306. if (t->time.tm_mday != -1
  307. || t->time.tm_mon != -1
  308. || t->time.tm_year != -1)
  309. return -EINVAL;
  310. /* REVISIT: round up tm_sec */
  311. /* if needed, disable irq (clears pending status) */
  312. status = rs5c_get_regs(rs5c);
  313. if (status < 0)
  314. return status;
  315. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  316. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  317. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  318. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  319. dev_dbg(dev, "can't disable alarm\n");
  320. return -EIO;
  321. }
  322. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  323. }
  324. /* set alarm */
  325. buf[0] = bin2bcd(t->time.tm_min);
  326. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  327. buf[2] = 0x7f; /* any/all days */
  328. for (i = 0; i < sizeof(buf); i++) {
  329. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  330. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  331. dev_dbg(dev, "can't set alarm time\n");
  332. return -EIO;
  333. }
  334. }
  335. /* ... and maybe enable its irq */
  336. if (t->enabled) {
  337. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  338. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  339. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  340. dev_warn(dev, "can't enable alarm\n");
  341. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  342. }
  343. return 0;
  344. }
  345. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  346. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  347. {
  348. int err, osc, trim;
  349. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  350. if (err == 0) {
  351. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  352. osc / 1000, osc % 1000);
  353. seq_printf(seq, "trim\t\t: %d\n", trim);
  354. }
  355. return 0;
  356. }
  357. #else
  358. #define rs5c372_rtc_proc NULL
  359. #endif
  360. static const struct rtc_class_ops rs5c372_rtc_ops = {
  361. .proc = rs5c372_rtc_proc,
  362. .read_time = rs5c372_rtc_read_time,
  363. .set_time = rs5c372_rtc_set_time,
  364. .read_alarm = rs5c_read_alarm,
  365. .set_alarm = rs5c_set_alarm,
  366. .alarm_irq_enable = rs5c_rtc_alarm_irq_enable,
  367. };
  368. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  369. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  370. struct device_attribute *attr, char *buf)
  371. {
  372. int err, trim;
  373. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  374. if (err)
  375. return err;
  376. return sprintf(buf, "%d\n", trim);
  377. }
  378. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  379. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  380. struct device_attribute *attr, char *buf)
  381. {
  382. int err, osc;
  383. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  384. if (err)
  385. return err;
  386. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  387. }
  388. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  389. static int rs5c_sysfs_register(struct device *dev)
  390. {
  391. int err;
  392. err = device_create_file(dev, &dev_attr_trim);
  393. if (err)
  394. return err;
  395. err = device_create_file(dev, &dev_attr_osc);
  396. if (err)
  397. device_remove_file(dev, &dev_attr_trim);
  398. return err;
  399. }
  400. static void rs5c_sysfs_unregister(struct device *dev)
  401. {
  402. device_remove_file(dev, &dev_attr_trim);
  403. device_remove_file(dev, &dev_attr_osc);
  404. }
  405. #else
  406. static int rs5c_sysfs_register(struct device *dev)
  407. {
  408. return 0;
  409. }
  410. static void rs5c_sysfs_unregister(struct device *dev)
  411. {
  412. /* nothing */
  413. }
  414. #endif /* SYSFS */
  415. static struct i2c_driver rs5c372_driver;
  416. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  417. {
  418. unsigned char buf[2];
  419. int addr, i, ret = 0;
  420. if (rs5c372->type == rtc_r2025sd) {
  421. if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST))
  422. return ret;
  423. rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST;
  424. } else {
  425. if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
  426. return ret;
  427. rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
  428. }
  429. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  430. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  431. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  432. /* use 24hr mode */
  433. switch (rs5c372->type) {
  434. case rtc_rs5c372a:
  435. case rtc_rs5c372b:
  436. buf[1] |= RS5C372_CTRL2_24;
  437. rs5c372->time24 = 1;
  438. break;
  439. case rtc_r2025sd:
  440. case rtc_r2221tl:
  441. case rtc_rv5c386:
  442. case rtc_rv5c387a:
  443. buf[0] |= RV5C387_CTRL1_24;
  444. rs5c372->time24 = 1;
  445. break;
  446. default:
  447. /* impossible */
  448. break;
  449. }
  450. for (i = 0; i < sizeof(buf); i++) {
  451. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  452. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  453. if (unlikely(ret < 0))
  454. return ret;
  455. }
  456. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  457. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  458. return 0;
  459. }
  460. static int rs5c372_probe(struct i2c_client *client,
  461. const struct i2c_device_id *id)
  462. {
  463. int err = 0;
  464. int smbus_mode = 0;
  465. struct rs5c372 *rs5c372;
  466. struct rtc_time tm;
  467. dev_dbg(&client->dev, "%s\n", __func__);
  468. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  469. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  470. /*
  471. * If we don't have any master mode adapter, try breaking
  472. * it down in to the barest of capabilities.
  473. */
  474. if (i2c_check_functionality(client->adapter,
  475. I2C_FUNC_SMBUS_BYTE_DATA |
  476. I2C_FUNC_SMBUS_I2C_BLOCK))
  477. smbus_mode = 1;
  478. else {
  479. /* Still no good, give up */
  480. err = -ENODEV;
  481. goto exit;
  482. }
  483. }
  484. rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372),
  485. GFP_KERNEL);
  486. if (!rs5c372) {
  487. err = -ENOMEM;
  488. goto exit;
  489. }
  490. rs5c372->client = client;
  491. i2c_set_clientdata(client, rs5c372);
  492. rs5c372->type = id->driver_data;
  493. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  494. rs5c372->regs = &rs5c372->buf[1];
  495. rs5c372->smbus = smbus_mode;
  496. err = rs5c_get_regs(rs5c372);
  497. if (err < 0)
  498. goto exit;
  499. /* clock may be set for am/pm or 24 hr time */
  500. switch (rs5c372->type) {
  501. case rtc_rs5c372a:
  502. case rtc_rs5c372b:
  503. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  504. * so does periodic irq, except some 327a modes.
  505. */
  506. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  507. rs5c372->time24 = 1;
  508. break;
  509. case rtc_r2025sd:
  510. case rtc_r2221tl:
  511. case rtc_rv5c386:
  512. case rtc_rv5c387a:
  513. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  514. rs5c372->time24 = 1;
  515. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  516. * irq, on both 386 and 387
  517. */
  518. break;
  519. default:
  520. dev_err(&client->dev, "unknown RTC type\n");
  521. goto exit;
  522. }
  523. /* if the oscillator lost power and no other software (like
  524. * the bootloader) set it up, do it here.
  525. *
  526. * The R2025S/D does this a little differently than the other
  527. * parts, so we special case that..
  528. */
  529. err = rs5c_oscillator_setup(rs5c372);
  530. if (unlikely(err < 0)) {
  531. dev_err(&client->dev, "setup error\n");
  532. goto exit;
  533. }
  534. if (rs5c372_get_datetime(client, &tm) < 0)
  535. dev_warn(&client->dev, "clock needs to be set\n");
  536. dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n",
  537. ({ char *s; switch (rs5c372->type) {
  538. case rtc_r2025sd: s = "r2025sd"; break;
  539. case rtc_r2221tl: s = "r2221tl"; break;
  540. case rtc_rs5c372a: s = "rs5c372a"; break;
  541. case rtc_rs5c372b: s = "rs5c372b"; break;
  542. case rtc_rv5c386: s = "rv5c386"; break;
  543. case rtc_rv5c387a: s = "rv5c387a"; break;
  544. default: s = "chip"; break;
  545. }; s;}),
  546. rs5c372->time24 ? "24hr" : "am/pm"
  547. );
  548. /* REVISIT use client->irq to register alarm irq ... */
  549. rs5c372->rtc = devm_rtc_device_register(&client->dev,
  550. rs5c372_driver.driver.name,
  551. &rs5c372_rtc_ops, THIS_MODULE);
  552. if (IS_ERR(rs5c372->rtc)) {
  553. err = PTR_ERR(rs5c372->rtc);
  554. goto exit;
  555. }
  556. err = rs5c_sysfs_register(&client->dev);
  557. if (err)
  558. goto exit;
  559. return 0;
  560. exit:
  561. return err;
  562. }
  563. static int rs5c372_remove(struct i2c_client *client)
  564. {
  565. rs5c_sysfs_unregister(&client->dev);
  566. return 0;
  567. }
  568. static struct i2c_driver rs5c372_driver = {
  569. .driver = {
  570. .name = "rtc-rs5c372",
  571. },
  572. .probe = rs5c372_probe,
  573. .remove = rs5c372_remove,
  574. .id_table = rs5c372_id,
  575. };
  576. module_i2c_driver(rs5c372_driver);
  577. MODULE_AUTHOR(
  578. "Pavel Mironchik <pmironchik@optifacio.net>, "
  579. "Alessandro Zummo <a.zummo@towertech.it>, "
  580. "Paul Mundt <lethal@linux-sh.org>");
  581. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  582. MODULE_LICENSE("GPL");
  583. MODULE_VERSION(DRV_VERSION);